CN101424837B - Method for manufacturing LCD array substrate - Google Patents
Method for manufacturing LCD array substrate Download PDFInfo
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- CN101424837B CN101424837B CN2007100477260A CN200710047726A CN101424837B CN 101424837 B CN101424837 B CN 101424837B CN 2007100477260 A CN2007100477260 A CN 2007100477260A CN 200710047726 A CN200710047726 A CN 200710047726A CN 101424837 B CN101424837 B CN 101424837B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 26
- 238000000034 method Methods 0.000 title claims description 28
- 239000000758 substrate Substances 0.000 title description 12
- 229910052751 metal Inorganic materials 0.000 claims abstract description 128
- 239000002184 metal Substances 0.000 claims abstract description 128
- 238000005530 etching Methods 0.000 claims abstract description 41
- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 34
- 239000011521 glass Substances 0.000 claims abstract description 10
- 238000000151 deposition Methods 0.000 claims abstract description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 45
- 239000003292 glue Substances 0.000 claims description 11
- 238000001259 photo etching Methods 0.000 claims description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 6
- 239000011248 coating agent Substances 0.000 claims description 5
- 238000000576 coating method Methods 0.000 claims description 5
- 230000008021 deposition Effects 0.000 claims description 4
- 239000002904 solvent Substances 0.000 claims description 3
- 238000004380 ashing Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 121
- 239000010408 film Substances 0.000 description 42
- 238000010586 diagram Methods 0.000 description 22
- 238000005516 engineering process Methods 0.000 description 5
- 150000001875 compounds Chemical class 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 229910020286 SiOxNy Inorganic materials 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 238000002788 crimping Methods 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 235000012054 meals Nutrition 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Liquid Crystal (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
Abstract
The invention relates to a manufacturing method of a liquid crystal display device. The manufacturing method comprises the following steps: splashing and forming a first metal layer image on the clean surface of glass; depositing an insulating film and an active layer on the basis of forming the first metal layer image; splashing and forming a second metal layer image; forming the contract hole of the first metal layer image after the exposure and the develop by utilizing a mask plate; etching the contact hole till the first metal layer image at the contact hole is exposed; splashing and forming an oxide conducting layer image; depositing the insulating film on the oxide conducting layer image; and finally stripping the insulating film to expose the oxide conducting layer image. The manufacturing method of the liquid crystal display device can improve the ducting capacity of the contact hole, reduce the quantity of the prior contact hole, and improve the input capacity of a picture element signal.
Description
Technical field
The present invention relates to a kind of manufacture method of liquid crystal indicator, particularly the manufacture method of LCD device array substrates.
Background technology
Traditional cathode-ray tube (CRT) (Cathode Ray Tube, CRT) display relies on the phosphor powder on the cathode-ray tube (CRT) emitting electrons bump screen to come display image, and LCD (Liquid Crystal Display, LCD) principle is different fully with CRT monitor, usually, liquid crystal indicator has upper substrate (also claiming colored filter substrate) and infrabasal plate (also claiming array base palte), have each other certain intervals and mutually over against, be formed on two substrates a plurality of electrodes mutually over against, liquid crystal is clipped between upper substrate and the following basic meal, voltage is applied on the liquid crystal by the electrode on the substrate, thereby changes the arrangement display image of liquid crystal molecule then according to the voltage that is acted on.But aforesaid liquid crystal indicator itself oneself is not launched light, it needs extra light source to come display image, therefore, liquid crystal indicator has the backlight that is positioned at the liquid crystal panel back, thereby controls from backlight quantity of incident light display image according to the arrangement of liquid crystal molecule.The structure of general liquid crystal indicator is as follows: accompany glass substrate, colored filter, electrode, liquid crystal layer and thin film transistor (TFT) between two polaroids, liquid crystal molecule is the material with refractive index and dielectric constant anisotropy.The light process that backlight sends is polaroid down, becomes the polarized light with certain polarization direction.Institute's making alive between the transistor controls electrode, and this voltage acts on the polarization direction that liquid crystal is controlled polarized light, polarized light forms monochromatic polarized light after seeing through corresponding color film chromatograph, if polarized light can penetrate the upper strata polaroid, then demonstrates corresponding color; According to the electric field intensity difference, the deflection angle of liquid crystal molecule is also different, and the light intensity that sees through is different, and the brightness of demonstration is also different, and the combination that the optical filter by three kinds of colors of RGB forms different light intensity shows motley image.
In the array base palte of present liquid crystal indicator, wiring mainly is made up of the first metal layer, second metal level, active layer, oxide conducting layer and dielectric film in the array base palte.The part of wiring is made of the first metal layer in the controlling grid scan line of array side, public electrode and terminal wiring, the screen, and wiring is to be made of second metal level in signal scanning line, the wiring of part terminal, the screen.Flow into second metal level as signal demand from the first metal layer, or second metal level is when flowing into the first metal layer, needs by making the first metal layer, the second metal layer contacting hole also connects by the oxide conducting layer.
Using in four light shield manufacturing array substrate process at present, at first the sputter the first metal layer forms the figure of the first metal layer by the mode of technology on glass substrate, deposit dielectric film then, deposit active layer then, sputter second metal level, by gray tone mask plate (Gray Tone Mask, hereinafter to be referred as GTM) or intermediate tone mask plate (Half Tone Mask, hereinafter to be referred as HTM) Exposure mode form the figure and the transistor channel of second metal level, deposit dielectric film then, the dielectric film at etching the first metal layer and place, the second metal layer contacting hole, sputter oxide conducting layer then, connect the figure of the first metal layer and second metal level, it is electrically connected, and form the terminal pressure contact portion.And in five light shield technology, the active layer and second metal level do not form by the mask exposure mode of GTM or HTM, but form by two masks.
But in above-mentioned manufacturing process, owing to have dielectric film to exist between the first metal layer and second metal level and second metal and the oxide conducting layer, can prevent the electric short circuit phenomenon of first metal survey layer and second metal level and second metal level and oxide conducting layer.And in the array design, for the first metal layer and second metal level that need be electrically connected can normally be connected, portion of terminal can be electrically connected with external circuit in crimping, need on dielectric film, the mode by the etching contact hole expose the metal surface, connect by the oxide conducting layer again.But at present owing to the first metal layer, second metal level, oxide conducting layer belong to different process layers, between have dielectric film to exist, that is to say between the first metal layer and the oxide conducting layer to have two-layer dielectric film, have dielectric film between second metal level and the oxide conducting layer.And all places that need the etching contact hole are while etchings in the etching technics, just after the contact hole etching of second layer on surface of metal is finished, also need the contact hole on the first metal layer surface is proceeded etching, its result is exactly after the contact hole etching on the first metal layer is finished, the surface that the second metal layer contacting hole exists has been crossed and has been carved a period of time, the surface coarse injustice that can become, after connecting by the oxide conducting layer, it is very big that the contact resistance on contact hole surface can become, influenced the electrically conducting ability greatly, the number that rolls up contact hole can increase ducting capacity but can impact wiring and the viewing area aperture opening ratio that shields periphery.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of manufacture method of liquid crystal indicator, improves the electrically conducting ability of liquid crystal indicator by this manufacture method.
For achieving the above object, the invention provides a kind of manufacture method of liquid crystal indicator, it may further comprise the steps: sputter and form the first metal layer figure on the glass surface of cleaning; Deposit dielectric film and active layer on the basis that forms the first metal layer figure; Sputter also forms second metal layer image; By the contact hole that utilizes the mask board to explosure, the back of developing forms the first metal layer figure; The etching contact hole comes out up to the first metal layer figure at contact hole place; Sputter also forms the oxide conducting layer pattern; Deposit dielectric film on the oxide conducting layer pattern; Peeling off dielectric film at last comes out the oxide conducting layer.
Another technical scheme of the present invention provides a kind of manufacture method of liquid crystal indicator, and it may further comprise the steps: sputter and form the first metal layer figure on the glass surface of cleaning; Deposit dielectric film and active layer on the basis that forms the first metal layer figure; Sputter also forms second metal layer image; The deposit dielectric film; By the contact hole that utilizes the mask board to explosure, the back of developing forms the first metal layer figure and second metal layer image; The etching contact hole comes out up to the first metal layer figure at contact hole place; Peeling off dielectric film comes out the second metal layer image surface; Sputter also forms the oxide conducting layer pattern.
The present invention is owing to adopted above-mentioned technical scheme, make it compared with prior art, have following advantage and good effect: the manufacture method of liquid crystal indicator of the present invention is when forming contact hole, second layer on surface of metal need not pass through the etching contact hole, and directly be electrically connected with the mode that the oxide conducting layer contacts at second layer on surface of metal, realize being electrically connected of the first metal layer and second metal level by the contact hole on the first metal layer surface again, improved the ducting capacity of contact hole like this, can reduce original contact hole number, for the wiring in shielding provides bigger space.Improved the signal input capability of second metal level in addition, the contact hole in the pixel of viewing area also can omit, thereby has improved the input capability of aperture opening ratio and picture element signal.Simultaneously, because dielectric film is formed on the oxide conducting layer, thus between the figure of the first metal layer and oxide conducting layer, have only dielectric film to exist, thus memory capacitance E increases, and helps improving aperture ratio of pixels in design.
Description of drawings
Fig. 1 is the manufacture method first embodiment operation synoptic diagram of liquid crystal indicator of the present invention, Figure 1A forms the first metal layer synoptic diagram for the present invention, Figure 1B forms the second metal level synoptic diagram for the present invention, Fig. 1 C is a synoptic diagram behind the stripping photoresist, Fig. 1 D is for forming the first metal layer contact hole synoptic diagram, and Fig. 1 E is a synoptic diagram behind the stripping photoresist, and Fig. 1 F is a synoptic diagram behind the formation oxide conducting layer, Fig. 1 G is a synoptic diagram behind the deposit dielectric film, and Fig. 1 H is a synoptic diagram behind the stripping photoresist;
Fig. 2 is the manufacture method second embodiment operation synoptic diagram of liquid crystal indicator of the present invention, and Fig. 2 A keeps synoptic diagram behind the photoresist for the present invention, and Fig. 2 B is synoptic diagram behind the deposit dielectric film of the present invention, and Fig. 2 C is a synoptic diagram behind the stripping photoresist;
Fig. 3 is manufacture method the 3rd embodiment operation synoptic diagram of liquid crystal indicator of the present invention, Fig. 3 A forms the first metal layer synoptic diagram for the present invention, Fig. 3 B forms the second metal level synoptic diagram for the present invention, Fig. 3 C forms the channel region synoptic diagram for the present invention, Fig. 3 D is a synoptic diagram behind the deposit dielectric film, and Fig. 3 E is for forming the contact hole synoptic diagram, and Fig. 3 F is a synoptic diagram behind the stripping photoresist, Fig. 3 G is a synoptic diagram behind the formation oxide conducting layer, and Fig. 3 H is a synoptic diagram behind the stripping photoresist.
Embodiment
Be described in further detail below with reference to the manufacture method of accompanying drawing LCD device array substrates of the present invention.
Embodiment 1
In manufacture method first embodiment of liquid crystal indicator of the present invention, shown in Figure 1A, sputter the first metal layer 200 on glass 100 surfaces of cleaning at first, the coating photoresist, after the exposure of the first light shield mask plate, developing, the first metal layer 200 figures, stripping photoresist are then made in etching again.
Shown in Figure 1B, deposit dielectric film 300 on the basis of finishing the first metal layer 200 that is to say the protection dielectric film 300 that forms the first metal layer 200 figures at area B-B '.On dielectric film 300 and be positioned at zone C-C ' and go up deposit active layer 400, on dielectric film 300 and be positioned at area B-B ' and go up sputter and form second metal level 500, be coated with photoresist 600 then, by the second light shield mask board to explosure, development, this second light shield mask plate is gray tone mask plate (Gray Tone Mask, hereinafter to be referred as GTM) or intermediate tone mask plate (Half Tone Mask, hereinafter to be referred as HTM), be divided into the exposure situation of photoresist 600 two-layer by the second light shield mask plate.
Shown in Fig. 1 C, peel off the ground floor photoresist, form the channel region of second metal level 500 by the etching mode, peel off second layer photoresist 602 then.
Shown in Fig. 1 D, be coated with photoresist 600 again on the surface of second metal level 500, form the contact hole 901 and 903 of the figure of the first metal layer 200 by the exposure of the 3rd light shield mask plate, the back of developing.
Shown in Fig. 1 E, etching contact hole 901,903 comes out up to the first metal layer 200 figures at contact hole 901,903 places, and stripping photoresist 600 then.
Shown in Fig. 1 F, form contact hole 901,903 backs at surface sputtering oxide conducting layer 800, coating photoresist 600 is by the figure that the 4th light shield mask plate exposes, development forms oxide conducting layer 800.
Shown in Fig. 1 G, etching forms the figure of oxide conducting layer 800, keeps the photoresist 600 that is not exposed, at the surface deposition dielectric film 700 that remains with the photoresist 600 that is not exposed.
Shown in Fig. 1 H, peel off the photoresist 600 that is not exposed by solvent, the dielectric film 700 on the photoresist 600 that also will not be exposed is simultaneously peeled off, and the rear oxidation thing conductive layer 800 of peeling off by above-mentioned photoresist 600 and dielectric film 700 is exposed.Like this, the terminal pressure contact portion 1001,1002 of the required the first metal layer that is electrically connected 200 and second metal level 500, regional A-A ' and B-B ' and contact hole 901,903 all etching finish.
Pass through the method, when forming contact hole 901,903, the etching contact hole need not be passed through in second metal level, 500 surfaces, and the mode that directly contacts with oxide conducting layer 800 on second metal level, 500 surfaces is electrically connected, realize being electrically connected of the first metal layer 200 and second metal level 500 by the contact hole on the first metal layer 200 surfaces again, improved the ducting capacity of contact hole 901,903 like this, can reduce original contact hole number, for the wiring in shielding provides bigger space.Improved the signal input capability of second metal level 500 in addition, the contact hole in the pixel of viewing area also can omit, thereby has improved the input capability of aperture opening ratio and picture element signal.Simultaneously, because dielectric film 700 is formed on the oxide conducting layer 800, thus between the figure of the first metal layer 200 and oxide conducting layer 800, have only dielectric film 300 to exist, thus memory capacitance E increases, and helps improving aperture ratio of pixels in design.
Embodiment 2
In embodiment 2, the first five step of embodiment 2 is identical with Figure 1A to 1E of embodiment 1, here just no longer describe in detail, itself and embodiment 1 difference are: shown in Fig. 2 A, the 4th light shield uses gray tone mask plate (Gray Tone Mask, hereinafter to be referred as GTM) or intermediate tone mask plate (Half Tone Mask, hereinafter to be referred as HTM) expose, be not exposed at the pixel electrode area H of oxide conducting layer 800 reserve part photoresist 602, after the etching gestalt becomes the figure of oxide conducting layer 800, shown in Fig. 2 B, the photoresist 602 that ashing is not exposed, photoresist 602 reservations on the figure of oxide conducting layer 800 beyond the pixel electrode are at surface deposition dielectric film 700; By solvent stripping photoresist 602, the dielectric film 700 on the photoresist 602 is stripped from simultaneously shown in Fig. 2 C, and the oxide conducting layer 800 that is positioned at like this on second metal level 500 just is exposed.Because there is dielectric film 700 in pixel electrode area H, when friction process, can not cause friction bad owing to the figure of the first metal layer 200 and the figure of second metal level 500 and the section difference between the pixel electrode, improved friction, capability.
Embodiment 3
As shown in Figure 3A, at first sputter the first metal layer 200 on glass 100 surfaces of cleaning is coated with photoresist, and after the exposure of the first light shield mask plate, developing, the first metal layer 200 figures, stripping photoresist are then made in etching again.
Shown in Fig. 3 B, deposit dielectric film 300 on the basis of finishing the first metal layer 200 that is to say the protection dielectric film 300 that forms the figure of the first metal layer 200 at area B-B '.On dielectric film 300 and be positioned at zone C-C ' and go up deposit active layer 400, on dielectric film 300 and be positioned at area B-B ' and go up sputter and form second metal level 500, be coated with photoresist 600 then, by the second light shield mask board to explosure, development, this second light shield mask plate is GTM plate or HTM plate, by the second light shield mask plate exposure situation of photoresist 600 is divided into three layers, removes by the photoresist of light.
Shown in Fig. 3 C, etching forms the figure of needed second metal level 500, and next peels off the ground floor photoresist, forms channel region by technology etching mode, peels off second layer photoresist 602 once more, keeps the 3rd layer photoetching glue 603.
Shown in Fig. 3 D,, form the isolated protective layer on second metal level, 500 surfaces at the surface deposition dielectric film 700 that remains with the 3rd layer photoetching glue 603.
Shown in Fig. 3 E; coating photoresist 600 on dielectric film 700; by etching technics etching contact hole 901; 902; 903; 904; when etching into the 3rd layer photoetching glue 603 surfaces; because the contact hole 901 on the first metal layer 200 surfaces; 903 incomplete etchings are finished; so also can continue etching; but on second metal level, 500 surfaces that have the 3rd layer photoetching glue 603 to exist; because the protection of the 3rd layer photoetching glue 603 can not be etched again; so second metal level, 500 surfaces can not be subjected to the destruction of etching, the contact hole 901 complete etchings that etching is performed until on the first metal layer 200 are finished.
Shown in Fig. 3 F, contact hole 901 on the first metal layer 200, after 903 complete etchings are finished, peel off the 3rd layer photoetching glue 603 of reservation by the mode of peeling off, be stripped from simultaneously at the dielectric film 700 that remains with on the 3rd layer photoetching glue 603 this moment, and formed contact hole 902,904, so after peeling off by this, second metal level, 500 surfaces under the 3rd layer photoetching glue 603 come out.Like this, the contact hole 901,902 of the first metal layer 200 of the required the first metal layer that is electrically connected 200 and second metal level 500 and terminal pressure contact portion 1001,1002 and second metal level 500 all etching finish.
Shown in Fig. 3 G, sputter oxide conducting layer 800 on dielectric film 700, this moment, the first metal layer 200 and second metal level 500 were electrically connected.Form the figure of oxide conducting layer 800 then by Exposure mode.
Shown in Fig. 3 H, coating photoresist 600 on oxide conducting layer 800, the exposed portion of etching oxide conductive layer 800, glass photomask glue 600 then, and part that does not need in the oxide conducting layer 800 to be electrically connected and the part that does not need figure are removed.
By the method, forming contact hole 901,902, in the time of 903,904, second metal level, 500 surfaces can be by over etching in contact hole etching technology, thereby can guarantee that contact hole place second metal level, 500 surface contacted resistances can not become big bad because of over etching, improved contact hole 901,902,903,904 ducting capacity, can reduce original contact hole number,, improve the input capability of picture element signal for the wiring in shielding provides bigger space.
In the above-described embodiments, the material therefor of the first metal layer described in the present invention can be AlNd, AI, Cu, MO, MoW or Cr a kind of or be AlNd, AI, Cu, MO, one of MoW or Cr or that combination in any constituted was compound.Described dielectric film can be SiO2, one of SiNx or SiOxNy material or that combination in any constituted was compound.The described second metal level metal is Mo, MoW or Cr a kind of or be Mo, and one of MoW or Cr or that combination in any constituted was compound, described oxide conducting layer is a transparency conducting layer, as indium tin oxide, indium-zinc oxide.
That more than introduces only is based on preferred embodiment of the present invention, can not limit scope of the present invention with this.Any measurement mechanism of the present invention is done replacement, the combination, discrete of step well know in the art, and the invention process step is done well know in the art being equal to change or replace and all do not exceed exposure of the present invention and protection domain.
Claims (7)
1. the manufacture method of a liquid crystal indicator is characterized in that, it may further comprise the steps:
Sputter and form the first metal layer figure on the glass surface of cleaning;
Deposit dielectric film and active layer on the basis that forms the first metal layer figure;
Sputter also forms second metal layer image, wherein uses gray tone mask plate or intermediate tone mask plate to be divided into the exposure situation of photoresist two-layer;
By the contact hole that utilizes the mask board to explosure, the back of developing forms the first metal layer figure;
The etching contact hole comes out up to the first metal layer figure at contact hole place;
Sputter also forms the oxide conducting layer pattern;
Keep the photoresist that is not exposed, at the surface deposition dielectric film that keeps the photoresist that is not exposed, peel off the photoresist that is not exposed by solvent, the dielectric film on the photoresist that also will not be exposed is simultaneously peeled off, and the oxide conducting layer is exposed.
2. the manufacture method of liquid crystal indicator as claimed in claim 1, it is characterized in that, the step of described formation the first metal layer figure, second metal layer image, oxide conducting layer pattern is by behind the coating photoresist, utilizes mask board to explosure, development, etching technics to form.
3. the manufacture method of liquid crystal indicator as claimed in claim 1 is characterized in that, carries out stripping photoresist after the step of described formation the first metal layer figure, second metal layer image, etching contact hole.
4. the manufacture method of liquid crystal indicator as claimed in claim 1 is characterized in that, the photoresist that ashing is not exposed after the step of described formation oxide conducting layer pattern.
5. the manufacture method of a liquid crystal indicator is characterized in that, it may further comprise the steps:
Sputter and form the first metal layer figure on the glass surface of cleaning;
Deposit dielectric film and active layer on the basis that forms the first metal layer figure;
Sputter also forms second metal layer image, wherein uses gray tone mask plate or intermediate tone mask plate the exposure situation of photoresist to be divided into three layers, deposit dielectric film on the surface that remains with the 3rd layer photoetching glue;
By the contact hole that utilizes the mask board to explosure, the back of developing forms the first metal layer figure and second metal layer image;
The etching contact hole comes out up to the first metal layer figure at contact hole place;
Peeling off dielectric film comes out the second metal layer image surface;
Sputter also forms the oxide conducting layer pattern.
6. the manufacture method of liquid crystal indicator as claimed in claim 5, it is characterized in that, the step of described formation the first metal layer figure, second metal layer image, oxide conducting layer pattern utilizes mask board to explosure, development, etching technics to form by after being coated with photoresist.
7. the manufacture method of liquid crystal indicator as claimed in claim 5 is characterized in that, the step of described deposit dielectric film is the deposit dielectric film on the surface that remains with the 3rd layer photoetching glue.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007100477260A CN101424837B (en) | 2007-11-02 | 2007-11-02 | Method for manufacturing LCD array substrate |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2007100477260A CN101424837B (en) | 2007-11-02 | 2007-11-02 | Method for manufacturing LCD array substrate |
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| CN101424837A CN101424837A (en) | 2009-05-06 |
| CN101424837B true CN101424837B (en) | 2010-08-25 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103165525A (en) * | 2011-12-13 | 2013-06-19 | 上海天马微电子有限公司 | TFT array substrate and preparation method of ESD protection circuit on TFT array substrate |
| CN103337501B (en) * | 2013-06-24 | 2015-11-25 | 深圳市华星光电技术有限公司 | Array base palte and preparation method thereof, panel display apparatus |
| CN105807558A (en) * | 2014-12-30 | 2016-07-27 | 展讯通信（上海）有限公司 | Novel combined mask |
| CN106876330A (en) * | 2017-02-28 | 2017-06-20 | 上海中航光电子有限公司 | A kind of array base palte and preparation method thereof, display panel and display device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1495478A (en) * | 2002-09-02 | 2004-05-12 | ���ǵ�����ʽ���� | Contact structure and mfg. method, thin film transistor array panel and mfg. method |
| CN1532616A (en) * | 2003-03-18 | 2004-09-29 | 友达光电股份有限公司 | Method for producing thin film transistor liquid crystal display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1495478A (en) * | 2002-09-02 | 2004-05-12 | ���ǵ�����ʽ���� | Contact structure and mfg. method, thin film transistor array panel and mfg. method |
| CN1532616A (en) * | 2003-03-18 | 2004-09-29 | 友达光电股份有限公司 | Method for producing thin film transistor liquid crystal display panel |
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