CN101426341A - Analysis method for printed circuit board manufacturing process - Google Patents
Analysis method for printed circuit board manufacturing process Download PDFInfo
- Publication number
- CN101426341A CN101426341A CNA2008102175734A CN200810217573A CN101426341A CN 101426341 A CN101426341 A CN 101426341A CN A2008102175734 A CNA2008102175734 A CN A2008102175734A CN 200810217573 A CN200810217573 A CN 200810217573A CN 101426341 A CN101426341 A CN 101426341A
- Authority
- CN
- China
- Prior art keywords
- printed circuit
- circuit board
- manufacturing process
- board
- pcb
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 31
- 238000004458 analytical method Methods 0.000 title claims description 5
- 238000000034 method Methods 0.000 claims abstract description 35
- 238000005520 cutting process Methods 0.000 claims abstract description 8
- 230000002950 deficient Effects 0.000 claims description 11
- 238000012423 maintenance Methods 0.000 claims description 4
- 238000003825 pressing Methods 0.000 claims description 3
- 238000003908 quality control method Methods 0.000 abstract description 3
- 238000007639 printing Methods 0.000 description 3
- -1 LOT2 Proteins 0.000 description 2
- 101000730643 Homo sapiens Zinc finger protein PLAGL1 Proteins 0.000 description 1
- 101150016433 LOT5 gene Proteins 0.000 description 1
- 101100334474 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) NOP1 gene Proteins 0.000 description 1
- 101100232415 Schizosaccharomyces pombe (strain 972 / ATCC 24843) saf5 gene Proteins 0.000 description 1
- 102100032570 Zinc finger protein PLAGL1 Human genes 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 230000008521 reorganization Effects 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Images
Abstract
The present invention discloses a manufacturing process analyzing method of printed circuit board, wherein the technical problem to be settled is to conveniently control the quality in the manufacturing process of printed circuit board. The invention adopts a technical plan that the manufacturing process analyzing method of printed circuit board comprises the following procedures: 1. arranging sub-boards on a motherboard with an arrangement sequence; 2. respectively setting single chip code on each sub-board; 3. manufacturing the printed circuit board according to the manufacturing process of printed circuit board and cutting; and 4. confirming the position of sub-board on the motherboard according to the single chip code on the sub-board when non-conformed product is found after cutting. The method according to the invention adopts respectively setting single-chip code according to the arrangement sequence of sub-board on the motherboard compared with the prior art. The method can quickly position when non-conformed printed circuit board appears. The technical parameter is adjusted in time or the technical equipment is repaired. The quality control in the manufacturing process of printed circuit board is facilitated.
Description
Technical field
The present invention relates to a kind of manufacture method of printed circuit board (PCB), method of quality control during particularly a kind of printed circuit board (PCB) is made.
Background technology
Along with development of integrated circuits, the manufactured and application of increasing electronic product, printed circuit board (PCB) has been brought into play more and more important effect as the substrate carrier of integrated circuit in this process.The function that printed circuit board (PCB) provides in electronic product mainly provides a kind of carrier, carries electronic component and integrated circuit, and the connecting circuit between each electronic component and the integrated circuit is provided.Thereby the yields of printed circuit board (PCB) and quality are extremely important for electronic product is made.Printed circuit board (PCB) generally all is that design is in certain size range, yet the production of printed circuit board (PCB) all is by large-area printing manufacturing process, so during the printed circuit board (PCB) that the production electronic product needs, the capital is arranged in printed circuit board (PCB) on the one monoblock motherboard according to certain ordering, after motherboard is made, cut into the printed circuit board (PCB) of each piece independent utility again.After separation cuts becomes the printed circuit board (PCB) of independent utility from the motherboard, if flaw appears in printed circuit board (PCB), be difficult to accomplish accurately and timely to judge the defect at which link in the manufacturing process or the concrete position of motherboard, this has brought difficulty for the quality control in the course of manufacturing printed circuit board.
Summary of the invention
The manufacturing process analyzing method that the purpose of this invention is to provide a kind of printed circuit board (PCB), the technical problem that solve are the quality that makes things convenient in the control printed circuit board manufacture process.
The present invention is by the following technical solutions: a kind of manufacturing process analyzing method of printed circuit board (PCB) may further comprise the steps: one, daughter board is arranged on the motherboard by ordering; Two, the monolithic code is set respectively on each daughter board; Three, the manufacture craft of pressing printed circuit board (PCB) is made printed circuit board (PCB), cutting; Four, the cutting back finds have daughter board defective products to occur, determines the position of this daughter board on motherboard according to the monolithic code on the daughter board.
Method of the present invention is determined this daughter board behind the position on the motherboard according to the monolithic code on the daughter board, adjusting process parameter or maintenance process equipment.
Method of the present invention determines that according to the monolithic code on the daughter board this daughter board behind the position on the motherboard, carries out quality analysis.
Method of the present invention is provided with the monolithic code and by the ordering of daughter board on motherboard the monolithic code is set.
Method monolithic code of the present invention comprises batch, row-coordinate, row coordinate and the information of date of manufacture.
The present invention compared with prior art, employing is on each daughter board, by the ordering of daughter board on motherboard the monolithic code is set respectively, can when appearring in printed circuit board (PCB), defective products locate rapidly, in time adjusting process parameter or maintenance process equipment make things convenient for the quality in the control printed circuit board manufacture process.
Description of drawings
Fig. 1 is daughter board Pareto diagram on motherboard of the embodiment of the invention.
Embodiment
Below in conjunction with drawings and Examples the present invention is described in further detail.The manufacturing process analyzing method of printed circuit board (PCB) of the present invention may further comprise the steps: one, with printed circuit board (PCB), promptly daughter board 1 is arranged on the motherboard 2 by ordering; Two, on each daughter board 1, by the ordering of daughter board 1 on motherboard 2 monolithic code 3 chip ID are set respectively, chip ID comprises batch, row-coordinate, row coordinate and the information of date of manufacture; Three, the manufacture craft of pressing printed circuit board (PCB) is made printed circuit board (PCB), cutting; Four, the cutting back finds have daughter board 1 defective products to occur, analyzes according to the chip ID on it and searches reason, determines the position of this daughter board on motherboard, and adjusting process parameter or maintenance process equipment carry out quality analysis.
As shown in Figure 1, two bit representation row-coordinates and row coordinate behind preceding four the character representation batch numbers of chip ID.The row coordinate is with 1,2,3,4 expressions, and row-coordinate is represented with A, B, C, D.Find defective products when supposing to produce, wherein there is 1 LOT1-3C plate quality problems to occur, as it is disconnected to print the bad printed circuit board line that causes, when carrying out bad analysis, at first we can read batch number according to chip ID, can know it is the problem of certain or some batch appearance exactly, add up the known defective products of part again, if also have following defective products LOT2-3C, LOT3-3C, LOT1-4C, LOT5-4C-, LOT5-3C, then we can know that row-coordinate is C according to the row-coordinate and the row coordinate of location number, and the row coordinate is that quality problems appear in 3 and 4 daughter board.Then we can detect targetedly at LOT1, LOT2, LOT3, LOT4, LOT5 batch of row-coordinate is C, the row coordinate is whether 3 and 4 daughter board all goes wrong, especially when quality problems were reliability failure, we can navigate to exactly on the position of motherboard, and quality problems may appear in which daughter board, it is scrapped, and need not scrap by the gross.Same, we can go to locate in the printing process according to the position and the LOT batch number of defective products, galley where break down or problem in the position, adjusting process or repair process equipment, so that solve quality problems rapidly, avoid that the appearance of same defective products is arranged next time again.
Method of the present invention, (map type reorganization) known same batch fast which product is arranged is defective products through mapping when finding that defective products appears in daughter board, can also know simultaneously in printing it is problem, make things convenient for the quality problems in the control printed circuit board manufacture process at what position.
Claims (5)
1. the manufacturing process analyzing method of a printed circuit board (PCB) may further comprise the steps: one, daughter board is arranged on the motherboard by ordering; Two, the monolithic code is set respectively on each daughter board; Three, the manufacture craft of pressing printed circuit board (PCB) is made printed circuit board (PCB), cutting; Four, the cutting back finds have daughter board defective products to occur, determines the position of this daughter board on motherboard according to the monolithic code on the daughter board.
2. the manufacturing process analyzing method of printed circuit board (PCB) according to claim 1 is characterized in that: describedly determine this daughter board behind the position on the motherboard according to the monolithic code on the daughter board, adjusting process parameter or maintenance process equipment.
3. the manufacturing process analyzing method of printed circuit board (PCB) according to claim 1 is characterized in that: describedly determine that according to the monolithic code on the daughter board this daughter board behind the position on the motherboard, carries out quality analysis.
4. according to the manufacturing process analyzing method of claim 1,2 or 3 described printed circuit board (PCB)s, it is characterized in that: the described monolithic code that is provided with is provided with the monolithic code by the ordering of daughter board on motherboard.
5. the manufacturing process analyzing method of printed circuit board (PCB) according to claim 4 is characterized in that: described monolithic code comprises batch, row-coordinate, row coordinate and the information of date of manufacture.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008102175734A CN101426341A (en) | 2008-11-10 | 2008-11-10 | Analysis method for printed circuit board manufacturing process |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008102175734A CN101426341A (en) | 2008-11-10 | 2008-11-10 | Analysis method for printed circuit board manufacturing process |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101426341A true CN101426341A (en) | 2009-05-06 |
Family
ID=40616606
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2008102175734A Pending CN101426341A (en) | 2008-11-10 | 2008-11-10 | Analysis method for printed circuit board manufacturing process |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101426341A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102259503A (en) * | 2010-05-26 | 2011-11-30 | 宏恒胜电子科技（淮安）有限公司 | Automatic code spraying system and application method thereof |
| CN112702905A (en) * | 2019-10-22 | 2021-04-23 | 联策科技股份有限公司 | Method and system for tracing yield and error rate of printed circuit board |
-
2008
- 2008-11-10 CN CNA2008102175734A patent/CN101426341A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102259503A (en) * | 2010-05-26 | 2011-11-30 | 宏恒胜电子科技（淮安）有限公司 | Automatic code spraying system and application method thereof |
| CN102259503B (en) * | 2010-05-26 | 2014-02-12 | 宏恒胜电子科技（淮安）有限公司 | Automatic code spraying system and application method thereof |
| CN112702905A (en) * | 2019-10-22 | 2021-04-23 | 联策科技股份有限公司 | Method and system for tracing yield and error rate of printed circuit board |
| CN112702905B (en) * | 2019-10-22 | 2022-09-13 | 联策科技股份有限公司 | Method and system for tracing yield and error rate of printed circuit board |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100541502C (en) | A kind of PCB analogue system and its implementation with error detection function | |
| CN102271464B (en) | Method for tracing quality of circuit board | |
| CN103687315B (en) | Designing method of punching alignment target | |
| CN102118957A (en) | Collinear production method for printed circuit board and SMT production line | |
| CN104582331A (en) | Inner-layer deviation detecting method for multi-layer circuit board | |
| CN101709948A (en) | Alignment detecting method of multilayer printed wiring board | |
| CN103501579A (en) | Circuit board aligning method | |
| CN112888173A (en) | Processing and forming process of PCB | |
| CN109511231A (en) | A kind of anti-short circuit design of IC pad welding resistance | |
| CN109583526A (en) | Two dimensional code application method, device and the storage medium of pcb board | |
| CN1956630A (en) | Method of transplating and splicing single board of printed circuit board | |
| CN201256481Y (en) | PCB board having contraposition pores | |
| CN110545616A (en) | PCB facilitating layer deviation monitoring and manufacturing method thereof | |
| CN103118482B (en) | There is circuit board and the discrimination method thereof of quality identification mark | |
| CN101426341A (en) | Analysis method for printed circuit board manufacturing process | |
| CN103020387A (en) | Method for detecting inner layer circuit of PCB (Printed Circuit Board) by utilizing GENESIS software | |
| CN101940076A (en) | Panelizing method for printed circuit board manufacturing | |
| CN201332544Y (en) | Automatic alignment system for circuit board implantation | |
| CN112579540A (en) | Component mounting position identification method, mounting control method, device and medium | |
| CN203691754U (en) | Combined and jointed board based on various kinds of samples | |
| CN201479472U (en) | Rivet locator for PCB manufacture | |
| CN103987245B (en) | Creation data generating means and creation data generation method | |
| CN110788927B (en) | Hole opening method for printed circuit board thickness core combined product of 5G high-end server | |
| CN103020333B (en) | A kind of automation control method manufacturing line film | |
| CN102036486A (en) | Method for making false double-sided board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20090506 |