CN101378634A - Method of manufacturing multilayer printed circuit board - Google Patents
Method of manufacturing multilayer printed circuit board Download PDFInfo
- Publication number
- CN101378634A CN101378634A CNA2008102142887A CN200810214288A CN101378634A CN 101378634 A CN101378634 A CN 101378634A CN A2008102142887 A CNA2008102142887 A CN A2008102142887A CN 200810214288 A CN200810214288 A CN 200810214288A CN 101378634 A CN101378634 A CN 101378634A
- Authority
- CN
- China
- Prior art keywords
- via hole
- circuit pattern
- sintered bodies
- sintered body
- sintered
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
- H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0263—Details about a collection of particles
- H05K2201/0272—Mixed conductive particles, i.e. using different conductive particles, e.g. differing in shape
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1131—Sintering, i.e. fusing of metal particles to achieve or improve electrical conductivity
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
Abstract
In a method of manufacturing a multilayer printed circuit board, a plurality of insulating substrates each having a first surface and a second surface is prepared. A circuit pattern is formed on each of the first surfaces of the insulating substrates. A plurality of via holes is provided so as to extend through respective ones of the insulating substrates from a side of the second surfaces in such a manner that the via holes reach corresponding ones of the circuit patterns. Ones of a plurality of sintered bodies made of conductive particles is inserted into corresponding ones of the via holes and is fixed in the via holes. The insulating substrates are stacked so that the circuit patterns are electrically coupled through the sintered bodies.
Description
Technical field
The present invention relates to the manufacture method of multilayer board.
Background technology
In the classical production process of multilayer board, the via hole that is arranged in a plurality of resin moldings uses electrocondution slurry (conductive paste) to fill.Electrocondution slurry comprises metallic, organic solvent and as the resin of adhesive.Each resin molding has circuit pattern layer.For example, be that this resin molding is by stacked, and the circuit pattern of multiple stratification is by the electrocondution slurry electric coupling described in the United States Patent (USP) of 6889433 (corresponding JP-A-2001-24323) in the patent No..
In present manufacture method, when electrocondution slurry was filled into via hole, the surface attachment of resin molding had diaphragm.Thereby, avoided electrocondution slurry attached to the surface resin film except that via hole.After the organic solvent drying in electrocondution slurry, diaphragm is removed from resin molding.
Yet when removing diaphragm, electrocondution slurry is understood broken or is come off on resin molding.Thereby the generation conduction is unusual or short circuit is unusual.Particularly, when the electrocondution slurry with high tenor ratio was used to improve the conductivity of coupling part, it is more serious that above-mentioned defective will become.
Summary of the invention
In view of foregoing problems, the object of the present invention is to provide a kind of manufacture method of multilayer board, it can prevent because the conduction that not enough electrocondution slurry causes is unusual, perhaps because the short circuit that the electrocondution slurry that comes off causes is unusual.
According to first scheme of the manufacture method of multilayer board, preparation respectively has a plurality of insulated substrates of first surface and second surface.On each first surface of these a plurality of insulation boards, form circuit pattern to form a plurality of circuit patterns.A plurality of via holes are set, thereby arrive the mode of related circuit pattern in these a plurality of circuit patterns, extend through these a plurality of insulated substrates separately from second surface one side with these a plurality of via holes.Some sintered bodies in a plurality of sintered bodies are inserted in the corresponding via hole in these a plurality of via holes, and wherein these a plurality of sintered bodies form by the aggregation of a plurality of conducting particless of sintering.A plurality of sintered bodies are fixed in a plurality of via holes.Stacked a plurality of insulated substrate, and a plurality of circuit pattern is by a plurality of sintered body electric coupling.
In this manufacture method, can electrocondution slurry be filled in the via hole and realize the circuit pattern electric coupling.Therefore, do not need to be used for the diaphragm of filled conductive slurry, thereby simplified manufacturing process.And, also can avoid coming off of contingent electrocondution slurry or overflowing of electrocondution slurry when removing diaphragm.
According to the alternative plan of the manufacture method of multilayer board, preparation respectively has a plurality of insulated substrates of first surface and second surface.On each first surface of a plurality of insulated substrates, form circuit pattern to form a plurality of circuit patterns.A plurality of via holes are set, and these a plurality of via holes arrive the mode of related circuit pattern in a plurality of circuit patterns with it, extend through a plurality of separately insulating barriers from a side of second surface.Some sintered bodies in a plurality of sintered bodies are inserted in the corresponding via hole in these a plurality of via holes, and wherein these a plurality of sintered bodies form by the aggregation of a plurality of conducting particless of sintering, and the height of these a plurality of sintered bodies is less than the degree of depth of a plurality of via holes.Enter stacked these a plurality of insulating barriers of mode of corresponding via hole in a plurality of via holes with some circuit patterns in a plurality of circuit patterns.In heating process to stacked insulating barrier exert pressure, make the corresponding sintered body in a plurality of sintered bodies in the corresponding via hole in these some circuit patterns and a plurality of via holes in a plurality of circuit patterns contact, and a plurality of circuit pattern is by a plurality of sintered body electric coupling.
In this manufacture method, can obtain with according to the manufacture method similar effects of first scheme.In addition, because be used for that sintered body is fixed on the technology of via hole and the circuit pattern electric coupling of multiple stratification is carried out simultaneously, so further simplified manufacturing technique.
Description of drawings
Can be expressly understood other purpose of the present invention and advantage more by the preferred embodiment of describing in detail in conjunction with the following drawings.In the accompanying drawings:
Figure 1A to Fig. 1 E is depicted as the sectional view according to the exemplary manufacturing process of the multilayer board of first embodiment;
Fig. 2 A and Fig. 2 B are depicted as the view of exemplary sintered body insertion process;
Figure 3 shows that the view of exemplary sintered body technique for fixing;
Figure 4 shows that the exemplary circuitry pattern connects the view of technology;
Fig. 5 A is depicted as the view that is connected technology according to the exemplary circuitry pattern of second embodiment with Fig. 5 B; And
Fig. 6 A to Fig. 6 D is depicted as the view according to the exemplary manufacturing process of the sintered body of the 3rd embodiment.
Embodiment
(first embodiment)
Hereinafter with reference to the manufacture method of Figure 1A to Fig. 4 description according to the multilayer board of first embodiment.
At first, shown in Figure 1A, conductive metal layer 2 is coated in first surface as the insulating resin mould 1 of insulated substrate.Resin molding 1 is the thermoplastic resin film of thickness between about 25 μ m to 75 μ m.For example, resin molding 1 by Polyetherimide (polyetherimide) resin between polyethers ether cave (the polyether ether ketone) resin and about 35% to 65% between about 65% to 35% by weight forming.For example, metal level 2 is made of copper, and the thickness of the about 18 μ m of tool.
Subsequently, carry out the circuit pattern formation technology that is used on the first surface of resin molding 1, forming circuit pattern 3.For example, this circuit pattern formation technology can or be electroplated and carry out by etching, printing, deposition.In this embodiment, circuit pattern 3 forms by etch process.In this etch process, metal level 2 is to carry out etching by the first surface side of the resin molding shown in Figure 1B 1.Thereby, form the first circuit pattern film 10.
Next, shown in Fig. 1 C, technology is set by carrying out via hole by the second surface side irradiation carbon gas laser of resin molding 1.Thereby, a plurality of via holes 4 are set to extend through the bottom that resin molding 1 and circuit pattern 3 become via hole 4.Therefore, form second pattern film 20.The opening diameter of via hole 4 is determined as follows: in the sintered body insertion process, a sintered body 5 can be inserted in the corresponding via hole 4.Therefore, this opening diameter is greater than the full-size of sintered body 5.Sintered body 5 for example can be spherical, cylindrical, cuboid or cube shaped.
When the circuit pattern 3 of multiple stratification when circuit pattern connects in the technology electric coupling, the partial circuit pattern 3 that is positioned at via hole 4 bottoms is as electrode.When via hole 4 was set, control carbon gas output power of laser and irradiation time made Kong Buhui extend in the circuit pattern 3.
As the substitute of carbon gas laser, excimer laser also can be used for being provided with via hole 4.Via hole is provided with technology and also can carries out by drilling machine.By using laser beam, it is less that via hole 4 can form ground, and can prevent the excessive infringement to circuit pattern 3.
Next, shown in Fig. 1 D figure, in the sintered body insertion process, some sintered bodies 5 are inserted in the corresponding via hole 4.Therefore, form tertiary circuit pattern film 30.Sintered body 5 forms by the gathering of conducting particles sintering.For example, sintered body 5 can have the height identical with the openend of via hole 4.Perhaps, sintered body 5 also can be outstanding slightly from the openend of via hole 4.Each via hole 4 is set to have the gap between the outer surface of the inner surface of via hole 4 and sintered body 5.In this case, when sintered body 5 was out of shape in the sintered body technique for fixing, deflection can be received in this gap.
In order to form sintered body 5, under pressurized conditions, form aggregation with reservation shape and preliminary dimension by multiple conducting particles.Then, be lower than this aggregation of heating under the temperature of fusing point.Thereby, form bonding force each other and solidify this aggregation at conducting particles.The sintered body 5 that is inserted into via hole 4 connects in the technology at circuit pattern becomes link 6.
In the present embodiment, conducting particles comprises silver particles and tin particle.The weight ratio of tin is greatly in 20% to 80% scope in all particles.In the experimentation, when the content of tin is by weight in about scope of 30% to 50%, can obtain excellent result.When the content of tin less than 20% weight ratio, or during greater than 80% weight ratio, the alloy-layer between the aggregation adhesive interface is with attenuation.Therefore, compare with the situation of tin content in 20% to 80% scope, it is bad that the balance between electric conductivity and the bond properties will become.When the content of tin was by weight in about scope of 30% to 50%, the balance between electric conductivity and the bond properties improved.
In sintered body 5 being formed spherical technology, at high temperature heat the mixture of tin particle and silver particles.The mixture of heating is sprayed on the rotating disk and disperse, thereby have predetermined particle size by centrifugal force.Then, the temperature that the spheroid of mixture is cooled to be scheduled to.Thereby, form the spherical sintered body 5 that comprises Ag3Sn and AgSn solid solution.
When the thickness of resin molding 1 was represented by thickness T, the full-size of each sintered body 5 was in T arrives the scope of 1.4T.In experimentation, when the full-size of each sintered body 5 when T is in the scope of 1.3T, can obtain excellent result.At each sintered body 5 is that full-size is diameter under the situation of sphere.When the full-size of each sintered body 5 when T is in the 1.4T scope, the electric conductivity and the bond properties of the sintered body of being made by tin particle and silver particles are suitable.For example, be 75 μ m and be 18 μ m when thick that sintered body 5 forms the thickness with 90 μ m when resin molding 1 thickness by the circuit pattern 3 that copper film is made.In this case, even the generation of sintered body 5 changes, the diameter of sintered body 5 is also in T arrives the scope of 1.4T.
Now the sintered body insertion process is described with reference to Fig. 2 A and Fig. 2 B.For example, by using the insertion device to carry out this sintered body insertion process.
Insert device and comprise metal mask 63 and rotatable moving body 60.Metal mask 63 has a plurality of through holes 64.Rotatable moving body 60 comprises rotating part 61 and hangs the curtain part 62 of spinning part 61.Inserting device imports sintered body 5 in the via hole 4 one by one.Can fall into the diameter that the mode of passing a corresponding through hole 64 is provided with through hole 64 with a sintered body 5.Thereby through hole 64 extends through metal mask 63 corresponding to the via hole 4 that extends through second pattern film 20.
At first, the mode that second pattern film 20 is corresponded respectively to through hole 64 with via hole 4 positions with respect to metal mask 63.Then, will be arranged on the surface of metal mask 63 more than the sintered body 5 of via hole 4 quantity.Rotatable moving body 60 moves towards through hole 64 when making rotating part 61 rotations.Sintered body 5 imports through holes 64 by rotation and mobile curtain part 62.The sintered body 5 that imports to through hole 64 falls one by one and passes through hole 64 and be filled in the via hole 4.Thereby, form tertiary circuit pattern film 30, in this tertiary circuit pattern film, sintered body 5 is arranged in the via hole 4.
Perhaps, sintered body 5 also can be arranged in the via hole 4 of second circuit pattern film 20 and not use metal mask 63, and remains in second circuit pattern film 20 lip-deep unnecessary sintered bodies 5 and can remove by using squeegee.
Subsequently, in the sintered body technique for fixing, shown in Fig. 1 E, sintered body 5 is out of shape in via hole 4.Thereby, form link 6 and be fixed in the via hole 4.Finally, form the 4th circuit pattern film 40.
Can make ins all sorts of ways carries out the sintered body technique for fixing.For example, fixing thereby can sintered body 5 is out of shape in via hole 4 by pressurization.Also can fix sintered body 5 by using the surface tension that the coating solvent causes between the inner surface of sintered body 5 and via hole 4.Can be by applying ultrasonic vibration, with the tin distribution of particles on the silver particles surface, perhaps can be by being heated to predetermined temperature, with the tin particles melt on the silver particles surface.Should be noted that term " is fixed " means that sintered body 5 has enough bed knifes, also can avoid mobile even apply external force.As a result, sintered body 5 can not misplace but the successful execution circuit pattern connects technology.
Also can form link 6 by using roll-in.In this case, as shown in Figure 3,, pressure is applied to the surface of tertiary circuit pattern film 30 by roller 50 is moved by side to opposite side from one in rotation.Thereby, show that sintered body 5 distortion are to cooperate the interior shape of via hole 4.
Next, in circuit pattern connects technology, the circuit pattern 3 of a plurality of circuit pattern films is carried out electric coupling.At first, the first circuit pattern film 10 is arranged on a plurality of, for example, on two the 4th circuit pattern films 40.The first circuit pattern film 10 and two the 4th circuit pattern films 40 are stacked as follows, and each first surface that promptly is formed with circuit pattern 3 on it is arranged on downside, and circuit pattern 3 is towards the link 6 of adjacent circuit pattern film.Subsequently, by using the vacuum hotpressing device carrying out between the period of heating, pressure is applied to the upper surface of the first circuit pattern film 10 and the lower surface of minimum the 4th circuit pattern film 40.For example, the vacuum hotpressing device is operated under the temperature in about 250 ℃ to 350 ℃ scopes, and pressure limit is that 1MPa arrives about 10MPa, the time at about 10 minutes in about 20 minutes scope.
Thereby two the 4th pattern films 40 and the first circuit pattern film 10 are heat-sealings and complete.As a result, formation multilayer board 100 as shown in Figure 4.In this multilayer board 100, the circuit pattern 3 of adjacent circuit pattern film carries out electric coupling by the link in the via hole 46.
As mentioned above, this manufacture method of multilayer board 100 comprises that etch process, via hole are provided with technology, sintered body insertion process, sintered body technique for fixing and are connected technology with circuit pattern.In etch process, form circuit pattern 3 attached to the metal level on the first surface of resin molding 12 by etching.Be provided with in the technology at via hole, via hole 4 is formed in the resin molding 1, extends to circuit pattern 3 from second surface.In the sintered body insertion process, some sintered bodies in the sintered body of being made by conducting particles 5 are inserted in the corresponding via hole 4.In the sintered body technique for fixing, sintered body 5 is fixed in the via hole 4, make it adhere to the surface of the circuit pattern 3 that is positioned at via hole 4 bottoms.Thereby, form the 4th circuit pattern film 40.Connect in the technology stacked a plurality of the 4th circuit pattern films 40, and of link 6 electric coupling of the circuit pattern 3 of multiple stratification by making by sintered body 5 at circuit pattern.
In this manufacture method, the sintered body 5 that respectively has preliminary dimension is arranged in the via hole 4.Therefore, conductive materials can stably be fixed in the via hole 4.So, can avoid the shortage or the fragmentation of conductive materials in the via hole 4.In addition, also can avoid conductive materials from via hole 4, to overflow.Owing to can being filled into electrocondution slurry in the via hole 4, circuit pattern 3 realizes electric coupling, so do not need to be used for the diaphragm of filled conductive slurry.Therefore, but simplified manufacturing technique.And, can avoid the disengaging of issuable electrocondution slurry or overflowing of electrocondution slurry when removing diaphragm.
(second embodiment)
Manufacture method according to the multilayer board 100A of second embodiment of the invention now will be described.In this manufacture method, it is different that via hole is provided with those technologies of describing among technology, sintered body insertion process and the circuit pattern connection technology and first embodiment.And, the sintered body technique for fixing that in this manufacture method, need in first embodiment, not describe.Other technologies then are similar to the technology described in first embodiment.Therefore, the description of these other technologies will be omitted.
Be provided with in the technology at this via hole, via hole 4 is set to have such opening diameter, promptly the circuit pattern 3A of adjacent circuit film can be filled in the via hole 4 in circuit pattern connection technology.
In the sintered body insertion process, some sintered body 5A that have with sintered body 5 analogous components inject in the corresponding via hole 4.Thereby, form tertiary circuit pattern film 30A.The height of sintered body 5A is less than the degree of depth of via hole 4.Therefore, sintered body 5A is not projected into the outside of resin molding 1 from the openend of via hole 4.
That is to say that the upper surface (that is the surface of exposure) that is placed in each sintered body 5 in the via hole 4 is lower than near the predetermined distance in the surface of openend of a corresponding via hole 4.This preset distance is less than or equal to the thickness of circuit pattern 3A.The size of sintered body 5A is different from the size of sintered body 5 among first embodiment.Yet sintered body 5A can form in the mode that is similar to sintered body 5.
And then sintered body insertion process is carried out and is connected technology as Fig. 5 A with the circuit pattern shown in Fig. 5 B.
At first, the first circuit pattern film 10A is arranged on a plurality of, for example on three tertiary circuit pattern film 30A and the 30B.For example, be similar to the 3rd pattern film 30 as shown in Fig. 1 C, tertiary circuit pattern film 30B has circuit pattern 3.The first circuit pattern film 10A and tertiary circuit pattern film 30A and 30B are stacked as follows, and each first surface that promptly is formed with circuit pattern 3 or 3A on it is arranged on downside and each circuit pattern 3A is filled into the via hole 4 that is arranged in each circuit pattern 3A below.
Sintered body 5 in each circuit pattern 3A contact via hole 4 of tertiary circuit pattern film 30A.The upper surface of the first circuit pattern film 10A and the lower surface of the 3rd pattern film 30B are exerted pressure in heating process by using the vacuum hotpressing device.For example, carry out this vacuum hotpressing under the following conditions, the temperature in promptly about 250 ℃ to 350 ℃ scopes, pressure limit be about 1MPa to 10MPa, the time greatly about 10 minutes in about 20 minutes scope.
Thereby the 3rd pattern film 30A and 30B and the first circuit pattern film 10A are heat-sealings and complete.As a result, the multilayer board 100A of formation shown in Fig. 5 B.In this multilayer board 100A, the circuit pattern 3 of adjacent circuit pattern film and 3A realize electric coupling by the sintered body 5A in the via hole 4.
Because the sintered body 5A that is arranged in the via hole 4 has been applied in predetermined pressure, so sintered body 5A contacts with the surface of circuit pattern 3A.Therefore, tin composition in sintered body 5 and the mutual solid-state diffusion of copper component among circuit pattern 3 and the 3A, and between sintered body 5A and circuit pattern 3 and 3A, form the solid-state diffusion layer.Thereby, but electric coupling multilayer circuit pattern 3 and 3A.
As mentioned above, this manufacture method of multilayer board 100A comprises etch process, via hole is provided with technology, sintered body insertion process and circuit pattern and connects technology.In etch process, form circuit pattern 3A attached to the metal level on the first surface of resin molding 12 by etching.Be provided with in the technology at via hole, via hole 4 is set to extend through resin molding 1 from second surface, arrive circuit pattern 3A.In the sintered body insertion process, some sintered body 5A are inserted in the corresponding via hole 4, thereby form circuit pattern film 30A.In this case, each sintered body 5 has its size that can not be projected into the outside from via hole.Connect in the technology at circuit pattern, tertiary circuit pattern film 30A hot pressing is touched the state of the sintered body 5A in the via hole 4 to circuit pattern 3A.Thereby, the circuit pattern 3 of electric coupling multiple stratification.
In this manufacture method, can obtain and the first embodiment similar effects.In addition, finish simultaneously because be used for sintered body 5A is fixed on the electric coupling of the circuit pattern 3A of the technology of via hole 4 and multiple stratification, so but simplified manufacturing technique.
(the 3rd embodiment)
To Fig. 6 D manufacture method according to the sintered body of third embodiment of the invention is described hereinafter with reference to Fig. 6 A.Sintered body by this manufacture method manufacturing can be used for the manufacture method according to the multilayer board of first and second embodiment.
At first, tin particle 71 and silver particles 73 are added in the solvent 72, and mix formation electrocondution slurry 70.For example, silver particles 73 has average particle size and the about 1.2m of about 1 μ m
2The particular table area of/g.Tin particle 71 has average particle size and the about 0.5m of about 5 μ m
2The surface area of/g.For example, solvent 72 comprises terpinol.The resinous principle that comprises solvent 72 is as the adhesive that keeps all conducting particles shapes.The tin content of all conducting particless is similar to the tin content of first embodiment.For example, silver particles 73 is about 65:35 with the content ratio of tin particle 71.
By using the slurry printing of metal mask 80, the electrocondution slurry 70 that will comprise the conducting particles aggregation forms has reservation shape.Metal mask 80 has the through hole 81 of a plurality of reservation shapes.For example, each through hole 81 internal diameter of the degree of depth of about 50 μ m being arranged and being approximately 100 μ m.Metal mask 80 is arranged on the substrate 82 with stripping feature.For example, substrate 82 is made up of fluororesin.The electrocondution slurry 70 that comprises tin particle 71, silver particles 73 and solvent 72 of scheduled volume is arranged on the surface of metal mask 80.Subsequently, by using brush 83 that electrocondution slurry 70 is distributed on the whole surface of metal mask 80.Thereby, as shown in Figure 6A, electrocondution slurry 70 is filled in the through hole 81 of metal mask 80.
Shown in Fig. 6 B, when lifting metal mask 80 vertically, a plurality of electrocondution slurries 70 with plate-like are retained on the substrate 82.Each dish has and essentially identical side view of the inner surface of through hole 81 and the height identical with the thickness of metal mask 80.
Next, shown in Fig. 6 C, the electrocondution slurry 70 of plate-like is sintering under the Celsius temperature of about 260 degree.Thereby, form sintered body 74.Can be by for example using, general reflow ovens, opposing steam flow stove, atmospheric combustion stove or box type furnace are carried out this heat treatment.Heat treatment can be carried out under the reducing atmosphere of this thin assembly oxidation being used to prevent.
When electrocondution slurry 70 sintering, comprise solvent 72 evaporations and the drying of terpinol, and tin particle 71 and silver particles 73 mixing.The fusing point of tin particle 71 approximately is 232 degrees centigrade.Therefore, when heating-up temperature arrives 260 degrees centigrade, on 71 fusings of tin particle and the surface attached to silver particles 73.When heat treatment remained on above state, the tin of fusing was from the diffusion into the surface of silver particles.Thereby, form the sintered body of making by tin and silver 74.
Next, shown in Fig. 6 D, use cleaning agent 83 to clean sintered body 74 to remove carbide.Sintered body 74 after the cleaning is dried, thereby is provided for the sintered body 5 and the 5A of sintered body insertion process.
As mentioned above, the electrocondution slurry 70 that comprises tin particle 71, silver particles 73 and solvent 72 forms reservation shapes and carries out sintering by heat treatment.Subsequently, clean sintered body 74, thereby be provided for the sintered body 5 and the 5A of sintered body insertion process with the removal carbide.
In this manufacture method, use metal mask 80 be shaped sintered body 5 and 5A.Therefore, sintered body 5 and 5A can high accuracy produce in enormous quantities, and have improved conductive characteristic and the adhesion characteristic of multilayer board 100 and 100A.
(other embodiment)
Though fully described the present invention, should be noted that for a person skilled in the art various changes and modification will be conspicuous in conjunction with preferred embodiment with reference to accompanying drawing.
In above-mentioned first and second embodiment, as an example, resin molding 1 is by forming by weight at polyether-ether-ketone resin about 65% to 35% and the polyetherimide resin about 35% to 65%.Resin molding 1 also can comprise polyether-ether-ketone resin, polyetherimide resin and non-conductive inserts.Perhaps, resin molding 1 can comprise polyether-ether-ketone (PEEK) or Polyetherimide (PEI).
As an example, have three layers according to the multilayer board 100 of first embodiment, have four layers according to the multilayer board 100A of second embodiment.As long as the circuit pattern that multilayer board 100 and 100A have multiple stratification, the quantity of multilayer circuit board is not limited to above example.
Claims (15)
1, a kind of manufacturing multilayer board (100, method 100A) comprises:
Preparation has a plurality of insulated substrates (1) of first surface and second surface separately;
On each described first surface of described a plurality of insulated substrates (1), form circuit pattern (3,3A) with form a plurality of described circuit patterns (3,3A);
A plurality of via holes (4) are set, and described a plurality of via holes extend through corresponding insulation substrate described a plurality of insulated substrate (1) from a side of described second surface, thus arrive described a plurality of circuit pattern (3,3A) in corresponding circuit pattern;
With a plurality of sintered bodies (5,5A) some sintered bodies in are inserted in the corresponding via hole in described a plurality of via hole (4), the aggregation by a plurality of conducting particless of sintering (71,73) form described a plurality of sintered body (5,5A);
With described a plurality of sintered bodies (5,5A) be fixed in described a plurality of via hole (4); And
Stacked described a plurality of insulated substrates (1) and by described a plurality of sintered bodies (5,5A) and with described a plurality of circuit patterns (3,3A) electric coupling.
2, method according to claim 1, wherein:
Described conducting particles (71,73) comprises silver particles (73) and tin particle (71).
3, method according to claim 2, wherein:
Tin content in all conducting particless (71,73) arrives in about 80% the scope about 20% by weight.
4, method according to claim 3, wherein:
Tin content in all conducting particless (71,73) is by weight in about scope of 30% to 50%.
5, method according to claim 1, wherein:
The ratio of the thickness of each insulated substrate in the full-size of each sintered body in described a plurality of sintered body (5) and the described a plurality of insulated substrate (1) is in about scope of 1 to 1.4.
6, method according to claim 5, wherein:
The ratio of the thickness of each insulated substrate in the full-size of each sintered body in described a plurality of sintered body (5) and the described a plurality of insulated substrate (1) is in about scope of 1 to 1.3.
7, method according to claim 1, wherein:
When being fixed to described a plurality of sintered bodies (5) in described a plurality of via hole (4), make each the sintered body distortion in described a plurality of sintered body (5).
8, method according to claim 7, wherein:
In the time of in the corresponding via hole that some sintered bodies in described a plurality of sintered bodies (5) is inserted in described a plurality of via hole (4), has the gap between the corresponding via hole in the more described sintered bodies in described a plurality of sintered bodies (5) and the described a plurality of via hole (4); And
When being fixed to described a plurality of sintered bodies (5) in described a plurality of via hole (4), the deflection of described a plurality of sintered bodies (5) is received in the described gap.
9, according to each described method in the claim 1 to 8, the manufacture method of wherein said a plurality of sintered bodies (5) comprising:
The conducting particles (71,73) that will comprise silver particles (73) and tin particle (71) mixes with solvent (72) so that slurry (70) to be provided;
By using mask (80) that described slurry (70) is formed reservation shape;
The described slurry of sintering (70); And
Clean the slurry of sintering (74) to remove carbide.
10, the method for a kind of manufacturing multilayer board (100A) comprising:
Preparation has a plurality of insulated substrates (1) of first surface and second surface separately;
On each described first surface of described a plurality of insulated substrates (1), form circuit pattern (3A) to form a plurality of described circuit patterns (3A);
Form a plurality of via holes (4), described a plurality of via holes extend through corresponding insulated substrate described a plurality of insulated substrate (1) from a side of described second surface, thereby arrive the related circuit pattern in described a plurality of circuit pattern (3A);
Some sintered bodies in described a plurality of sintered bodies (5A) are inserted in the corresponding via hole in described a plurality of via hole (4), by a plurality of conducting particless (71 of sintering, 73) aggregation forms described a plurality of sintered body (5A), and the height of described a plurality of sintered bodies (5A) is less than the degree of depth of described a plurality of via holes (4);
So that some circuit patterns in described a plurality of circuit pattern (3A) enter the stacked described a plurality of insulated substrates of the mode of the corresponding via hole in described a plurality of via hole (4) (1); And
In heating process to stacked insulated substrate (1) exert pressure, make the corresponding sintered body in described a plurality of sintered bodies (5A) in more described circuit patterns and the corresponding via hole (4) in described a plurality of circuit pattern (3A) contact, and described a plurality of circuit pattern (3A) by described a plurality of sintered bodies (5,5A) and electric coupling.
11, method according to claim 10, wherein:
Described conducting particles (71,73) comprises silver particles (73) and tin particle (71).
12, method according to claim 11, wherein:
Tin content in all conducting particless (71,73) arrives in about 80% the scope about 20% by weight.
13, method according to claim 12, wherein:
Tin content in all conducting particless (71,73) arrives in about 50% the scope about 30% by weight.
14, method according to claim 10, wherein
In the time of in the corresponding via hole that the more described sintered bodies in described a plurality of sintered bodies (5A) is inserted in described a plurality of via hole (4), the exposed surface of the more described sintered bodies in described a plurality of sintered bodies (5A) is arranged in the position that has preset distance with the openend of the corresponding via hole of described a plurality of via holes (4); And
Described preset distance is less than or equal to the thickness of described a plurality of circuit pattern (3A).
15, according to each described method in the claim 10 to 14, the manufacture method of wherein said a plurality of sintered bodies (5A) comprising:
The conducting particles (71,73) that will comprise silver particles (73) and tin particle (71) mixes with solvent (72) to form slurry (70);
By using mask (80), described slurry (70) is formed reservation shape;
The described slurry of sintering (70); And
Clean the slurry of sintering (74) to remove carbide.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007224596A JP2009059814A (en) | 2007-08-30 | 2007-08-30 | Manufacturing method of multilayer printed board |
| JP224596/2007 | 2007-08-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101378634A true CN101378634A (en) | 2009-03-04 |
Family
ID=40299369
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2008102142887A Pending CN101378634A (en) | 2007-08-30 | 2008-08-29 | Method of manufacturing multilayer printed circuit board |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20090057265A1 (en) |
| JP (1) | JP2009059814A (en) |
| KR (1) | KR20090023130A (en) |
| CN (1) | CN101378634A (en) |
| DE (1) | DE102008045003A1 (en) |
| TW (1) | TW200930197A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103096617A (en) * | 2011-11-07 | 2013-05-08 | 株式会社电装 | Electrically conductive material and electronic device using same |
| CN114446168A (en) * | 2022-01-24 | 2022-05-06 | Tcl华星光电技术有限公司 | Manufacturing method of array substrate and array substrate |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2010113448A1 (en) * | 2009-04-02 | 2012-10-04 | パナソニック株式会社 | Circuit board manufacturing method and circuit board |
| JP2011018727A (en) * | 2009-07-08 | 2011-01-27 | Fujikura Ltd | Circuit wiring board, and method of manufacturing the same |
| JP2011018728A (en) * | 2009-07-08 | 2011-01-27 | Fujikura Ltd | Laminated wiring board, and method of manufacturing the same |
| CN103796418B (en) * | 2012-10-31 | 2016-12-21 | 重庆方正高密电子有限公司 | A kind of circuit board and the manufacture method of circuit board |
| KR101633013B1 (en) * | 2012-12-31 | 2016-06-24 | 주식회사 아모그린텍 | Flexible printed circuit board |
| DE102013208387A1 (en) * | 2013-05-07 | 2014-11-13 | Robert Bosch Gmbh | Silver composite sintered pastes for low temperature sintered joints |
| KR101882576B1 (en) | 2016-06-02 | 2018-07-27 | 한양대학교 산학협력단 | Light sintering device having protecting damage to substrate |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3057924B2 (en) * | 1992-09-22 | 2000-07-04 | 松下電器産業株式会社 | Double-sided printed circuit board and method of manufacturing the same |
| US5401913A (en) * | 1993-06-08 | 1995-03-28 | Minnesota Mining And Manufacturing Company | Electrical interconnections between adjacent circuit board layers of a multi-layer circuit board |
| JP2001024323A (en) | 1999-07-12 | 2001-01-26 | Ibiden Co Ltd | Method for filling conductive paste and manufacture of single sided circuit board for multilayer printed wiring board |
| DE60030743T2 (en) * | 1999-07-12 | 2007-09-06 | Ibiden Co., Ltd., Ogaki | Method for producing a printed circuit board |
| JP3473601B2 (en) * | 2000-12-26 | 2003-12-08 | 株式会社デンソー | Printed circuit board and method of manufacturing the same |
| JP2003133366A (en) * | 2001-10-25 | 2003-05-09 | Texas Instr Japan Ltd | Semiconductor device and manufacturing method therefor |
-
2007
- 2007-08-30 JP JP2007224596A patent/JP2009059814A/en active Pending
-
2008
- 2008-08-12 TW TW097130661A patent/TW200930197A/en unknown
- 2008-08-21 KR KR1020080081655A patent/KR20090023130A/en not_active Application Discontinuation
- 2008-08-26 US US12/230,219 patent/US20090057265A1/en not_active Abandoned
- 2008-08-29 DE DE102008045003A patent/DE102008045003A1/en not_active Withdrawn
- 2008-08-29 CN CNA2008102142887A patent/CN101378634A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103096617A (en) * | 2011-11-07 | 2013-05-08 | 株式会社电装 | Electrically conductive material and electronic device using same |
| CN114446168A (en) * | 2022-01-24 | 2022-05-06 | Tcl华星光电技术有限公司 | Manufacturing method of array substrate and array substrate |
| CN114446168B (en) * | 2022-01-24 | 2024-02-09 | Tcl华星光电技术有限公司 | Manufacturing method of array substrate and array substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200930197A (en) | 2009-07-01 |
| KR20090023130A (en) | 2009-03-04 |
| DE102008045003A1 (en) | 2009-03-05 |
| US20090057265A1 (en) | 2009-03-05 |
| JP2009059814A (en) | 2009-03-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101378634A (en) | Method of manufacturing multilayer printed circuit board | |
| US9545017B2 (en) | Structures for z-axis interconnection of multilayer electronic substrates | |
| JP2004506309A (en) | Molded electronic package, manufacturing method and shielding method | |
| CN100456467C (en) | Silicon chip carrier with conductive through-VIAS and method for fabricating same | |
| EP3413693B1 (en) | Highly conductive transparent glass-based circuit board | |
| KR102655113B1 (en) | Application of electrical conductors to an electrically insulating substrate | |
| JP5638588B2 (en) | Connection method between boards | |
| JP2002374067A (en) | Printed board and manufacturing method therefor | |
| JPH0482292A (en) | Manufacture of three-dimensional circuit board | |
| CN104093271A (en) | Method for reducing welding hollows of LTCC substrate and metal base plate and LTCC substrate structure | |
| CN110972403A (en) | Forming method of fine embedded circuit based on nano copper | |
| CN104561989B (en) | Cold spraying and copper plating method for aluminum silicon carbide and electronic packaging bottom plate obtained by same | |
| TW202107496A (en) | Thick film resistors having customizable resistances and methods of manufacture | |
| CN103874345A (en) | Method for manufacturing multilayer microwave circuit by using ceramic substrate | |
| CN104470262A (en) | Three-dimensional circuit interlayer connection method based on soldering tin welding technology | |
| RU2711239C2 (en) | Metallisation method of ceramics using metal-coated tape | |
| JP5083908B2 (en) | Wiring board manufacturing method | |
| WO2017133613A1 (en) | Highly conductive transparent laminated glass article | |
| JP2018200975A (en) | Metallic film formation product and method for manufacturing the same | |
| CN203134738U (en) | An over-current over-voltage protection element | |
| CN112235936A (en) | High-stability high-frequency mixed pressing plate for 5G communication equipment and manufacturing method thereof | |
| KR20140099395A (en) | Method for manufacturing flexible printed circuit board, and flexible printed circuit board manufactured by the method | |
| KR101336635B1 (en) | Method for manufacturing cavity PCB | |
| CN117693120A (en) | Manufacturing method for hole filling metallization through conductive paste sintering | |
| KR102062000B1 (en) | Plate heater |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Open date: 20090304 |