CN103796418B - A kind of circuit board and the manufacture method of circuit board - Google Patents
A kind of circuit board and the manufacture method of circuit board Download PDFInfo
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- CN103796418B CN103796418B CN201210427918.5A CN201210427918A CN103796418B CN 103796418 B CN103796418 B CN 103796418B CN 201210427918 A CN201210427918 A CN 201210427918A CN 103796418 B CN103796418 B CN 103796418B
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- multilamellar
- conducting block
- daughter board
- insulating barrier
- circuit board
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Abstract
The invention discloses the manufacture method of a kind of circuit board and circuit board, this circuit board includes: the first multilamellar daughter board of overlapping and the second multilamellar daughter board, each multilamellar daughter board includes the wiring substrate of at least two-layer；First insulating barrier, is configured on first of described first multilamellar daughter board；Second insulating barrier, is configured on second of described second multilamellar daughter board, and described first is adjacent face with described second, and described second insulating barrier contacts connection with described first insulating barrier；First conducting block, is embedded in the first window of described first insulating barrier and is arranged on described first；Second conducting block, is arranged at described second and above and runs through described second insulating barrier, and be electrically connected at described first conducting block, so that described first multilamellar daughter board is electrically connected with described second multilamellar daughter board.
Description
Technical field
The present invention relates to printed circuit board manufacture field, particularly relate to a kind of circuit board and the making side of circuit board
Method.
Background technology
Along with consumption electronic products function is more and more, volume develops toward more frivolous and short and small direction, institute
Progress greatly with process technique complexity the most day by day, therefore on circuit board with the wiring density of its internal printed circuit board
Between number of elements increase, the continuous density of layout, laminate, interconnection density increases, and the number of plies of circuit board is also got over
Coming the most, although some number of plies is few, but the thickness of insulating barrier is big especially, so the manufacture difficulty of circuit board
Also sharply increase, be mainly manifested in level to level alignment degree, hole and electroplate.
Specifically, overlapping para-position gained tolerance increases with the overlapping number of plies, and grafting material is (such as glass fibre glue
Sheet) harmomegathus than wayward cause pressing after easy dystopy；Carrying out machine drilling after pressing can be because of the number of plies
The highest, gross thickness is blocked up causes frictional force too high, causes the easy broken needle of drill bit, adds the behaviour of machine drilling
Making high heat produced by parameter adjustment and frictional force, can setting due to wiring board at through hole longitudinal direction radiating effect
The meter number of plies, gross thickness increase and reduce, and therefore cross hoarding of frequent fever and the resin of through-hole wall can be caused to bounce back
Greatly, the planarization of inwall is affected；It addition, thickness of slab is too high with the aspect ratio in aperture more affects follow-up plating not
Easily or form cavity or conductive layer thickness crosses the bad phenomenon such as thin.In order to solve above-mentioned technical problem, existing skill
Art mainly uses following two method:
Method one: use prominent copper billet (or its distressed structure) to penetrate insulation film, connect two or two
Above multilamellar daughter board.
Method two: connect two or more multilamellar daughter boards with conducting resinl, it is achieved increase layer, the most first make
Two or more multilamellar daughter boards, stamp tin cream on daughter board link position, by multilamellar daughter board with window after exhausted
Edge film combination, then carry out pressing.
The present inventor, during realizing the present invention, finds that prior art at least has the disadvantages that
Method one: the connection copper face between multilamellar daughter board is only contact and connects, and connectivity and reliability all exist
The biggest inefficacy hidden danger.
Method two: the method easily occurs that sliding causes Joint failure.
Summary of the invention
The invention provides the manufacture method of a kind of circuit board and circuit board, in order to solve that prior art connects
Connectivity during multiple multi-layer sheet and the highest technical problem of reliability.
One aspect of the present invention provides a kind of circuit board, including: the first multilamellar daughter board of overlapping and straton more than second
Plate, each multilamellar daughter board includes at least two-layer wiring substrate；First insulating barrier, is configured at described first multilamellar
On first of daughter board；Second insulating barrier, is configured on second of described second multilamellar daughter board, and described
One side is adjacent face with described second, and described second insulating barrier contacts connection with described first insulating barrier；
First conducting block, is embedded in the first window of described first insulating barrier and is arranged on described first；Second
Conducting block, is arranged at described second and above and runs through described second insulating barrier, and be electrically connected at described first
Conducting block, so that described first multilamellar daughter board is electrically connected with described second multilamellar daughter board.
Preferably, described circuit board also includes conductive layer, fuses in described first window, and described second leads
Electricity block fuses in described conductive layer, is electrically connected with described first conducting block.
Preferably, described conductive layer is leypewter.
Preferably, the fusing point of described conductive layer is less than the first multilamellar daughter board and described straton more than second described in pressing
Temperature during plate.
Preferably, described first conducting block is plate-like conducting block.
Preferably, described second conducting block is taper projection or stud bumps.
Preferably, described first conducting block is copper dish, and described second conducting block is copper post.
Another aspect of the present invention additionally provides the manufacture method of a kind of circuit board, be applied to the first multilamellar daughter board and
Between second multilamellar daughter board, in described first multilamellar daughter board and described second multilamellar daughter board each daughter board include to
Few two-layer wiring substrate, described method includes: arranges first on first of described first multilamellar daughter board and leads
Electricity block；Described first arrange the first insulating barrier, wherein, at described first insulating barrier with described
Having first window on the position that one conducting block is corresponding, described first conducting block exposes in described first window；
Second of described second multilamellar daughter board arranges the second conducting block；Described second multilamellar daughter board is formed
Second insulating barrier, wherein, the position corresponding with described second conducting block of described second insulating barrier has
Two windows so that described second conducting block passes described second window；Described first multilamellar daughter board is passed through institute
First face of stating is positioned over second of described second multilamellar daughter board upper and pressing so that described second conducting block and
Described first conducting block is electrically connected with.
Preferably, before described pressing, described method also includes: by described first window, described
A conductive layer is covered so that at the first multilamellar daughter board described in pressing and the second multilamellar daughter board on first conducting block
During, described second conducting block fuses in described first conductive layer of molten condition, it is achieved described first
Conducting block and the electric connection of described second conducting block.
Preferably, first of described first multilamellar daughter board arranges the first conducting block, particularly as follows: in institute
State the first conducting block that plate-like is set on first of the first multilamellar daughter board；At described second multilamellar daughter board
Second conducting block is set on two, particularly as follows: it is convex to arrange taper on second of described second multilamellar daughter board
Block or stud bumps.
The present invention has the beneficial effect that:
The present invention compared with prior art, uses on two adjacent multiple-plate adjacent two faces, one
Arranging the first conducting block, another arranges the second conducting block so that by the first conducting block on two multi-layer sheet
It is electrically connected with the second conducting block, so the connection reliability of the connected mode of the present invention is more preferable, it is not easy to send out
The situation of raw Joint failure.
Further, also having a conductive layer on the first conducting block, the first conducting block and the second conducting block fuse into
Conductive layer is electrically connected with, so that the electric connection between the first conducting block and the second conducting block is more
Add reliable.
Accompanying drawing explanation
Figure 1A-Fig. 1 C is the manufacturing process schematic diagram of multilamellar daughter board in one embodiment of the invention；
Fig. 2 is the flow chart of the method for attachment of multilamellar daughter board in one embodiment of the invention；
Fig. 3 A-Fig. 3 C is the manufacturing process schematic diagram of circuit board in one embodiment of the invention；
Fig. 4 A-Fig. 4 C is another manufacturing process schematic diagram of circuit board in one embodiment of the invention.
Detailed description of the invention
One embodiment of the invention provides a kind of circuit board and the manufacture method of circuit board, refer to Figure 1A to figure
1C, for the Making programme schematic diagram of multilamellar daughter board in the present embodiment.Refer to Figure 1A to Fig. 1 C, by multiple
The wiring substrate L1 to L5 having completed configuration overlaps para-position, and one step press is to form straton more than first
Plate 100.Afterwards, then carry out holing and electroplating process, to complete interlayer conduction each wiring substrate L1 to L5
Conductive hole 101, the e.g. through hole of electroplating of conductive material 102.Specifically, circuit base plate 100 is low
The multilamellar daughter board of the number of plies, such as, have the wiring substrate of 8 layers to 18 layers, and Figure 1A only illustrates a part of circuit
Base material L1 to L5, remaining omission is not drawn into.In general, the number of plies of the first multilamellar daughter board 100 the highest,
Thickness is the thickest, and the process capability of board just requires higher, if the number of plies is more than more than 20 layers, and existing processing procedure machine
Platform is difficult to meet yields and the requirement of aligning accuracy difference, therefore the embodiment of the present invention is first by the first multilamellar daughter board 100
The number of plies or THICKNESS CONTROL in certain scope (depending on process capability), with reduce overlapping para-position error
And avoid that the number of plies is the highest, the blocked up bad causing boring and plating of gross thickness.
In the first multilamellar daughter board 100, the most each wiring substrate can include a layer insulating and one side
Or double-side copper circuit, also include the multiple resin plate P1 to P4 between wiring substrate, resin plate concrete example
Glass epoxy resin in this way, with the copper wire engaging resin plate P1 to P4 opposite sides that is electrically insulated, but respectively
Individual wiring substrate L1 to L5 can be electrically connected to each other by the conductive hole 101 of interlayer conduction, to transmit signal.
The conductive material of conductive hole 101 does not limit and is formed with plating mode.Additionally, the embodiment of the present invention do not limit with
The mode of overlapping para-position makes the first multilamellar daughter board 100 of the low number of plies, and Layer increasing method also can be used to make, its
The blind hole (Blind Hole) using interlayer conduction is electrically connected with each wiring substrate L1 with buried via hole (Buried Hole)
To L5, lower through-hole taking up room on plate face can be saved, make limited outer layer area can try one's best to connect up and
Soldering part.Layer increasing method multi-layer sheet is developed so far the most multiple process technique and applies in commercial production, such as
SLC, FRL, DYCOstrate, Z-Link, ALIVH, HDI, different processing procedures uses different materials
And substrate, therefore also have nothing in common with each other on hole creating technology, such as, have photosensitive pore-forming, laser drill, plasma
Pit and chemistry pit, be not described in detail in this.
The second multilamellar daughter board 200 can be made by same method, next will be described in detail the first multilamellar daughter board
100 and second after multilamellar daughter board 200 completes, two or more the first multilamellar daughter board 100 of overlapping,
Second multilamellar daughter board 200 is combined into the Making programme of circuit board, the most how to connect the first multilamellar daughter board 100 He
Second multilamellar daughter board 200.
Refer to shown in Fig. 2, this method of attachment includes:
Step 210: the first conducting block is set on first of the first multilamellar daughter board 100；
Step 212: the first insulating barrier, wherein, conducting electricity with first at the first insulating barrier are set on the first face
Having first window on the position that block is corresponding, the first conducting block exposes in first window；
Step 214: the second conducting block is set on second of the second multilamellar daughter board 200；
Step 216: form the second insulating barrier on the second multilamellar daughter board 200, wherein, the second insulating barrier with
There is on the position that second conducting block is corresponding second window so that the second conducting block passes the second window；
Step 218: the first multilamellar daughter board 100 is positioned over by the first face the second of the second multilamellar daughter board 200
Also pressing on face, so that the second conducting block and the first conducting block are electrically connected with.
Referring next to Fig. 3 A to Fig. 3 C, in the present embodiment, if the first multilamellar daughter board 100 is positioned at
Upper strata, so in step 210, is specially in the bottom surface of the first multilamellar daughter board 100, i.e. first making
First conducting block, as shown in Figure 3A, makes the first conducting block 103 in the bottom surface of the first multilamellar daughter board 100,
First conducting block 103 for example, plate-like conducting block, can be specifically circular or polygonal plate-like, at this
In embodiment, plate-like conducting block specially surface is the electric conductor of plane；Further, the first conducting block 103
Make when being copper wire on the bottom surface making the first multilamellar daughter board 100, so the first conducting block 103 can
To be a part for the first multilamellar daughter board 100 outer copper foil originally, so such first conducting block 103
Difficult drop-off, and with copper wire connects reliable.
In other embodiments, the first conducting block 103 can also is that the electric conductor of other materials, can pass through
The mode such as welded is connected on the circuit of the first multilamellar daughter board 100.
Then, perform step 212, refer again to Fig. 3 B, the bottom surface of the first multilamellar daughter board 100 is arranged
First insulating barrier 104, in the present embodiment, can be first to suppress one on the bottom surface of the first multilamellar daughter board 100
Layer insulating, then uses the mode of laser and other equivalents to window the first insulating barrier 104, is formed
First window 105(refer to Fig. 3 C), the position of first window 105 is corresponding, so with the first conducting block 103
Afterwards by first window 105, the first conducting block 103 is exposed out.In the present embodiment, the first insulating barrier
104 e.g. glass epoxy resin, naturally it is also possible to be the insulating barrier of other materials.
In another embodiment, step 212 is performed, it is also possible to be formation the of first the first insulating barrier 104 being windowed
One window 105, is then pressed together on the bottom surface of the first multilamellar daughter board 100 by the first insulating barrier 104 having opened window,
Then the first conducting block 103 is exposed by first window 105.In the present embodiment, the first insulating barrier 104 example
Such as the glass epoxy resin for semi-solid preparation state, naturally it is also possible to be the insulating barrier of other materials.
It follows that perform step 214, refer to Fig. 4 A, it is assumed that the second multilamellar daughter board 200 is positioned at more than first
The lower floor of straton plate 100, then the second conduction is just set on the upper surface of multilamellar daughter board, i.e. second surface
Block 202.In the present embodiment, it is equally to continue on the outer copper foil 201 of the second multilamellar daughter board 200
Make the second conducting block 202, such as, by the way of graphic plating, produce the second conducting block 202, specifically come
Saying, the second conducting block 202 can be taper projection or stud bumps, can be copper product, it is also possible to
It it is other kinds of conductive material.
When the first conducting block 103 be copper dish, the second conducting block 202 for copper post time because being all to utilize first
The outer copper foil of multilamellar daughter board 100 and the second multilamellar daughter board 200 is made, so connectivity is reliable.
Please continue to refer to Fig. 4 B, after the second conducting block 202 completes, perform step 216, will have
The second insulating barrier 203 having the second window 204 is enclosed within the second conducting block 202 by the second window 204,
The size of the i.e. second window 204 is more than the size of the second conducting block 202 so that the second window 204 can overlap
On the second conducting block 202.
In one embodiment, when with first as the plane of reference, the height of the first conducting block 103 does not has first exhausted
When edge layer 104 is high, relative to second, the height of the second insulating barrier 203 to be less than the second conducting block 202
Height so that the second conducting block 202 is through the second window 204, and the thickness of the second conducting block 202 is little
In equal to the second insulating barrier 203 and the first insulating barrier 104 sum, so, when pressing the first multilamellar daughter board 100
During with the second multilamellar daughter board 200, the first conducting block 103 and the second conducting block 202 can be electrically connected with；
This situation such as the first conducting block 103 described in previous embodiment be copper dish, the second conducting block 202 be copper
Situation during post.The glass epoxy resin of the second insulating barrier 203 for example, semi-solid preparation state, naturally it is also possible to be
The insulating barrier of other materials, and the material of the material of the second insulating barrier 203 and the first insulating barrier 104 is permissible
Identical, it is also possible to different.
In another embodiment, it is also possible to when being with first for the plane of reference, the height of the first conducting block 103
Time identical with the first insulating barrier 104, the i.e. first conducting block 103 expose to that of the first insulating barrier 104
The lower surface of surface and the first insulating barrier 104 is generally flush with, then it is exhausted that the second conducting block 202 exposes to second
As long as the upper surface of surface also He the second insulating barrier 203 of edge layer 203 is generally flush with.
In other embodiments, the first conducting block 103 and the second conducting block 202 can also have other difference
Height dimension select, as long as can guarantee that the second conducting block 202 and the first conducting block 103 can be electrically connected with
, so those skilled in the art can select according to practical situation based on description of the invention.
Further, in the present embodiment, the second insulating barrier 203 is entangled by the second conducting block 202, so
During follow-up pressing is made, so sliding will not be produced.
It follows that refer to Fig. 4 C again, work as joint face, the i.e. first conducting block 103 and the second conducting block 202
After making, it is carried out step 218, will the first multilamellar daughter board 100 and the second multilamellar daughter board 200 be pressed together on
Together, circuit board is formed.Certainly, the quantity of the first multilamellar daughter board 100 and the second multilamellar daughter board 200 also may be used
For two or more, the present embodiment is only with two multilamellar daughter boards as example.
In practice, in addition to step 218 is last execution, the order of other steps can be according to reality
Situation is adjusted, the implementation process of the method by way of example only of the order in above-described embodiment, not uses
In limiting the present invention.
Further, in another embodiment, performing before step 218, also exposed first leading out
Covering the first conductive layer on electricity block 103, such as spraying, silk-screen, fill up first window 105, so
When the first multilamellar daughter board 100 and the second multilamellar daughter board 200 being pressed together, the second conducting block 202 will
Fuse in the first conductive layer of molten condition, be electrically connected with the first conducting block 103.
Specifically, because when pressing, pressing material temperature typically can reach more than 200 degrees Celsius,
And the fusing point of the first conductive layer just can become molten condition when being less than 200 degrees Celsius, then when the second conduction
After block 202 fuses into the first conductive layer of molten condition, just by the first conducting block 103 and the second conducting block 202
It is securely attached to together, there is the highest reliability.In practice, the fusing point of the first conductive layer is only
Pressing-in temp when pressing to be less than the first multilamellar daughter board 100 and the second multilamellar daughter board 200.
During practice, the first conductive layer such as can select leypewter, the fusing point of terne metal
It is 183 degree, when the first conducting block 103 and the second conducting block 202 are copper, after pressing, will be formed steady
Fixed signal bronze.It is, of course, also possible to selection tin cream, it is also possible to select other metal or alloy of equivalent to close
Gold.
Accordingly, based on same inventive concept, one embodiment of the invention provides a kind of circuit board, refer to
Figure 1A to Fig. 1 C, Fig. 3 A to Fig. 3 C, Fig. 4 A to Fig. 4 C, circuit board includes: the first multilamellar of overlapping
Daughter board 100 and the second multilamellar daughter board 200, each multilamellar daughter board includes at least two-layer wiring substrate；First insulation
Layer 104, is configured on first of the first multilamellar daughter board 100；Second insulating barrier 203, is configured at more than second
On second of straton plate 200, first is adjacent face with second, the second insulating barrier 203 and first
Insulating barrier 104 contact connects；First conducting block 103, is embedded in the first window 105 of the first insulating barrier 104
And be arranged on first；Second conducting block 202, is arranged at second and above and runs through the second insulating barrier 203,
And be electrically connected at the first conducting block 103, so that the first multilamellar daughter board 100 and the second multilamellar daughter board 200 are electrical
Connect.
Further, circuit board also includes conductive layer, fuses in first window 105, the second conducting block 202
Fuse in conductive layer, be electrically connected with the first conducting block 103.
In one embodiment, conductive layer is leypewter, and the fusing point of conductive layer is less than pressing the first multilamellar daughter board
100 and temperature during the second multilamellar daughter board 200.
In one embodiment, the first conducting block 103 is plate-like conducting block.
In another embodiment, the second conducting block 202 is taper projection or stud bumps.
In another embodiment, the first conducting block 103 is copper dish, and the second conducting block 202 is copper post.
The present invention compared with prior art, uses on two adjacent multiple-plate adjacent two faces, one
Arranging the first conducting block, another arranges the second conducting block so that by the first conducting block on two multi-layer sheet
It is electrically connected with the second conducting block, so the connection reliability of the connected mode of the present invention is more preferable, it is not easy to send out
The situation of raw Joint failure.
Further, also having a conductive layer on the first conducting block, the first conducting block and the second conducting block fuse into
Conductive layer is electrically connected with, so that the electric connection between the first conducting block and the second conducting block is more
Add reliable.
In this description, the present invention is described with reference to its specific embodiment, but, this area
Technical staff can carry out various change and modification without departing from the spirit and scope of the present invention to the present invention.This
Sample, if the present invention these amendment and modification belong to the claims in the present invention and equivalent technologies thereof scope it
In, then the present invention is also intended to comprise these change and modification.
Claims (8)
1. a circuit board, it is characterised in that including:
First multilamellar daughter board of overlapping and the second multilamellar daughter board, each multilamellar daughter board includes at least two sandwich circuit bases
Material；
First insulating barrier, is configured on first of described first multilamellar daughter board；
Second insulating barrier, is configured on second of described second multilamellar daughter board, described first with described the
Two is adjacent face, and described second insulating barrier contacts connection with described first insulating barrier；
First conducting block, is embedded in the first window of described first insulating barrier and is arranged on described first；
Second conducting block, is arranged at described second and above and runs through described second insulating barrier, and be electrically connected at
Described first conducting block, so that described first multilamellar daughter board is electrically connected with described second multilamellar daughter board；
Described circuit board also includes conductive layer, fuses in described first window, and described second conducting block fuses into
In described conductive layer, it is electrically connected with described first conducting block.
2. circuit board as claimed in claim 1, it is characterised in that described conductive layer is leypewter.
3. circuit board as claimed in claim 1, it is characterised in that the fusing point of described conductive layer is less than pressure
Close temperature when described first multilamellar daughter board and described second multilamellar daughter board.
4. circuit board as claimed in claim 1, it is characterised in that described first conducting block is that plate-like is led
Electricity block.
5. circuit board as claimed in claim 4, it is characterised in that described second conducting block is that taper is convex
Block or stud bumps.
6. circuit board as claimed in claim 1, it is characterised in that described first conducting block is copper dish,
Described second conducting block is copper post.
7. a manufacture method for circuit board, is applied between the first multilamellar daughter board and the second multilamellar daughter board,
In described first multilamellar daughter board and described second multilamellar daughter board, each daughter board includes at least two-layer wiring substrate, its
Being characterised by, described method includes:
First of described first multilamellar daughter board arranges the first conducting block；
Described first arrange the first insulating barrier, wherein, at described first insulating barrier with described first
Having first window on the position that conducting block is corresponding, described first conducting block exposes in described first window；
Second of described second multilamellar daughter board arranges the second conducting block；
Described second multilamellar daughter board forms the second insulating barrier, wherein, described second insulating barrier with described
There is on the position that second conducting block is corresponding second window so that described second conducting block passes described second window
Mouthful；
By described first window, described first conducting block covers a conductive layer；
Described first multilamellar daughter board is positioned over by described first face second of described second multilamellar daughter board
Upper also pressing, so that described second conducting block and described first conducting block are electrically connected with.
8. method as claimed in claim 7, it is characterised in that at the first of described first multilamellar daughter board
First conducting block is set on face, particularly as follows:
First of described first multilamellar daughter board arranges the first conducting block of plate-like；
Second of described second multilamellar daughter board arranges the second conducting block, particularly as follows:
Second of described second multilamellar daughter board arranges taper projection or stud bumps.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210427918.5A CN103796418B (en) | 2012-10-31 | 2012-10-31 | A kind of circuit board and the manufacture method of circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210427918.5A CN103796418B (en) | 2012-10-31 | 2012-10-31 | A kind of circuit board and the manufacture method of circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103796418A CN103796418A (en) | 2014-05-14 |
| CN103796418B true CN103796418B (en) | 2016-12-21 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210427918.5A Active CN103796418B (en) | 2012-10-31 | 2012-10-31 | A kind of circuit board and the manufacture method of circuit board |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106973492B (en) * | 2017-03-07 | 2019-03-05 | 深南电路股份有限公司 | A kind of PCB internal layer circuit interconnection architecture and its processing method |
| CN107257603B (en) * | 2017-06-20 | 2019-11-08 | 广州兴森快捷电路科技有限公司 | The production method of hole articulamentum, the production method of wiring board and wiring board |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101022698A (en) * | 2006-01-31 | 2007-08-22 | 索尼株式会社 | Printed circuit board assembly and method of manufacturing the same |
| CN201571253U (en) * | 2009-10-22 | 2010-09-01 | 欣兴电子股份有限公司 | High-layer circuit board |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009059814A (en) * | 2007-08-30 | 2009-03-19 | Denso Corp | Manufacturing method of multilayer printed board |
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2012
- 2012-10-31 CN CN201210427918.5A patent/CN103796418B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101022698A (en) * | 2006-01-31 | 2007-08-22 | 索尼株式会社 | Printed circuit board assembly and method of manufacturing the same |
| CN201571253U (en) * | 2009-10-22 | 2010-09-01 | 欣兴电子股份有限公司 | High-layer circuit board |
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| CN103796418A (en) | 2014-05-14 |
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