CN101364529A - Method for automatically downloading sequence number of integrated circuit - Google Patents
Method for automatically downloading sequence number of integrated circuit Download PDFInfo
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- CN101364529A CN101364529A CNA2007101755831A CN200710175583A CN101364529A CN 101364529 A CN101364529 A CN 101364529A CN A2007101755831 A CNA2007101755831 A CN A2007101755831A CN 200710175583 A CN200710175583 A CN 200710175583A CN 101364529 A CN101364529 A CN 101364529A
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Abstract
The invention discloses a method for automatically downloading an integrated circuit serial number, which comprises the following steps: (1) collecting information of each integrated circuit chip related to the integrated circuit serial number during the testing process of the integrated circuit chip; (2) converting the information related to the integrated circuit serial number to an integrated circuit serial number in a predetermined format according to a predetermined encoding mode; (3) downloading the integrated circuit serial number to a designated zone in an internal memorizer of the integrated circuit chip; and (4) checking the accuracy and the uniqueness of the downloaded integrated circuit serial number. The method can carry out chip testing and serial number downloading in a same operating process, so as to reduce operating links and save chip testing time.
Description
Technical field
The present invention relates to a kind ofly in the test process of integrated circuit, unique serial number that meets certain rule is downloaded to the method for the memory appointed area of integrated circuit (IC) chip inside automatically, belong to the ic test technique field.
Background technology
Some has the integrated circuit (IC) chip of specific function such as identification chip etc. need carry out the uniqueness sign to each chip of production and processing, and this uniqueness sign is exactly chip sequence number (serial number is called for short SN).The effect of chip sequence number is that the quality tracing for each chip provides sign, also can be used as a foundation distinguishing the chip true and false.The user can find the production and processing information of this chip and the test data of dispatching from the factory according to the SN information of chip.In the operational phase of chip, the unique serial number that utilizes special card reader to read to store in the chip can obtain the quality information of chip according to certain coding/decoding method.
At present, a kind of uniqueness identification method of generally taking is one group of binary sequence number of storage in the assigned address of the integrated memory of chip internal.The data format of serial number needs to satisfy the requirement of relevant unified standard as byte number, number of bits, coded system etc.The information that serial number comprises also will meet unified regulation, and the information that comprises usually has: the design manufacturer code of this chip, the testing time of this chip, the lot number and the numbering of this chip place wafer, the XY coordinate of this chip on wafer etc.Usually, the test phase after chip production processing is written to serial number in the memory area of appointment in the chip, then the accuracy of checking sequence number and uniqueness.
In application number was 200710048343.5 Chinese invention patent application, the method that a kind of integrated circuit random sequence number sign indicating number produces was disclosed.In this method, utilize in the integrated circuit manufacturing process because edge effect, the mismatch of the components and parts that the undesirable factors such as variation of ion injection and surface state effect and carrier mobility can cause, the high-gain amplifying circuit is detected not matching and be converted into corresponding with it digital level between components and parts, because this mismatch randomness between the components and parts is very strong, therefore use a plurality of amplifier circuit units can realize the generation of multidigit random sequence number.
But, just known to the inventor, still not having at present in the test process of integrated circuit, the maturation method that unique serial number that meets certain rule is downloaded to automatically the memory appointed area of integrated circuit (IC) chip inside comes out.
Summary of the invention
The object of the present invention is to provide a kind of method of automatically downloading sequence number of integrated circuit.Utilize this method, can generate unique serial number, and this serial number is downloaded to appointed area in this chip internal memory at each chip.
For realizing above-mentioned goal of the invention, the present invention adopts following technical scheme:
A kind of method of automatically downloading sequence number of integrated circuit is characterized in that comprising following step:
(1) in the test process of integrated circuit (IC) chip, gathers each chip information relevant with the integrated circuit serial number;
(2), the described information translation relevant with the integrated circuit serial number become the integrated circuit serial number of predetermined format according to predetermined encoding;
(3) described integrated circuit serial number is downloaded to appointed area in the integrated circuit (IC) chip internal storage;
(4) accuracy and the uniqueness of the described integrated circuit serial number of inspection download.
Wherein, in the described step (1),, read time, lot number, sheet number and the coordinate information of current chip under test in real time by communicating based on the gpib interface plate control integrated circuit test macro of IEEE 488 standards and full-automatic probe station.
In the described step (2), the information of each chip that will obtain is carried out from the decimal system to binary data transaction earlier, then described information is inserted assigned position according to the date of manufacturer's code, test chip, the lot number of wafer, the order of the X and Y coordinates of chip on wafer, thereby generate the integrated circuit serial number of predetermined format.
In the described step (3), after described integrated circuit (IC) chip is by all test events, just carry out integrated circuit serial number down operation.
In the described step (3), the serial number of chip under test is downloaded flow process change into the executable serial number download of integrated circuit test system resolution chart, and be loaded in the resolution chart memory of test macro;
Described integrated circuit test system is carried out described serial number and is downloaded resolution chart, finishes serial number the writing of appointed area in tested integrated circuit (IC) chip internal storage.
Described serial number is downloaded resolution chart: make the designated memory of chip under test inside be in write state, the designated memory of chip enters the pin input 1 of write state; Send the assigned address of storage sequence number to designated memory, the assigned address of the address pins input storage sequence number of chip; The serial number of the chip under test that send to generate to designated memory, the data pins of chip is imported corresponding serial number data; The output state of the output pin of while monitoring chip; Time sequence information comprises the operating frequency of chip, writes the time of the signal variation of control pin, address, data pins.
In the described step (4), integrated circuit test system operation resolution chart, the designated memory of chip under test is set to reading state, the initial address of the assigned address of storage sequence number in the input designated memory, read the content in designated memory zone, compare with correct serial number content, correct if serial number identical then chip is downloaded, otherwise mistake.
Integrated circuit serial number automatic downloading method provided by the present invention can finish chip testing in same operating process and serial number is downloaded, and has reduced operation link, has saved the testing time of chip.
Description of drawings
The present invention is further illustrated below in conjunction with the drawings and specific embodiments.
Fig. 1 is the data format schematic diagram of a typical chip sequence number,
Fig. 2 is the schematic diagram that the executable serial number of integrated circuit test system is downloaded resolution chart.
Embodiment
The downloading process of integrated circuit (IC) chip serial number comprises following step: acquisition sequence number information-formation sequence number-serial number writes chip-checking sequence number correctness.In this process, the technical problem underlying that needs to solve comprises following several aspects: quality information how to gather each chip in the test process of chip; Coded system according to the rules how converts the relevant information of this chip to the serial number of prescribed form; How the serial number that generates is downloaded to the appointed area in this chip internal memory; How to check the accuracy and the uniqueness of the serial number of download.Respectively this is launched detailed explanation below.
The test of chip needs integrated circuit test system and full-automatic probe station to finish jointly.Integrated circuit test system connects test adapter and contacts with wafer by probe, the test program of operation circuit, method of testing and test condition according to integrated circuit, some pin to each chip applies certain voltage or circuit, test the voltage or the electric current of some pin, logging test results, and, judge whether the performance of this chip meets the requirements according to predefined acceptability limit.The translation of full-automatic probe station control wafer guarantees that each chip on the wafer can both be tested, writes down lot number and the numbering and the XY coordinate of each chip on wafer of every wafer simultaneously.
In the test process of chip, the lot number of the testing time of each chip under test, place wafer and numbering, the information such as XY coordinate on wafer are brought in constant renewal in.How can be efficiently real-time collect these information, be one of major technology difficult problem.In the present invention,, read the time of current chip under test in real time, lot number, sheet number, information such as coordinate by being that the gpib interface plate control integrated circuit test macro of standard communicates with full-automatic probe station with IEEE 488.The gpib interface plate here can adopt existing multiple product, the AT-GPIB/TNTISA/EISA of NI company for example, the 82350A of Agilent etc.
With IEEE 488 is that GPIB (the General Purpose Interface Bus) universal standard bus interface board of standard has 8 bit digital parallel communication interfaces, more than transfer rate 1M byte/s, adopts 3 handshake lines.IEEE 488 is general in the world electronic instruments interface standards, has obtained using widely in all trades and professions electronic equipment.The gpib interface plate has sender (Talkers), recipient (Listeners) and effector (Controllers).The sender sends data message, and the recipient receives digital information, and the effector is computer normally, is in charge of the data flow on the bus and sends GPIB to equipment and order.
In this method, the relevant information of each chip that will obtain from full-automatic probe station by gpib interface generates the chip series number with specific format according to the generating algorithm of serial number.The serial number generating algorithm here is: the relevant information of each chip that will obtain is carried out data transaction earlier, usually the data by the gpib interface input are 10 system numbers, need convert 2 system numbers to, then relevant information is inserted assigned position according to the form of serial number, thereby generate chip series number with specific format.
For example the serial number of certain family chip is 48 bits, and data format as shown in Figure 1.Manufacturer's code (3) of 1 expression chip, 2,3,4 (7 of years representing test chip respectively, only write down back two Christian era year calendar) month (4) day (5), 5,6 represent the lot number (13) of wafer respectively and number (4), X (6) and Y (6) coordinate of 7,8 expression chips on wafer.For example manufacturer's code name of certain chip is " 001 ", in process test on December 30th, 2003, wafer is the 123rd batch the 15th piece, and coordinate is (23,21), then the serial number of this chip is " 001 0,000,011 1,100 11,110 0,000,001,111,011 1,111 010111010101 ".
Integrated circuit test system is written to the chip sequence number that generates in the memory area of appointment in the chip under test after whole test event tests of each chip are finished in real time.The designated memory zone here is such: chip under test inside may have a plurality of memory modules such as RAM, ROM, EEPROM, requires to be stored among the EEPROM as the serial number of fruit chip, and then EEPROM is the designated memory zone.If the memory space of the designated memory of certain chip-stored serial number is 1k, then designated memory comprises 1k memory cell, can store 1k binary number, and all the address of memory space is [83FF:8000] (16 system).The memory address of 48 binary sequence numbers of storage is [803F:8010] (16 system) if seek survival, and then [803F:8010] of designated memory is the designated memory zone.
In the serial number downloading process, the present invention has increased the test item recognition function specially.The test item recognition function requires and must just carry out chip sequence number down operation after chip is by all test events, has improved the download efficiency of chip sequence number so effectively.In the test process of chip, defective as a certain functional test of fruit chip, the test of this chip is ended so, and follow-up test event is no longer carried out, and this chip is judged as defective.Because underproof chip no longer carries out follow-up production procedure, can not enter operational phase, so underproof chip does not need the download sequence number.Test macro just carries out the serial number down operation to the chip of all items test passes at the following of this method control, so just can save time the raising download efficiency.
In the method, the serial number of chip under test is downloaded flow process change into the executable serial number download of integrated circuit test system resolution chart, and be loaded in the resolution chart memory of test macro.Resolution chart is made of jointly test vector and time sequence information.Test vector is meant the input/output signal state in each cycle of chip under test, is represented by character, and common 1/0 is used for representing input state, and L/H/ is used for representing output state.Time sequence information comprises the operating frequency of device, and time that input drive signal changes in one-period and output signal sampled time etc. of comparison.Fig. 2 has shown an instantiation of resolution chart, and wherein the test vector of input signal A is [10], and the test vector of output signal B is [HL]; t
PeriodBe the signal period, t
DriveBe the time that input signal in the one-period changes, t
CompareBe the time of in the one-period output signal being sampled.
Because the serial number that each chip need be downloaded has nothing in common with each other, so the resolution chart that each chip need be carried out also has nothing in common with each other.
The resolution chart of download sequence number is: make the designated memory of chip under test inside be in write state, the designated memory of chip enters pin input 1 (high level is effective) of write state; Send the assigned address of storage sequence number to designated memory, the assigned address of the address pins input storage sequence number of chip; The serial number of the chip under test that send to generate to designated memory, the data pins of chip is imported corresponding serial number data; The output state of the output pin of while monitoring chip; Time sequence information comprises the operating frequency of chip, writes the time of the signal variation of controlling pin, address, data pins etc., and concrete time value is set in software according to the performance of chip.
The serial number of chip under test is downloaded basic procedure: send control signal and make the designated memory of chip under test inside be in write state, send the initial address of the assigned address of storage sequence number to designated memory, send the serial number of the chip under test that generates to designated memory.The executable resolution chart of test macro is made of jointly the signal condition of each pin of chip under test and the temporal information of signal variation.Test macro is carried out the resolution chart that serial number is downloaded, and finishes writing of the designated memory zone of serial number in chip under test.
For the correctness and the uniqueness of the serial number that guarantees to write chip under test, download the serial number that finishes back automatic inspection chip stored at serial number.Integrated circuit test system reads the actual sequence number that is written in the chip, and itself and original series number are compared, and judges whether the serial number that writes in the chip is correct.Concrete implementation procedure is that integrated circuit test system is moved corresponding resolution chart, the designated memory of chip under test is set to reading state, the initial address of the assigned address of storage sequence number in the input designated memory, read the content in designated memory zone, compare with correct serial number content, it is correct that if serial number identical then chip is downloaded, otherwise mistake.
Though above described the present invention by embodiment, those of ordinary skills know, the present invention has many distortion and variation and does not break away from spirit of the present invention, appended claim will comprise these distortion and variation.
Claims (7)
1. the method for an automatically downloading sequence number of integrated circuit is characterized in that comprising following step:
(1) in the test process of integrated circuit (IC) chip, gathers each chip information relevant with the integrated circuit serial number;
(2), the described information translation relevant with the integrated circuit serial number become the integrated circuit serial number of predetermined format according to predetermined encoding;
(3) described integrated circuit serial number is downloaded to appointed area in the integrated circuit (IC) chip internal storage;
(4) accuracy and the uniqueness of the described integrated circuit serial number of inspection download.
2. the method for automatically downloading sequence number of integrated circuit as claimed in claim 1 is characterized in that:
In the described step (1),, read time, lot number, sheet number and the coordinate information of current chip under test in real time by communicating based on the gpib interface plate control integrated circuit test macro of IEEE 488 standards and full-automatic probe station.
3. the method for automatically downloading sequence number of integrated circuit as claimed in claim 1 is characterized in that:
In the described step (2), the information of each chip that will obtain is carried out from the decimal system to binary data transaction earlier, then described information is inserted assigned position according to the date of manufacturer's code, test chip, the lot number of wafer, the order of the X and Y coordinates of chip on wafer, thereby generate the integrated circuit serial number of predetermined format.
4. the method for automatically downloading sequence number of integrated circuit as claimed in claim 1 is characterized in that:
In the described step (3), after described integrated circuit (IC) chip is by all test events, just carry out integrated circuit serial number down operation.
5. the method for automatically downloading sequence number of integrated circuit as claimed in claim 1 is characterized in that:
In the described step (3), the serial number of chip under test is downloaded flow process change into the executable serial number download of integrated circuit test system resolution chart, and be loaded in the resolution chart memory of test macro;
Described integrated circuit test system is carried out described serial number and is downloaded resolution chart, finishes serial number the writing of appointed area in tested integrated circuit (IC) chip internal storage.
6. the method for automatically downloading sequence number of integrated circuit as claimed in claim 5 is characterized in that:
Described serial number is downloaded resolution chart: make the designated memory of chip under test inside be in write state, the designated memory of chip enters the pin input 1 of write state; Send the assigned address of storage sequence number to designated memory, the assigned address of the address pins input storage sequence number of chip; The serial number of the chip under test that send to generate to designated memory, the data pins of chip is imported corresponding serial number data; The output state of the output pin of while monitoring chip; Time sequence information comprises the operating frequency of chip, writes the time of the signal variation of control pin, address, data pins.
7. the method for automatically downloading sequence number of integrated circuit as claimed in claim 1 is characterized in that:
In the described step (4), integrated circuit test system operation resolution chart, the designated memory of chip under test is set to reading state, the initial address of the assigned address of storage sequence number in the input designated memory, read the content in designated memory zone, compare with correct serial number content, correct if serial number identical then chip is downloaded, otherwise mistake.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2007101755831A CN101364529B (en) | 2007-09-30 | 2007-09-30 | Method for automatically downloading sequence number of integrated circuit |
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| CN2007101755831A CN101364529B (en) | 2007-09-30 | 2007-09-30 | Method for automatically downloading sequence number of integrated circuit |
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| CN101364529A true CN101364529A (en) | 2009-02-11 |
| CN101364529B CN101364529B (en) | 2010-06-02 |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102169846A (en) * | 2011-01-27 | 2011-08-31 | 北京确安科技股份有限公司 | Method for writing multi-dimensional variable password in parallel in process of testing integrated circuit wafer |
| CN103165405A (en) * | 2011-01-27 | 2013-06-19 | 北京确安科技股份有限公司 | Mutli-dimensional variable code real-time generation method through general purpose interface bus (GPIB) interface |
| CN104678287A (en) * | 2015-01-30 | 2015-06-03 | 上海华岭集成电路技术股份有限公司 | Chip UID (User Identification) mapping writing-in method |
| CN106370992A (en) * | 2016-08-17 | 2017-02-01 | 上海华岭集成电路技术股份有限公司 | UID write-in system and method for semiconductor chip tests |
| CN107656188A (en) * | 2017-09-11 | 2018-02-02 | 东莞市爱协生智能科技有限公司 | The test system and its method of a kind of chip |
| CN113434570A (en) * | 2021-06-15 | 2021-09-24 | 安测半导体技术(江苏)有限公司 | Method and system for checking unique code in semiconductor test |
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| TWI560636B (en) * | 2015-09-24 | 2016-12-01 | King Yuan Electronics Co Ltd | Chip ID code automatic checking system and its method |
| CN106557709B (en) * | 2015-09-28 | 2019-05-17 | 京元电子股份有限公司 | Chip identifier automatic inspection system and its method |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1581063A (en) * | 2003-08-01 | 2005-02-16 | 上海华园微电子技术有限公司 | CPU card chip measuring method |
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2007
- 2007-09-30 CN CN2007101755831A patent/CN101364529B/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102169846A (en) * | 2011-01-27 | 2011-08-31 | 北京确安科技股份有限公司 | Method for writing multi-dimensional variable password in parallel in process of testing integrated circuit wafer |
| CN103165405A (en) * | 2011-01-27 | 2013-06-19 | 北京确安科技股份有限公司 | Mutli-dimensional variable code real-time generation method through general purpose interface bus (GPIB) interface |
| CN104678287A (en) * | 2015-01-30 | 2015-06-03 | 上海华岭集成电路技术股份有限公司 | Chip UID (User Identification) mapping writing-in method |
| CN106370992A (en) * | 2016-08-17 | 2017-02-01 | 上海华岭集成电路技术股份有限公司 | UID write-in system and method for semiconductor chip tests |
| CN107656188A (en) * | 2017-09-11 | 2018-02-02 | 东莞市爱协生智能科技有限公司 | The test system and its method of a kind of chip |
| CN107656188B (en) * | 2017-09-11 | 2023-12-29 | 深圳市爱协生科技股份有限公司 | Chip testing system and method |
| CN113434570A (en) * | 2021-06-15 | 2021-09-24 | 安测半导体技术(江苏)有限公司 | Method and system for checking unique code in semiconductor test |
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| CN101364529B (en) | 2010-06-02 |
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