CN101304245A - Method for reducing clock signal electromagnetic interference - Google Patents

Method for reducing clock signal electromagnetic interference Download PDF

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Publication number
CN101304245A
CN101304245A CNA2007101028682A CN200710102868A CN101304245A CN 101304245 A CN101304245 A CN 101304245A CN A2007101028682 A CNA2007101028682 A CN A2007101028682A CN 200710102868 A CN200710102868 A CN 200710102868A CN 101304245 A CN101304245 A CN 101304245A
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Prior art keywords
clock signal
electromagnetic interference
function
clock
interference method
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CNA2007101028682A
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Chinese (zh)
Inventor
谢文胜
胡智伟
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Quanta Storage Inc
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Quanta Storage Inc
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Priority to CNA2007101028682A priority Critical patent/CN101304245A/en
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Abstract

The invention relates to an electromagnetic interference reduction method for clocked signal. The method is as follows: firstly, a clock signal is generated by a clock generator, and then the clock signal is acquired to form a clock function, the clock function is carried out laplace transformation to transform into a unit function; secondly, at least one unit function is calculated to form an effective clock signal; thirdly, the effective clock signals are outputted as the reference of the digital system timing to reduce the energy of the electromagnetic interference of the clock signal.

Description

Reduce the clock signal electromagnetic interference method
Technical field
The present invention relates to a kind of reduction clock signal electromagnetic interference method, change the method that relates to reduce in the IC semiconductor chip electromagnetic interference that clock signal produces.
Background technology
Along with the prosperity of numeral science and technology, digital system needs one reliably to reach accurate clock generator to produce the clock signal of high frequency, as the reference of data signal rate in order to support high density and high-speed message transmission.The generation of canonical system elapsed time clock and distribution, formed by a series of functional unit, this series function assembly can be IC semiconductor chips such as assembly chipset or individual packages height integrated assembly, and described IC semiconductor chip is very responsive for electromagnetic interference (Electrical MagneticInterference is called for short EMI).
Because high frequency clock signal that clock generator produces often to the IC semiconductor chip in clock generator or the digital system, causes electromagnetic interference, influences the reliability and the performance of digital system.In order to reduce high frequency clock signal institute produce power, to avoid electromagnetic interference, No. 091120699 " reducing the phase-locked loop of the electromagnetic interference " patent application case in Taiwan, utilize the phase-locked loop control that reduces electromagnetic interference to have some signals of phase difference, it is the n times of basic time of delay to the output signal of voltage control oscillator, decision modulation rate is to reduce electromagnetic interference.No. 087117404 " interface circuit and the liquid crystal display drive circuit " patent application case in Taiwan then proposes to utilize filter circuit and a plurality of comparison circuit that digital signal is carried out level translation, to lower electromagnetic interference in addition.
Yet aforementioned prior art all need increase extra circuit, just can reach the effect that reduces electromagnetic interference, not only reduces the assembly layout space, and increases assembly manufacturing cost and degree of difficulty.Therefore, existing clock signal still has problem to need to be resolved hurrily reducing on the electromagnetic interference.
Summary of the invention
A purpose of the present invention is providing a kind of reduction clock signal electromagnetic interference method, by function clock signal is converted to unit function, reduces the energy that clock produced, to reduce electromagnetic interference.
Another purpose of the present invention is providing a kind of reduction clock signal electromagnetic interference method, utilizes the computing of at least one unit function to produce an effective frequency, so that suitable clock signal to be provided.
Still a further object of the present invention utilizes the logical operation mode to produce low-energy clock signal in that a kind of reduction clock signal electromagnetic interference method is provided, and reduces electromagnetic interference and product cost.
In order to reach the purpose of aforementioned invention, reduction clock signal electromagnetic interference method of the present invention, at first produce a clock signal by a clock generator, the acquisition clock signal forms a clock function, again clock function is carried out Laplace and converts unit function to, follow computing with at least one unit function, form effective clock signal, export the efficient clock signal at last, as the timing reference of digital system transmission of data signals.
Description of drawings
Fig. 1 is the clock signal of a clock pulse that generator produces.
Fig. 2 is converted to the unit function signal for the present invention with clock function.
Fig. 3 is poor the formed clock signal of the present invention by two groups of unit functions.
Fig. 4 reduces the flow chart of clock signal electromagnetic interference method for the present invention.
The reference numeral explanation
S1 clocking step
S2 acquisition clock signal step
S3 Laplace translation operation step
S4 conversion unit function step
S5 forms effective clock signal step
S6 clock signal step
Embodiment
Relevant the present invention is for reaching above-mentioned purpose, and technological means that is adopted and effect thereof are lifted preferred embodiment now, and conjunction with figs. is illustrated as follows.
Please refer to Fig. 1, is the clock signal of a clock pulse that generator produces, and the energy of this clock signal is bigger, as does not add processing, will produce electromagnetic interference to the assembly in the digital system.For reducing the energy of clock signal, during the processing clock signal, at first clock signal is formed a clock function δ (t), and defines this clock function δ (t) and be:
δ ( t ) ≡ ∞ t = 0 0 t ≠ 0 - - - ( 1 )
Wherein, t is the time.
With the clock function δ (t) of aforementioned (1) formula, utilize Laplace conversion (Laplace Transform) to change again, the computing of conversion is as follows:
L { δ ( t ) } = ∫ 0 ∞ e - st lim ϵ → 0 u ( t ) - u ( t ) ϵ dt
= lim ϵ → 0 1 ϵ ∫ 0 ∞ e - st { u ( t ) - u ( t - ϵ ) } dt
= lim ϵ → 0 1 ϵ { L { u ( t ) } - L { u ( t - ϵ ) } }
= lim ϵ → 0 1 S - 1 S e - ϵs C
Figure A20071010286800065
= 1 S lim ϵ → 0 s e - ϵs 1
= 1 - - - ( 2 )
Wherein, S is S territory (domain) function;
ε is the very little time;
U (t) is a unit function.
By the conversion of (2) formula, clock function δ (t) is converted to a unit function u (t), and definition unit function u (t) is:
u ( t ) ≡ 1 t = 0 0 t ≠ 0 - - - ( 3 )
Wherein, t is the time.
As shown in Figure 2, clock function δ (t) promptly can be exchanged into unit function u (t).Make clock function δ (t) that corresponding unit function u (t) all be arranged, the enable clock signal pulse can produce with relative unit function u (t) amplitude, make clock signal produce the energy of electromagnetic interference, reduces to minimumly, reaches the purpose that reduces electromagnetic interference.
In order to satisfy the required form of various clock signal, can produce an appropriate units function as clock signal by two or the computing of a plurality of unit function.As shown in Figure 3, show that wherein, unit function u (t-1) and unit function u (t-2) are defined as respectively by the difference clock signal that forms of two unit functions:
u ( t - 1 ) &equiv; 1 t 1 0 t < 1 - - - ( 4 )
u ( t - 2 ) &equiv; 1 t 2 0 t < 1 - - - ( 5 )
Wherein, t is the time.Subtract formula (5) unit function u (t-2) by formula (4) unit function u (t-1), can be via the unit function u (t) of simple calculations production (3), with as clock signal.
As shown in Figure 4, for the present invention reduces the work flow of clock signal electromagnetic interference method, this flow process shows that specifically the present invention reduces the step of clock signal electromagnetic interference, and step-by-step procedures is as follows:
Step S1: by a clock generator clocking, as the timing reference of digital system transmission of data signals.
Step S2: the acquisition clock signal that clock generator produced forms a clock function δ (t).
Step S3: clock function δ (t) is carried out the Laplace translation operation.
Step S4: clock function δ (t) forms unit function u (t) after carrying out the Laplace conversion.
Step S5:, form effective unit function, as clock signal by at least one unit function.
Step S6: with effective clock signal output, as the timing reference of digital system data.
By aforesaid step, the present invention reduces the clock signal electromagnetic interference method, can be converted to unit function by function with clock signal, utilize the simple operation of at least one group unit function to produce a suitable unit function frequency simultaneously, as clock signal frequency, the energy that clock is produced reduces, to reduce electromagnetic interference.In addition, reduction clock signal electromagnetic interference method of the present invention is that conversion and the logical operation mode with function produces low-energy clock signal, can the firmware mode finish, need not additionally to increase circuit and part, remove and to reduce electromagnetic interference, also can reduce the manufacturing cost of product.
The above person, only in order to convenient explanation preferred embodiment of the present invention, scope of the present invention is not limited to described preferred embodiment, and is all according to any change that the present invention did, and not breaking away under the spirit of the present invention, all belongs to the scope of the present patent application patent.

Claims (9)

1. one kind is reduced the clock signal electromagnetic interference method, and its step comprises:
(1) produces a clock signal;
(2) the acquisition clock signal forms a clock function;
(3) clock function is carried out Laplace and convert unit function to;
(4) form effective clock signal with at least one unit function; And
(5) output efficient clock signal.
2. reduction clock signal electromagnetic interference method according to claim 1, wherein, the clock signal of this step (1) is produced by a clock generator.
3. reduction clock signal electromagnetic interference method according to claim 1, wherein, this step (2) clock function that clock signal forms is
&delta; ( t ) &equiv; &infin; t = 0 0 t &NotEqual; 0
Wherein, t is the time.
4. reduction clock signal electromagnetic interference method according to claim 1, wherein, the conversion of function is finished in the firmware mode in this step (3).
5. reduction clock signal electromagnetic interference method according to claim 4, wherein, this step (3) converts unit function u (t) to and is
u ( t ) &equiv; 1 t = 0 0 t &NotEqual; 0
Wherein, t is the time.
6. reduction clock signal electromagnetic interference method according to claim 1, wherein, this step (4) is poor with two unit functions, forms clock signal.
7. reduction clock signal electromagnetic interference method according to claim 6, wherein, this step (4) two unit function u (t-1), u (t-2) are respectively
u ( t - 1 ) &equiv; 1 t 1 0 t < 1
With
u ( t - 2 ) &equiv; 1 t 2 0 t < 1
Wherein, t is the time.
8. reduction clock signal electromagnetic interference method according to claim 1, wherein, this step (4) forms clock signal with the computing of two above unit functions.
9. reduction clock signal electromagnetic interference method according to claim 1, wherein, the computing of function is finished in the firmware mode in this step (4).
CNA2007101028682A 2007-05-11 2007-05-11 Method for reducing clock signal electromagnetic interference Pending CN101304245A (en)

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Application Number Priority Date Filing Date Title
CNA2007101028682A CN101304245A (en) 2007-05-11 2007-05-11 Method for reducing clock signal electromagnetic interference

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105337633A (en) * 2014-06-30 2016-02-17 展讯通信(上海)有限公司 Mobile station, method and device for improving sensitivity of mobile station
CN111951722A (en) * 2020-08-29 2020-11-17 深圳市洲明科技股份有限公司 Clock signal transmitter and receiver, clock circuit, receiving card and LED module

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105337633A (en) * 2014-06-30 2016-02-17 展讯通信(上海)有限公司 Mobile station, method and device for improving sensitivity of mobile station
CN111951722A (en) * 2020-08-29 2020-11-17 深圳市洲明科技股份有限公司 Clock signal transmitter and receiver, clock circuit, receiving card and LED module

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Open date: 20081112