CN101295757A - Semiconductor light emitting element with high light extraction rate - Google Patents
Semiconductor light emitting element with high light extraction rate Download PDFInfo
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- CN101295757A CN101295757A CNA2007101009681A CN200710100968A CN101295757A CN 101295757 A CN101295757 A CN 101295757A CN A2007101009681 A CNA2007101009681 A CN A2007101009681A CN 200710100968 A CN200710100968 A CN 200710100968A CN 101295757 A CN101295757 A CN 101295757A
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Abstract
The invention discloses a semiconductor light emitting element and a manufacture method thereof. The semiconductor light emitting element according to the invention comprises a substrate, a multilayer structure, a top layer and at least one electrode. The multilayer structure is formed on the substrate and comprises a light emitting zone. The top layer is formed on the multilayer structure and the lower part of sidewall of the top layer shows a first surface morphology which is relevant with a first pattern. Furthermore, the upper part of sidewall of the top layer shows a second surface morphology which is relevant with a second pattern. At least one electrode is formed on the top layer. Therefore, the sidewall of the semiconductor light emitting element according to the invention shows surface morphology, thus being capable of enlarging the surface area of side edge light extraction so as to improve the light extraction efficiency of the semiconductor light emitting element.
Description
Technical field
The present invention relates to a kind of semiconductor light-emitting elements (Semiconductor light-emitting device), particularly relate to a kind of semiconductor light-emitting elements with high light extraction rate.
Background technology
The application of semiconductor light-emitting elements [for example light-emitting diode (LED)] is very extensive at present, and for example illumination and field of remote control etc. are all seen semiconductor light-emitting elements and are widely used.In order to allow semiconductor light-emitting elements guarantee higher functional reliability and lower energy resource consumption as much as possible, therefore must require the external quantum efficiency (External quantumefficiency) of itself for semiconductor light-emitting elements.
In principle, the external quantum efficiency of semiconductor light-emitting elements depends on internal quantum (Internal quantum efficiency) and the release efficiency (Extraction efficiency) of itself.So-called internal quantum is determined by material behavior and quality.Then be meant from element internal as for release efficiency and be issued to radiation ratio in the surrounding air or the epoxy resin of encapsulation.Release efficiency depends on the loss that is taken place when element internal is left in radiation.The one of the main reasons that causes above-mentioned loss is to have high optical refractive index (Refraction coefficient) owing to form the semi-conducting material of the superficial layer of element, and for example the optical refractive index of GaAs (GaAs) is about 3.6.As everyone knows, high optical refractive index can cause light to produce total reflection (Total reflection) and can't launch at this material surface.
The preceding case of making about semiconductor light-emitting elements, for example, United States Patent (USP) case numbers 6,277,665 discloses the external quantum efficiency that the method for utilizing surface roughening improves semiconductor light-emitting elements.According to the semiconductor light-emitting elements of this patent, the exposed portion of its top layer presents coarse configuration of surface, and thus, the external quantum efficiency of semiconductor light-emitting elements is enhanced.
The peripheral profile of light-emitting diode all is designed to linear fashion at present.If periphery (the being sidewall) formation rule or the irregular configuration of surface of light-emitting diode just can increase the surface area that side light takes out, and then increase the light extraction efficiency of light-emitting diode, to improve external quantum efficiency.
Therefore, main purpose of the present invention is to provide a kind of semiconductor light-emitting elements, its sidewall (Sidewall) presents a configuration of surface (Surface morphology), so can increase the surface area that side light is got light, takes out efficient with the light that improves semiconductor light-emitting elements.
Summary of the invention
One object of the present invention is to provide a kind of semiconductor light-emitting elements and manufacture method thereof.In a preferred embodiment according to the present invention, this semiconductor light-emitting elements comprises substrate (Substrate), sandwich construction (Multi-layer structure), top layer (Top-most layer) and at least one electrode.
This sandwich construction is formed on this substrate and comprises luminous zone (Light-emitting region).This top layer is formed on this sandwich construction, and the lower part of the sidewall (Sidewall) of this top layer presents the first surface form, and this first surface form is relevant with first pattern (Pattern).In addition, the top of the sidewall of this top layer presents the second surface form, and this second surface form is relevant with second pattern.This at least one electrode is formed on this top layer.
Therefore, according to semiconductor light-emitting elements of the present invention, its sidewall presents configuration of surface, therefore can increase the surface area that side light takes out, and takes out efficient and external quantum efficiency with the light that improves semiconductor light-emitting elements.
Can be about the advantages and spirit of the present invention by following detailed Description Of The Invention and appended graphic being further understood.
Description of drawings
Figure 1A to Fig. 1 D represents to have its local sidewall of light-emitting diode of the sidewall of different surface configurations.
Fig. 2 represents the cross sectional view according to the semiconductor light-emitting elements of a preferred embodiment of the present invention.
In Fig. 3 presentation graphs 2 according to the possible configuration of surface of its sidewall of semiconductor light-emitting elements of the present invention.
Main reference numeral explanation
10: sidewall 2: semiconductor light-emitting elements
20: substrate 22: sandwich construction
220: luminous zone 24: top layer
240: lower part 242: top
26: electrode
Embodiment
Please be shown in Table 1, table 1 is listed according to the light-emitting diode with sidewall of different surface configurations, its exterior contour, luminous intensity and electrical performance is measured the result of gained.See also Figure 1A to Fig. 1 D.Figure 1A to Fig. 1 D represents to have its local sidewall of light-emitting diode of the sidewall of different surface configurations.The sidewall 10 that Figure 1A represents unprocessed (being linear pattern).Figure 1B to Fig. 1 D represents to have the sidewall 10 of configuration of surface.
Sidewall 10 (being Figure 1B to Fig. 1 D) as shown in table 1, as to have configuration of surface, the girth of its sidewall 10 is longer than the girth of the sidewall 10 of unprocessed (being linear pattern).Thus, the surface area of its side light taking-up of light-emitting diode can significantly increase.Therefore, as shown in table 1, light-emitting diode with sidewall 10 (being Figure 1B to Fig. 1 D) of configuration of surface, in the performance of luminous intensity, power output and external quantum efficiency, all preferable than the light-emitting diode of sidewall 10 unprocessed (they being linear pattern).Wherein, the electric current of 20mA is that to input to light-emitting diode electrical to measure it.Can prove thus,, just can increase the surface area that side light takes out, and then increase the light taking-up efficient of light-emitting diode, to improve external quantum efficiency if the periphery of light-emitting diode forms configuration of surface.
Table 1
| The sidewall surfaces form | Perimeter side wall (μ m) | Luminous intensity (mcd) | Power output (mW) | External quantum efficiency (%) |
| Figure 1A | 1677 | 127.2 | 8.5 | 12.8 |
| Figure 1B | 2538.98 | 131.6 | 8.89 | 13.4 |
| Fig. 1 C | 2104.64 | 134.3 | 8.67 | 13 |
| Fig. 1 D | 2186.8 | 133.8 | 8.79 | 13.3 |
See also Fig. 2, Fig. 2 represents the cross sectional view according to the semiconductor light-emitting elements 2 of a preferred embodiment of the present invention, and this semiconductor light-emitting elements 2 can be a light-emitting diode.As shown in Figure 2, this semiconductor light-emitting elements 2 comprises substrate 20, sandwich construction 22, top layer 24 and at least one electrode 26.
In actual applications, this substrate 20 can be silicon (Si), gallium nitride (GaN), aluminium nitride (AlN), sapphire (Sapphire), spinelle (Spinnel), carborundum (SiC), GaAs (GaAs), alundum (Al (Al
2O
3), titanium dioxide lithium gallium (LiGaO
2), titanium dioxide lithium aluminium (LiAlO
2), four magnesium oxide, two aluminium (MgAl
2O
4) or electric conducting material.
This sandwich construction 22 is formed on this substrate 20 and comprises luminous zone 220.In actual applications, this luminous zone 220 can comprise PN-joint (PN-junction), two heterogeneous joint (Doublehetero-junction) or multiple quantum trap (Multiple quantum well).
This top layer (being transparent contact layer) 24 is formed on this sandwich construction 22, and this at least one electrode 26 is formed on this top layer 24.In actual applications, this top layer 24 can be indium tin oxide (ITO) or zinc oxide (ZnO).In one embodiment, this at least one electrode 26 can also be formed on this sandwich construction 22 (as shown in Figure 2).
See also Fig. 3.In Fig. 3 presentation graphs 2 according to the possible configuration of surface of semiconductor light-emitting elements 2 its sidewalls of the present invention.As shown in Figure 3, in this embodiment, the lower part 240 of the sidewall of this top layer 24 can present the first surface form, and this first surface form is relevant with first pattern.In actual applications, this first surface form (being lower part 240) of the sidewall of this top layer 24 can be utilized etch resistance layer (Etching-resistant layer) and form.This etch resistance layer can be Si oxide (Silicon oxide) or photoresist (Photo-resist material), and the border of this etch resistance layer can present this first pattern.
In addition, the top 242 of the sidewall of this top layer 24 and can present the second surface form, this second surface form is relevant with second pattern.Similarly, this second surface form (being top 242) of the sidewall of this top layer 24 can also be used this etch resistance layer and form according to this second pattern.Be noted that this second pattern forms by this first pattern that reduces this etch resistance layer border.As shown in Figure 3, the sidewall of semiconductor light-emitting elements 2 in this embodiment presents the surface morphology of rule.
The configuration of surface of this sidewall can also be handled the collocation etch processes by the multiple tracks gold-tinted and form, and does not exceed with top among this embodiment 242 and lower part 240.In other words, this sidewall can comprise a plurality of parts, and various piece has the special surface form.
In actual applications, the sidewall of this substrate can present the surface morphology relevant with the 3rd pattern, and the sidewall of this sandwich construction can also present the surface morphology relevant with the 4th pattern.In other words, according to semiconductor light-emitting elements 2 of the present invention, its whole sidewall all can present surface morphology, takes out efficient and external quantum efficiency with the light that improves semiconductor light-emitting elements 2.
In actual applications, the etch resistance layer can form spherical characteristic because of cohesive force after can also having heat treatment by nickel (Nickel) and aluminium (Al) or other, and forms than the metal material for the treatment of the etching material etch resistant.Be example in this embodiment with nickel.How utilization can form the characteristic of rice structure to nickel annealing, nickel is carried out the etching of semiconductor light-emitting elements 2 as the etch resistance layer.Thus, the etch resistance layer of nickel is carried out annealing (Annealing) handle the pattern that can form etch resistance layer border, and this pattern can be irregular.Be noted that the pattern on etch resistance layer border is relevant with the condition of annealing in process.
In actual applications, the size according to semiconductor light-emitting elements 2 its sidewalls of the present invention can Fig. 3 be an example.The size of unit sidewall and the spacing d of adjacent wall can be defined between 0.1～10 μ m.Yet along with the progress that semiconductor is made, the size of unit sidewall and the spacing d of adjacent wall can be reduced gradually, significantly to increase the area that semiconductor light-emitting elements 2 side light take out.
In one embodiment, if this substrate 20 is an electric conducting material, then growth semiconductor light-emitting elements 2 can be made into the semiconductor light-emitting elements 2 that electrode lays respectively at upper and lower surface on this substrate 20, and promptly the vertical structure semiconductor light-emitting component 2.At least one electrode 26 of semiconductor light-emitting elements 2 among Fig. 2 is formed on this top layer 24, is horizontal structure semiconductor light-emitting elements 2 therefore.In other words, the electrode 26 according to semiconductor light-emitting elements 2 of the present invention is not limited to be formed at same surface.
With method, this substrate 20 is essential important documents of growth semiconductor light-emitting elements 2, but after actual fabrication became semiconductor light-emitting elements 2, this substrate 20 can optionally be removed.In addition, this top layer 24 is just in order to promote the usefulness of semiconductor light-emitting elements 2, and nonessential important document.Therefore, in another specific embodiment, can not comprise this substrate 20 and this top layer 24 according to semiconductor light-emitting elements 2 of the present invention.
In another specific embodiment, first pattern on this etch resistance layer border can be that circle, semicircle, triangle, polygon or above-mentioned pattern are arranged in pairs or groups mutually.Thus, this top layer 24 can use above-mentioned this etch resistance layer with special pattern, handles collocation etch processes, the sidewall that has corresponding configuration of surface with formation through one gold-tinted.
According to the method for another preferred embodiment of the present invention for manufacturing semiconductor light-emitting elements 2.Please consult Fig. 2 again, at first, this manufacture method prepares substrate 20.Afterwards, this manufacture method forms sandwich construction 22 on this substrate 20, and this sandwich construction 22 comprises luminous zone 220.Then, this manufacture method forms top layer 24 on this sandwich construction 22.
Subsequently, this manufacture method forms the etch resistance layer.This etch resistance layer covers this top layer 24 substantially, cause the border (Boundary) of this top layer 24 to be exposed, and the border of this etch resistance layer presents first pattern.Then, the border of exposing of this top layer 24 of this manufacture method etching.Then, this manufacture method is reduced the border of this etch resistance layer, causes the border of this etch resistance layer to present second pattern, and according to this second pattern border of exposing of this top layer 24 of etching once more.
Afterwards, this manufacture method removes this etch resistance layer, and forms at least one electrode 26 on this top layer 24.
Compared with prior art, according to semiconductor light-emitting elements of the present invention, its sidewall can present rule or irregular configuration of surface.Though the luminous surface area of forward reduces,, take out efficient and external quantum efficiency so can improve the light of semiconductor light-emitting elements because the surface area that side light takes out significantly increases.In addition, the present invention is other applicable to various semiconductor light-emitting elements and light.
By the above detailed description of preferred embodiments, hope can be known description feature of the present invention and spirit more, and is not to come scope of the present invention is limited with above-mentioned disclosed preferred embodiment.On the contrary, its objective is that hope can contain various changes and have in the Patent right requirement scope of being arranged in of equality institute of the present invention desire application.Therefore, the Patent right requirement that the present invention applied for should be done the broadest explanation according to above-mentioned explanation, with the arrangement that causes it to contain all possible change and have equality.
Claims (21)
1, a kind of method of making semiconductor light emitting component comprises the following step:
(a) preparation one substrate;
(b) form a sandwich construction on this substrate, this sandwich construction comprises a luminous zone;
(c) form top layer on this sandwich construction;
(d) form an etch resistance layer, this etch resistance layer covers this top layer substantially, causes the border of this top layer to be exposed, and the border of this etch resistance layer presents one first pattern;
(e) this border of exposing of this top layer of etching;
(f) remove this etch resistance layer; And
(g) on this top layer, form at least one electrode;
Wherein the sidewall of this top layer presents a surface morphology relevant with this first pattern.
2, the method for claim 1 between step (e) and step (f), further comprises the following step:
(e-1) reduce this border of this etch resistance layer, cause this border of this etch resistance layer to present second pattern; And
(e-2) this border of exposing of this top layer of etching once more;
Wherein the surface morphology of this sidewall of this top layer is relevant with this first pattern and this second pattern.
3, the method for claim 1, wherein this top layer is formed by indium tin oxide or zinc oxide.
4, the method for claim 1, wherein this luminous zone comprises one that is selected from the group of being made up of PN-joint, two heterogeneous joint and multiple quantum trap.
5, the method for claim 1, wherein this etch resistance layer is formed by Si oxide or photoresist.
6, the method for claim 1, wherein this etch resistance layer by be selected from the group of forming by nickel and aluminium one form.
7, method as claimed in claim 6, wherein this border with this first pattern of this etch resistance layer forms by annealing in process.
8, the method for claim 1, wherein this substrate by be selected from the group of forming by silicon, gallium nitride, aluminium nitride, sapphire, spinelle, carborundum, GaAs, alundum (Al, titanium dioxide lithium gallium, titanium dioxide lithium aluminium, four magnesium oxide, two aluminium and electric conducting material one form.
9, the method for claim 1, wherein the sidewall of this substrate presents the surface morphology relevant with the 3rd pattern.
10, the method for claim 1, wherein the sidewall of this sandwich construction presents the surface morphology relevant with the 4th pattern.
11, a kind of semiconductor light-emitting elements comprises:
Substrate;
Sandwich construction, this sandwich construction are formed on this substrate and comprise a luminous zone;
Top layer, this top layer is formed on this sandwich construction, and the lower part of the sidewall of this top layer presents the first surface kenel, and this first surface kenel is relevant with first pattern; And
At least one electrode, this at least one electrode are formed on this top layer.
12, semiconductor light-emitting elements as claimed in claim 11, wherein this top layer is formed by indium tin oxide or zinc oxide.
13, semiconductor light-emitting elements as claimed in claim 11, wherein this luminous zone comprises one that is selected from the group of being made up of PN-joint, two heterogeneous joint and multiple quantum trap.
14, semiconductor light-emitting elements as claimed in claim 11, wherein this substrate by be selected from the group of forming by silicon, gallium nitride, aluminium nitride, sapphire, spinelle, carborundum, GaAs, alundum (Al, titanium dioxide lithium gallium, titanium dioxide lithium aluminium, four magnesium oxide, two aluminium and an electric conducting material one form.
15, semiconductor light-emitting elements as claimed in claim 11, wherein this first surface kenel of this sidewall of this top layer is utilized the etch resistance layer and is formed, and the border of this etch resistance layer presents this first pattern.
16, as the 15th described semiconductor light-emitting elements of claim, wherein this etch resistance layer is formed by Si oxide or photoresist.
17, as the 15th described semiconductor light-emitting elements of claim, wherein this etch resistance layer by be selected from the group of forming by nickel and aluminium one form.
18, as the 17th described semiconductor light-emitting elements of claim, wherein this border with this first pattern of this etch resistance layer forms by annealing in process.
19, as the 15th described semiconductor light-emitting elements of claim, wherein the top of this sidewall of this top layer presents the second surface kenel, and this second surface kenel is relevant with second pattern.
20, semiconductor light-emitting elements as claimed in claim 11, wherein the sidewall of this substrate presents the surface morphology relevant with the 3rd pattern.
21, semiconductor light-emitting elements as claimed in claim 11, wherein the sidewall of this sandwich construction presents the surface morphology relevant with the 4th pattern.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2007101009681A CN101295757B (en) | 2007-04-28 | 2007-04-28 | Semiconductor light emitting element with high light extraction rate |
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|---|---|---|---|
| CN2007101009681A CN101295757B (en) | 2007-04-28 | 2007-04-28 | Semiconductor light emitting element with high light extraction rate |
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| CN101295757B CN101295757B (en) | 2010-06-16 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102130308A (en) * | 2011-01-27 | 2011-07-20 | 电子科技大学 | Preparation method of substrate for increasing light output efficiency of organic light emitting device |
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| US6277665B1 (en) * | 2000-01-10 | 2001-08-21 | United Epitaxy Company, Ltd. | Fabrication process of semiconductor light-emitting device with enhanced external quantum efficiency |
| CN1510765A (en) * | 2002-12-26 | 2004-07-07 | 炬鑫科技股份有限公司 | Gallium nitride of group III-V compound semiconductor LED luminating device and manufacture thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102130308A (en) * | 2011-01-27 | 2011-07-20 | 电子科技大学 | Preparation method of substrate for increasing light output efficiency of organic light emitting device |
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Effective date of registration: 20161028 Address after: Hsinchu City, Taiwan, China Patentee after: Jingyuan Optoelectronics Co., Ltd. Address before: Taichung City, Taiwan, China Patentee before: Guangjia Photoelectric Co., Ltd. |