CN101286476A - Method of using silicon oxide layer as doped opaque layer and blocking layer of metal silicide - Google Patents

Method of using silicon oxide layer as doped opaque layer and blocking layer of metal silicide Download PDF

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Publication number
CN101286476A
CN101286476A CNA2007100394361A CN200710039436A CN101286476A CN 101286476 A CN101286476 A CN 101286476A CN A2007100394361 A CNA2007100394361 A CN A2007100394361A CN 200710039436 A CN200710039436 A CN 200710039436A CN 101286476 A CN101286476 A CN 101286476A
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metal silicide
layer
silicon oxide
oxide layer
semiconductor
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CNA2007100394361A
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Chinese (zh)
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柳毅
孔蔚然
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Priority to CNA2007100394361A priority Critical patent/CN101286476A/en
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Abstract

The invention provides a method in which a single silicon oxide layer is taken as a doping shielding layer and a metal silicide blocking layer; a silicon oxide layer with larger thickness is taken as the shielding layer of the source/drain electrode when in doping, and then the silicon oxide layer with larger thickness is etched so as to form the blocking layer of the metal silicide, thus effectively reducing the technique cost and improving the productivity.

Description

Single silicon oxide layer is as the method for doping shielding layer and blocking layer of metal silicide
Technical field
The present invention relates to a kind of in semiconductor technology with silicon oxide layer as covering/process on barrier layer, particularly a kind of single silicon oxide layer is as the method for doping shielding layer and blocking layer of metal silicide.
Background technology
In semiconductor technology, silica is often played the part of roles such as shielding layer (ion implant screen film) that ion implants or blocking layer of metal silicide.And the silicon oxide layer of playing the part of the shielding layer of source/drain ion implantation generally is to adopt remaining oxide layer in obtained oxide of chemical vapour deposition technique or the silicon nitride gap wall etching process.But the remaining oxide layer of silicon nitride gap wall etching is often because through serious etching injury and thickness factor, causes follow-up peeling off as ion to implant the processing step of photoresist layer of shielding layer along with semiconductor subassembly enters considerably difficult that deep-submicron (deep submicron) became after the stage.Therefore the process that adopts chemical vapour deposition technique to make oxide becomes to make gradually covers/main flow on barrier layer.
See also Fig. 1, it is for to utilize chemical vapour deposition technique to make the process flow diagram of source/drain electrode doping shielding layer and blocking layer of metal silicide now.At first as step S1, the one semiconductor-based end that has had grid structure and STI isolation structure on it, be provided, wherein the part of grid pole structure has been finished the shallow ion doping of source/drain, utilizes chemical vapour deposition technique to form first oxide layer as high concentration ion implantation shielding layer on this semiconductor-based end; Then shown in step S2, carry out N type or P type source/drain high concentration ion doping process; Shown in step S3, on this first oxide layer, utilizing chemical vapour deposition technique deposition one predetermined second oxide layer more subsequently as blocking layer of metal silicide; Shown in the step S4, second oxide layer is carried out etching to define the gate location of pre-formation metal silicide for another example; Shown in step S5, carry out metal silicide technology at last.
But such technology mode, need wafer to come and go between Ion Implantation Equipment platform, etching machine bench and wait the ordering of technology with twice chemical vapour deposition (CVD) board, more the person is when technical process is loaded down with trivial details more, wafer transports that little pollutions such as the factory building that receives, equipment will be serious more in the process, causes on the cost loss greatly with productive rate relatively.
Therefore, the present invention is directed to the problems referred to above and propose the method for a kind of single silicon oxide layer, solve above-mentioned problem as doping shielding layer and blocking layer of metal silicide.
Summary of the invention
Main purpose of the present invention is, the method of a kind of single silicon oxide layer as doping shielding layer and blocking layer of metal silicide is provided, it utilizes the thicker silicon oxide layer source of a being used as/drain electrode doping shielding layer and a blocking layer of metal silicide, with the complexity of effective simplification technology and reduce cost, improve whole productivity.
For reaching above-mentioned purpose, the invention provides the method for a kind of single silicon oxide layer as doping shielding layer and blocking layer of metal silicide, it includes the following step: the semiconductor substrate is provided, be formed with a plurality of area of isolation and grid structure in it, and the source/drain of part of grid pole structure is formed with the shallow ion doped region; On the semiconductor-based end, form one silica layer; With the silicon oxide layer is shielding layer, at the source/drain formation heavy ion doped region of the grid structure with shallow ion doped region; This silicon oxide layer is carried out etching, with the fixed semiconductor substrate location that also goes out desire formation metal silicide; And the semiconductor substrate carried out metal silicide technology, to form metal silicide at grid structure that is exposed from the residual silicon oxide layer and regions and source.
The present invention can reach and effectively reduce the technology cost, and then improves the production capacity effect.
Further specify the present invention below in conjunction with drawings and Examples.
Description of drawings
Fig. 1 is the existing processing step flow chart that forms high concentration ion doped region and metal silicide.
Fig. 2 (a) to Fig. 2 (f) be each step structure cutaway view of the present invention.
Label declaration
The 10 semiconductor-based ends
12 shallow plough groove isolation areas
14 grid oxic horizons
16 polysilicon layers
18 grid structures
20 shallow ion doped regions
22 clearance walls
24 silicon oxide layers
25 residue oxide layers
26 heavy ion doped regions
28 patterning photoresist coatings
30 metal levels
32 metal silicides
Embodiment
A kind of single silicon oxide layer need deposit twice silicon oxide layer to cover the technology of oxide layer and metal silicide mask oxide layer as source/drain electrode doping respectively as the method for doping shielding layer and blocking layer of metal silicide now to simplify.
At first, please consult earlier shown in Fig. 2 (a), semiconductor substrate 10 is provided earlier, have a plurality of on this semiconductor-based end 10 in order to the driving component at the isolated semiconductor-based end 10 and shallow plough groove isolation area (the shallow trenchisolation of passive component, STI) 12, with one comprise grid oxic horizon 14, clearance wall 22 and be positioned at the grid structure 18,18 ' of crystal silicon layer 16 more than grid oxic horizon 14 tops, wherein the source/drain regions of part of grid pole structure 18 has formed shallow ion doped region 20,20 '.
Then, shown in Fig. 2 (b), the thicker oxide layer 24 of deposition one thickness on the semiconductor-based end 10, with as follow-up high concentration source/drain electrode doping shielding layer, then, a high concentration ion is carried out in semiconductor substrate 10 implants technology, with in the source/drain region forms heavy ion doped region 26,26 '.And the thickness of this oxide layer 24 can be 200~500
Figure A20071003943600051
Subsequently, shown in Fig. 2 (c), on the semiconductor-based end 10, form a patterning photoresist coating 28, to define the position, the semiconductor-based ends 10 of desire formation metal silicide.With patterning photosphere 28 is that mask carries out etching, removes the silicon oxide layer 24 at the semiconductor-based end 10 that desire forms metal silicide, shown in Fig. 2 (d), forms the grid structure 18 of metal silicide and the semiconductor-based end 10 of source/drain electrode place to expose desire.Then, remove patterning photoresist coating 28, and carry out metal silicide technology as metal silicide mask oxide layer with remaining silicon oxide layer 25, its processing step is the metal level 30 of titanium (Ti), cobalt (Co) or nickel (Ni) for deposition one material on the semiconductor-based end, shown in Fig. 2 (e); (rapid thermal anneal RTA) handles, and makes the reaction of metal and silicon or polysilicon become metal silicide (silicide), and this metal silicide is the C49 crystalline phase by rapid thermal annealing then.This moment is because grid gap wall 22 is an insulating material with silica, so clearance wall 22 and the part of the semiconductor-based ends 10 that covered by residual silicon oxide layer 25 can't produce metal silicide.
Subsequently, with ammoniacal liquor (NH 4OH), hydrogen peroxide (H 2O 2), water or sulfuric acid (H 2SO 4), hydrogen peroxide (H 2O 2) mixed liquor metal level 30 is carried out wet etching, removing the metal level 30 that unreacted becomes metal silicide 32, as Fig. 2 (f) shown in, form several metal silicides 32 in grid structure 18 and source/drain surface (20,20 ', 26,26 ') and form.
In addition, if needs are arranged, can make rapid thermal annealing for the second time to semiconductor substrate 10, resistance is reduced again becomes the C54 of titanium silicide crystalline phase.
In sum, the present invention is the method for a kind of single silicon oxide layer as doping shielding layer and blocking layer of metal silicide, it efficiently solves and has twice oxide process step of mixing and needing the implantation of chemical vapour deposition (CVD) one ion to cover oxide layer and need deposit a blocking layer of metal silicide when metal silicide forms at high concentration ion now, and then it is next simultaneously as shielding layer and barrier layer with the thicker oxide skin(coating) of a thickness, significantly reduced coming and going of semiconductor technology website, reduction significantly promotes production capacity because of issuable pollution of the loaded down with trivial details need of technology and process failure.
Above-described embodiment only is used to illustrate technological thought of the present invention and characteristics, its purpose makes those skilled in the art can understand content of the present invention and is implementing according to this, when can not only limiting claim of the present invention with present embodiment, be all equal variation or modifications of doing according to disclosed spirit, still drop in the claim of the present invention.

Claims (7)

1, a kind of single silicon oxide layer is characterized in that may further comprise the steps as the method for doping shielding layer and blocking layer of metal silicide:
The semiconductor substrate is provided, is formed with a plurality of area of isolation and grid structure in it, and the source/drain of this grid structure of part is formed with the shallow ion doped region with clearance wall;
On this semiconductor-based end, form one silica layer;
With this silicon oxide layer is shielding layer, this grid structure with shallow ion doped region is carried out high concentration ion implant technology, to form the heavy ion doped region at source/drain;
This silicon oxide layer is carried out etching, to form a blocking layer of metal silicide;
To carrying out metal silicide technology in this semiconductor-based end, form metal silicide with this grid structure and this regions and source that is exposed in this metal silicide mask oxide layer certainly.
2, single silicon oxide layer according to claim 1 is characterized in that as the method for doping shielding layer and blocking layer of metal silicide: this silicon oxide layer is to utilize chemical vapour deposition (CVD) obtained.
3, single silicon oxide layer according to claim 1 is characterized in that as the method for doping shielding layer and blocking layer of metal silicide: the thickness of this silicon oxide layer is 200~
Figure A2007100394360002C1
4, single silicon oxide layer according to claim 1 is characterized in that as the method for doping shielding layer and blocking layer of metal silicide: the technology of this metal silicide comprises the following steps:
On this semiconductor-based end, form a metal level;
To carrying out a quick thermal annealing process in this semiconductor-based end, to form metal silicide;
Remove unreacted this metal level.
5, single silicon oxide layer according to claim 4 is as the method for doping shielding layer and blocking layer of metal silicide, it is characterized in that: after removing unreacted this metal level, can make rapid thermal annealing for the second time to this semiconductor-based end, to reduce the resistance value of this metal silicide.
6, single silicon oxide layer according to claim 4 is characterized in that as the method for doping shielding layer and blocking layer of metal silicide: this step that removes unreacted this metal level is utilized the wet etching method.
7, single silicon oxide layer according to claim 4 is characterized in that as the method for doping shielding layer and blocking layer of metal silicide: the material of this metal level is titanium, cobalt or nickel.
CNA2007100394361A 2007-04-12 2007-04-12 Method of using silicon oxide layer as doped opaque layer and blocking layer of metal silicide Pending CN101286476A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102479673A (en) * 2010-11-24 2012-05-30 上海华虹Nec电子有限公司 Method for making titanium silicide barrier layer
CN101826465B (en) * 2009-03-04 2012-05-30 中芯国际集成电路制造(上海)有限公司 Method for preventing gap below side wall barrier layer during self-aligning silicide process
CN102142366B (en) * 2010-01-28 2013-04-03 无锡华润上华半导体有限公司 Method for forming self-aligned metallic silicide
CN107492484A (en) * 2017-08-15 2017-12-19 上海华虹宏力半导体制造有限公司 The manufacture method of SAB layer pattern structures
CN107919393A (en) * 2016-10-09 2018-04-17 中芯国际集成电路制造(上海)有限公司 A kind of semiconductor devices and its manufacture method
CN112928153A (en) * 2019-12-05 2021-06-08 中芯国际集成电路制造(天津)有限公司 Semiconductor structure and forming method thereof

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101826465B (en) * 2009-03-04 2012-05-30 中芯国际集成电路制造(上海)有限公司 Method for preventing gap below side wall barrier layer during self-aligning silicide process
CN102142366B (en) * 2010-01-28 2013-04-03 无锡华润上华半导体有限公司 Method for forming self-aligned metallic silicide
CN102479673A (en) * 2010-11-24 2012-05-30 上海华虹Nec电子有限公司 Method for making titanium silicide barrier layer
CN107919393A (en) * 2016-10-09 2018-04-17 中芯国际集成电路制造(上海)有限公司 A kind of semiconductor devices and its manufacture method
CN107919393B (en) * 2016-10-09 2020-11-10 中芯国际集成电路制造(上海)有限公司 Semiconductor device and manufacturing method thereof
CN107492484A (en) * 2017-08-15 2017-12-19 上海华虹宏力半导体制造有限公司 The manufacture method of SAB layer pattern structures
CN112928153A (en) * 2019-12-05 2021-06-08 中芯国际集成电路制造(天津)有限公司 Semiconductor structure and forming method thereof

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