CN101257756B - Lighting system and method - Google Patents

Lighting system and method Download PDF

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CN101257756B
CN101257756B CN2008101034828A CN200810103482A CN101257756B CN 101257756 B CN101257756 B CN 101257756B CN 2008101034828 A CN2008101034828 A CN 2008101034828A CN 200810103482 A CN200810103482 A CN 200810103482A CN 101257756 B CN101257756 B CN 101257756B
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signal
latch
output
clock
shift
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CN101257756A (en
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许川
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Beijing Ziguang Communication Technology Group Co ltd
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Hangzhou H3C Technologies Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/40Control techniques providing energy savings, e.g. smart controller or presence detection

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  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses a lighting system and a method. The system includes a programmable logic module for clock sampling and serial output lighting signals to be output in parallel, and synchronously outputting shift signals and latching signals corresponding to the serial output lighting signals; a serial-in/parallel-out shift latching module for converting the serial output lighting signals into parallel signals according to the shift signals and latching signals, utilizing the output parallel signals to light up. The technical proposal of the invention can save logical resources.

Description

A kind of lighting system and method
Technical field
The present invention relates to indicator light and show, relate in particular to a kind of lighting system and method.
Background technology
At present, along with the development of every technology, the function of communication equipment is more and more comprehensive, and integrated level is also more and more higher, as has occurred the communication equipment of functions such as data security, voice communication, video interactive, business customizing integrated.Correspondingly, as the indicator light of the auxiliary display device of communication equipment, its quantity also increases thereupon, and the complexity of its show state also increases gradually.
In the prior art, State Control to indicator light, usually all be by CPLD (ComplexProgrammable Logic Device, CPLD) or FPGA (FieldProgrammable Gate Array, field programmable gate array) etc. parallel the lighting a lamp of programmable logic chip realized, promptly the state control signal of corresponding each indicator light transmits by a pin of logic chip respectively, and the quantity of indicator light is many more, and the required number of pins that takies is just many more.Yet, present programmable logic chip is generally standard component, the quantity of its pin and the scale of logical block are directly proportional, therefore under the certain situation of logical block demand,, then may need to change the larger chip of logical block in order to realize State Control to more indicator light, to satisfy the demand of more pin, but so, not only cause the waste of logical resource, also can make cost strengthen; Perhaps, also may use a plurality of programmable logic chips to expand the quantity of pin, but like this, can cause the waste of logical resource and the increasing of cost equally, and the communication owing to having increased between the chip causes the design complexities that has strengthened programmable logic chip.
Summary of the invention
In view of this, provide a kind of lighting system on the one hand among the present invention, a kind of ignition method is provided on the other hand, to save logical resource.
Lighting system provided by the present invention comprises:
Programmed logical module is used for the some modulating signal with needs and line output, carries out serial output behind the clock sampling, and light a lamp the signal Synchronization output shift signal and the latch signal of corresponding described serial output;
Seal in/and the latch module that goes out to be shifted, being used for according to described shift signal and latch signal is parallel signal output with the conversion of signals of lighting a lamp of described serial output, utilizes the parallel signal of described output to light a lamp.
Wherein, described sealing in/and the latch module that goes out to be shifted comprise: one seal in/and go out displacement and latch chip, perhaps plural the sealing in of cascade/and go out displacement and latch chip.
Preferably, described programmed logical module comprises: CPLD chip or fpga chip.
Ignition method provided by the present invention comprises:
A, programmed logical module will need and the some modulating signal of line output, carry out serial output behind the clock sampling, and light a lamp the signal Synchronization output shift signal and the latch signal of corresponding described serial output;
B, seal in/and the latch module that goes out to be shifted be parallel signal output according to described shift signal and latch signal with the conversion of signals of lighting a lamp of described serial output, utilize the parallel signal of described output to light a lamp.
Wherein, before the steps A, this method further comprises: the refreshing frequency according to indicator light is provided with sampling clock; According to the number of described sampling clock and indicator light, shift clock and latch clock are set;
Described steps A comprises: programmed logical module utilizes counter to carry out sample count according to the sampling clock that is provided with; At the rising edge of described sampling clock, the some modulating signal that samples is exported from the setting pin of self, and exported shift signal and latch signal synchronously according to described shift clock and described latch clock;
Seal in described in the step B/and the latch module that goes out to be shifted be that parallel signal output comprises according to shift signal and latch signal with the conversion of signals of lighting a lamp of described serial output: seal in/and the rising edge of latch module that go out to be shifted at described shift signal, data in self shift register are shifted successively, and described some modulating signal moved into the shift register of self from the setting pin of described programmable logic chip; At the rising edge of described latch signal, with the output of the data parallel in self register.
Preferably, described shift clock is the reverse clock of described sampling clock; The frequency of described latch clock is the 1/N of described sampling clock frequency, and N is the number of indicator light.
Wherein, described sealing in/and the latch module that goes out to be shifted comprise: one seal in/and go out displacement and latch chip, perhaps plural the sealing in of cascade/and go out displacement and latch chip.
From such scheme as can be seen, the present invention will be needed and the some modulating signal of line output by programmed logical module, carry out serial output behind the clock sampling, and light a lamp the signal Synchronization output shift signal and the latch signal of corresponding described serial output; And by seal in/and the latch module that goes out to be shifted be parallel signal output according to described shift signal and latch signal with the conversion of signals of lighting a lamp of described serial output, utilize the parallel signal of described output to light a lamp.Thereby no matter how huge the quantity of indicator light is to make lighting technology among the present invention, all only need take three pins of programmed logical module, therefore the scale of programmed logical module can only be chosen according to the demand of logical block, need not to choose according to the number of indicator light, thereby saved logical resource greatly, further also reduced cost.
Description of drawings
Fig. 1 is the exemplary block diagram of lighting system in the embodiment of the invention;
Fig. 2 is that in the embodiment of the invention uses example;
Fig. 3 is the structural representation of 74AHC595 chip in the application example shown in Figure 2;
Fig. 4 is the sequential chart of each signal in the application example shown in Figure 2;
Fig. 5 is the exemplary process diagram of ignition method in the embodiment of the invention.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, below in conjunction with embodiment and accompanying drawing, the present invention is described in more detail.
Fig. 1 is the exemplary block diagram of lighting system in the embodiment of the invention.As shown in Figure 1, this system comprises: programmed logical module and sealing in/and the latch module that goes out to be shifted.
Wherein, programmed logical module is used for the some modulating signal with needs and line output, carries out serial output behind the clock sampling, and the some modulating signal DS of corresponding described serial output, exports shift signal SH_CLK and latch signal ST_CLK synchronously.Wherein, programmed logical module can be programmable logic chips such as CPLD chip or fpga chip.As seen, the lighting system in the present embodiment only need take three pins of programmable logic chip.
Seal in/and the latch module that goes out to be shifted be used for to be parallel signal output with the conversion of signals of lighting a lamp of described serial output, to utilize the parallel signal of described output to light a lamp according to described shift signal and latch signal.Wherein, seal in/and the latch module that goes out to be shifted can comprise at least one seal in/and go out displacement and latch chip, this chip can be existing chip of the prior art, also can be the chip that will occur future.During specific implementation, can seal in/and go out the parallel output terminal mouth that chip is latched in displacement according to the number of actual indicator light and each, choose seal in/and go out displacement and latch the number of chip, and will respectively seal in/and go out displacement and latch chip and carry out cascade.
In the practical application, can be at first according to the susceptibility of human eye to the indicator light refreshing frequency, the refreshing frequency of indicator light is set, so that human eye is insensitive to the refresh case of indicator light, then according to the refreshing frequency of indicator light, the output serial signals sampling clock of lighting a lamp is set, and, shift clock and latch clock is set according to the number of described sampling clock and indicator light.For example, the reverse clock that sampling clock can be set is as shift clock, and the frequency of sampling clock that 1/N can be set is as the frequency of latch clock, and wherein, N is the number of indicator light.Afterwards, according to the sampling clock that is provided with, utilize counter to carry out sample count, the point modulating signal that different count results is corresponding different, rising edge at described sampling clock, with the some modulating signal that samples, promptly the some modulating signal of count results correspondence is exported from the setting pin of programmed logical module, and exports shift signal and latch signal synchronously according to described shift clock and described latch clock.
Seal in/and the latch module that goes out to be shifted can the data in self shift register be shifted successively at the rising edge of described shift signal, and described some modulating signal moved into the shift register of self from the setting pin of described programmable logic chip; At the rising edge of described latch signal, with the output of the data parallel in self register.
Situation with 24 indicator lights of needs control is an example below, enumerates one and uses example.
Fig. 2 is that in the embodiment of the invention uses example.As shown in Figure 2, in this example, programmed logical module can adopt the CPLD chip, and seal in/and go out displacement and latch chip and can adopt the 74AHC595 chip.
Fig. 3 is the structural representation of 74AHC595 chip.As seen, the 74AHC595 chip comprises: eight shift registers, corresponding eight parallel data output port Q0~Q7, a serial data output port Q7_1, a serial data DS input port, a shift signal SHCP input port, a latch signal STCP input port, an asynchronous low level reset signal MR port and an output useful signal OE port.
In order to realize control to 24 indicator lights, as shown in Figure 2, can adopt three 74AHC595 chips in this example, and described chip is carried out cascade by port Q7_1, obtain Q0 to Q23 totally 24 parallel data output ports.The output port of the serial point modulating signal DS of CPLD chip, output port and the latch signal ST_CLK output port of shift signal SH_CLK are linked to each other with serial data DS input port, shift signal SHCP input port and the latch signal STCP input port of first 74AHC595 chip respectively.
Fig. 4 is the sequential chart of sampling clock REFCLK, shift clock SH_CLK, latch clock ST_CLK and some modulating signal DS.As shown in Figure 4, shift clock is to adopt the reverse clock of clock, and the frequency of latch clock is 1/24 of a sampling clock frequency.Wherein, the CPLD chip is when the rising edge of described sampling clock, the point modulating signal DS that samples is exported from the CPLD chip, and export the signal of shift clock and latch clock correspondence synchronously, rising edge in shift clock, be the trailing edge of sampling clock, the 74AHC595 chip carries out data shift, and will put the register of modulating signal immigration self; At the rising edge of latch clock, with 24 some modulating signals by Q0 to Q23 totally 24 parallel data output ports output.
Should be with in the example, programmable logic chip is parallel lights a lamp if 24 indicator lights all adopt, then the pin of programmable logic chip need increase by 21 again, and the cost that the programmable logic chip scale increases is much larger than the cost of 3 74AHC595 chips, in addition, realize that then complexity and cost will be higher than the complexity and the cost of 3 74AHC595 chips if adopt two programmable logic chips of size.
More than the lighting system in the embodiment of the invention is described in detail, again the ignition method in the embodiment of the invention is described in detail below.
Fig. 5 is the exemplary process diagram of ignition method in the embodiment of the invention.As shown in Figure 5, this flow process comprises the steps:
Step 501, programmed logical module will need and the some modulating signal of line output, carry out serial output behind the clock sampling, and light a lamp the signal Synchronization output shift signal and the latch signal of corresponding described serial output.
In the present embodiment, can the refreshing frequency of indicator light be set,, according to the refreshing frequency of indicator light, sampling clock be set then so that human eye is insensitive to the refresh case of indicator light at first according to the susceptibility of human eye to the indicator light refreshing frequency; According to the number of described sampling clock and indicator light, shift clock and latch clock are set.For example, the reverse clock that sampling clock can be set is as shift clock, and the frequency of sampling clock that 1/N can be set is as the frequency of latch clock, and wherein, N is the number of indicator light.Afterwards, programmed logical module is according to the sampling clock that is provided with, utilize counter to carry out sample count, rising edge at described sampling clock, the point modulating signal that samples is exported from the setting pin of self, and exported shift signal and latch signal synchronously according to described shift clock and described latch clock.
Step 502, seal in/and the latch module that goes out to be shifted be parallel signal output according to described shift signal and latch signal with the conversion of signals of lighting a lamp of described serial output, utilize the parallel signal of described output to light a lamp.
In this step, seal in/and the latch module that goes out to be shifted can the data in self shift register be shifted successively at the rising edge of described shift signal, and described some modulating signal moved into the shift register of self from the setting pin of described programmable logic chip; At the rising edge of described latch signal, with the output of the data parallel in self register.
Wherein, seal in/and the latch module that goes out to be shifted can comprise at least one seal in/and go out displacement and latch chip, this chip can be existing chip of the prior art, also can be the chip that will occur future.During specific implementation, can seal in/and go out the parallel output terminal mouth that chip is latched in displacement according to the number of actual indicator light and each, choose seal in/and go out displacement and latch the number of chip, and will respectively seal in/and go out displacement and latch chip and carry out cascade.
The embodiment of the invention is in order to adapt to the many and state complex of communication equipment indicator light, by lighting a lamp that serial mode is carried out, and the waste of logical resource in the time of can avoiding hardware designs, and then make with low cost.And, enhancing along with modularized design, usually need connector to be connected between programmable logic chip and the indicating lamp module, need the more situation that be used to transmit the pin of indicator light control signal for programmable logic chip in the prior art, connector also needs to have the transmission that more pin is supported the indicator light control signal, in the embodiment of the invention, because programmable logic chip can only need three pins to transmit the control signal and the corresponding shift signal of indicator light, the signal of depositing, make that the required number of pin of corresponding connector also is reduced with it, thus the resource of also having saved connector.
In addition, the present invention has also changed the parallel mode of lighting a lamp traditional on the communication equipment, and a kind of alternative serial mode of lighting a lamp is provided.
Above-described specific embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is preferred embodiment of the present invention; be not to be used to limit protection scope of the present invention; within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.

Claims (7)

1. a lighting system is characterized in that, this system comprises:
Programmed logical module is used for the some modulating signal with needs and line output, carries out serial output behind the clock sampling, and light a lamp the signal Synchronization output shift signal and the latch signal of corresponding described serial output;
Seal in/and the latch module that goes out to be shifted, being used for according to described shift signal and latch signal is parallel signal output with the conversion of signals of lighting a lamp of described serial output, utilizes the parallel signal of described output to light a lamp.
2. the system as claimed in claim 1 is characterized in that, described sealing in/and the latch module that goes out to be shifted comprise: one seal in/and go out displacement and latch chip, perhaps plural the sealing in of cascade/and go out displacement and latch chip.
3. system as claimed in claim 1 or 2 is characterized in that, described programmed logical module comprises: CPLD chip or fpga chip.
4. an ignition method is characterized in that, this method comprises:
A, programmed logical module will need and the some modulating signal of line output, carry out serial output behind the clock sampling, and light a lamp the signal Synchronization output shift signal and the latch signal of corresponding described serial output;
B, seal in/and the latch module that goes out to be shifted be parallel signal output according to described shift signal and latch signal with the conversion of signals of lighting a lamp of described serial output, utilize the parallel signal of described output to light a lamp.
5. method as claimed in claim 4 is characterized in that, before the steps A, this method further comprises: the refreshing frequency according to indicator light is provided with sampling clock; According to the number of described sampling clock and indicator light, shift clock and latch clock are set;
Described steps A comprises: programmed logical module utilizes counter to carry out sample count according to the sampling clock that is provided with; At the rising edge of described sampling clock, the some modulating signal that samples is exported from the setting pin of self, and exported shift signal and latch signal synchronously according to described shift clock and described latch clock;
Seal in described in the step B/and the latch module that goes out to be shifted be that parallel signal output comprises according to shift signal and latch signal with the conversion of signals of lighting a lamp of described serial output: seal in/and the rising edge of latch module that go out to be shifted at described shift signal, data in self shift register are shifted successively, and described some modulating signal moved into the shift register of self from the setting pin of described programmable logic chip; At the rising edge of described latch signal, with the output of the data parallel in self register.
6. method as claimed in claim 5 is characterized in that, described shift clock is the reverse clock of described sampling clock; The frequency of described latch clock is the 1/N of described sampling clock frequency, and N is the number of indicator light.
7. as each described method in the claim 4 to 6, it is characterized in that, described sealing in/and the latch module that goes out to be shifted comprise: one seal in/and go out displacement and latch chip, perhaps plural the sealing in of cascade/and go out displacement and latch chip.
CN2008101034828A 2008-04-07 2008-04-07 Lighting system and method Active CN101257756B (en)

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CN102573195A (en) * 2010-12-31 2012-07-11 北京大唐高鸿数据网络技术有限公司 Centralized display system of indicator lamps
CN103095487B (en) * 2012-11-13 2016-03-23 瑞斯康达科技发展股份有限公司 A kind of Multi-netmouth state indication method and device
CN107396505A (en) * 2017-09-20 2017-11-24 上海乐野网络科技有限公司 A kind of circuit for driving multigroup LED to show
CN114582298A (en) * 2022-03-17 2022-06-03 上海新相微电子股份有限公司 Gamma register configuration circuit for converting serial to parallel

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CN101064983A (en) * 2006-04-27 2007-10-31 马士科技有限公司 Compact light-operated florescent lamp and light-operated circuit thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101064983A (en) * 2006-04-27 2007-10-31 马士科技有限公司 Compact light-operated florescent lamp and light-operated circuit thereof

Non-Patent Citations (1)

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Address after: 310052 Binjiang District Changhe Road, Zhejiang, China, No. 466, No.

Patentee after: NEW H3C TECHNOLOGIES Co.,Ltd.

Address before: 310053 Hangzhou hi tech Industrial Development Zone, Zhejiang province science and Technology Industrial Park, No. 310 and No. six road, HUAWEI, Hangzhou production base

Patentee before: HANGZHOU H3C TECHNOLOGIES Co.,Ltd.

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Patentee after: Beijing Ziguang Communication Technology Group Co.,Ltd.

Address before: 310052 Changhe Road, Binjiang District, Hangzhou, Zhejiang Province, No. 466

Patentee before: NEW H3C TECHNOLOGIES Co.,Ltd.