CN101201388B - Method of on-chip current measurement and semiconductor ic - Google Patents
Method of on-chip current measurement and semiconductor ic Download PDFInfo
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- CN101201388B CN101201388B CN2007101998299A CN200710199829A CN101201388B CN 101201388 B CN101201388 B CN 101201388B CN 2007101998299 A CN2007101998299 A CN 2007101998299A CN 200710199829 A CN200710199829 A CN 200710199829A CN 101201388 B CN101201388 B CN 101201388B
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Abstract
The present invention provides a method for measuring current in chip and a semiconductor integrated circuit for measuring a current of the circuit block in a state in which a chip is normally operated. The semiconductor integrated circuit includes a circuit block (C1) having a predetermined function, a power switch (PSW1) capable of supplying an operating power to the circuit block, and a current measuring circuit (100) for obtaining a current flowing to the circuit block based on a voltage between terminals of the power switch in a state in which the power switch is turned on and an on-resistance of the power switch. The current flowing to the circuit block is obtained based on the voltage between terminals of the power switch in the state in which the power switch is turned on and the on-resistance of the power switch. Thus, it is possible to measure a current of the circuit block in a state in which a chip is normally operated.
Description
Technical field
The measuring technique of the electric current of the circuit block when the present invention relates to the work of semi-conductor chip (being designated hereinafter simply as " chip ").
Background technology
In recent years, along with the raising of semiconductor processing techniques, the miniaturization of minimum process size develops just gradually.As a result, be installed in 1 number of transistors in the chip and increase, the SoC (System On a Chip) that has embedded the major function of computing machine in 1 chip popularizes.SoC is meant the integrated device of functional blocks (circuit block) such as microprocessor, interface controller, multimedia signal dispose processor, storer in 1 chip, dwindled needed area has been installed, compared with the system of a plurality of chips formations and significantly suppressed cost with same function.On the other hand, the SoC under the highly integrated progress produces the problem of current sinking increase along with the increase of number of transistors.The increase of current sinking reduces the thermal value increase of chip, the fiduciary level of chip.In addition, reduced the battery-operated time.Integrated number of transistors increases and along with the transistorized leakage current of miniaturization increases, is to make the current sinking cause of increased in the chip.The kind of current sinking can be divided into two kinds in DC electric current and AC electric current.The DC electric current is so-called leakage current, even as long as be the electric current that provides supply voltage just to produce under the state that circuit does not have to work.And the AC electric current is transistorized charging and discharging currents, is consumed current when circuit working (electric current during work).In the past, in order to reduce current sinking, be devoted to how to reduce leakage current.Below, illustrate the reduction method of the leakage current among the SoC.
SoC is the aggregate of the circuit block cut apart by function.If observe the duty of the SoC of certain moment, then be not that all circuit are all worked.This is owing to be that the circuit block work of satisfying desired function gets final product only.Therefore, provide, can eliminate the leakage current of this circuit block by the power supply that cuts off untapped circuit.This method for example illustrated in patent documentation 1.
What which in addition, in order to analyze, to test or, need to measure in the flowed through technology of electric current of circuit block to the feedback of control.These illustrated in patent documentation 2,3.In patent documentation 2, put down in writing such method, between power lead and each circuit and at least any one party between ground wire and each circuit switchgear is set, when measuring the current sinking of each circuit, make above-mentioned switchgear be in dissengaged positions, between the pad that is arranged at the switchgear two ends, connect measuring equipment and measure current sinking.In patent documentation 3, put down in writing such device, comprised the switchgear of the electric current of this electronic circuit of cut-out that is arranged at each electronic circuit, the pick-up unit of source current that detects this electronic circuit and the proving installation of controlling above-mentioned switchgear according to the output of this pick-up unit.
Recently, the function that SoC is required increases, and increases observing the number of transistors of working in certain moment, and the result can't neglect to such an extent as to the electric current during work constantly increases.Especially in portable set etc., require even a bit will reduce current sinking, the reduction of electric current and the reduction no less important of leakage current when therefore working.In addition, measure which circuit block to have consumed when how much working the method for electric current at important too.
[patent documentation 1] TOHKEMY 2003-218682 communique
The special clear 63-93142 communique of [patent documentation 2] Japan
[patent documentation 3] Japanese kokai publication hei 5-288798 communique
Summary of the invention
In the measurement of electric current, flow into the electric current of the power pin of chip mostly with externally measured apparatus measures during former work.But, though electric current during the work that this method can measured chip integral body, the electric current (being called " electric current in the sheet ") of the circuit block in the work (operate as normal) beyond can not the measured chip test pattern.About this point, above-mentioned patent documentation 1-3 is all less than solving.
The objective of the invention is to, the technology of the electric current of the circuit block of a kind of measurement under the state of chip operate as normal is provided.
Above-mentioned and other purpose of the present invention and new feature will obtain clearly by the description and the accompanying drawing of instructions.
Representational technology in the disclosed invention of the application is simply described as follows.
Promptly, when comprising circuit block and can provide the power switch of work usefulness power supply to the foregoing circuit piece with predetermined function, calculate the voltage between terminals that above-mentioned power switch is switched on the above-mentioned power switch under the state, according to the voltage between terminals of above-mentioned power switch and the conducting resistance of above-mentioned power switch, calculate the electric current that flows into the foregoing circuit piece.
The obtained effect of representational technology is simply described as follows in the disclosed invention of the application.
That is, can measure the electric current of the circuit block under the chip normal operating conditions.
Description of drawings
Fig. 1 is the structure example block diagram as internal logic circuit among the SoC of an example of SIC (semiconductor integrated circuit) of the present invention.
Fig. 2 is the structure example circuit diagram of the amplifier of expression internal logic circuit shown in Figure 1.
Fig. 3 is the figure of layout of the major part of the above-mentioned SoC of explanation.
Fig. 4 is the figure of the power switch layout on every side of the above-mentioned SoC of explanation.
Fig. 5 is the cut-open view of the major part of Fig. 4.
Fig. 6 is the process flow diagram of step of the current measurement of above-mentioned SoC.
Fig. 7 is another structure example block diagram of the major part of above-mentioned SoC.
Fig. 8 is the structure example circuit diagram of the amplifier of Fig. 7.
Fig. 9 is another structure example block diagram of the major part of above-mentioned SoC.
Figure 10 is the structure example circuit diagram of the voltage frequency conversioning circuit of Fig. 9.
Figure 11 is the structure example circuit diagram of the frequency-voltage conversion circuit of Fig. 9.
Figure 12 is another structure example block diagram of the major part of above-mentioned SoC.
Figure 13 is the structure example circuit diagram of regulator shown in Figure 12.
Figure 14 is the structure example circuit diagram of amplifier shown in Figure 12.
Figure 15 is the structure example block diagram that comprises as the custom system of the SoC of an example of SIC (semiconductor integrated circuit) of the present invention.
Figure 16 is the structure example block diagram that comprises as internal logic circuit among the SoC of an example of the SIC (semiconductor integrated circuit) of second embodiment of the invention.
Figure 17 is the synoptic diagram of the peak power control of second embodiment of the invention.
Figure 18 is the process flow diagram of step of feedback of the SoC of Figure 16.
Embodiment
1. representational embodiment.
The summary of the representational embodiment of invention disclosed among the application at first, is described.In the summary description to representational embodiment, the Reference numeral of additional bracket reference only example illustrates textural element included in the notion of the textural element of giving this Reference numeral.
[1] current measuring method is as follows in the sheet of representational embodiment of the present invention: comprising the circuit block (C1) with predetermined function and can provide the foregoing circuit piece in the SIC (semiconductor integrated circuit) (SoC) of work with the power switch (PSW1) of power supply, being provided with first handles and second processing, wherein, the voltage between terminals that above-mentioned power switch is switched on the above-mentioned power switch under the state is calculated in above-mentioned first processing; Above-mentioned second processing is calculated the electric current that flows into the foregoing circuit piece according to the voltage between terminals of above-mentioned power switch and the conducting resistance of above-mentioned power switch.
According to said structure, calculate the voltage between terminals that above-mentioned power switch is switched on the above-mentioned power switch under the state, according to the voltage between terminals of above-mentioned power switch and the conducting resistance of above-mentioned power switch, calculate the electric current that flows into the foregoing circuit piece.Thus, can under being the state of operate as normal, chip carry out the current measurement of circuit block.
[2] at this moment, the electric current result of calculation that will obtain in above-mentioned second handles via the outside terminal of above-mentioned SIC (semiconductor integrated circuit) outputs to the outside, makes it possible to carry out the exterior monitoring of above-mentioned electric current result of calculation.
[3] according to another viewpoint, constitute SIC (semiconductor integrated circuit), this SIC (semiconductor integrated circuit) comprises the circuit block (C1) with predetermined function; Can provide the power switch (PSW1) of work to the foregoing circuit piece with power supply; And the voltage between terminals of the above-mentioned power switch under the state that is switched on according to above-mentioned power switch and the conducting resistance of above-mentioned power switch, calculate the current measurement circuit (100) of the electric current that flows into the foregoing circuit piece.
According to the SIC (semiconductor integrated circuit) of said structure, the voltage between terminals of the above-mentioned power switch under the state that current measurement circuit is switched on according to above-mentioned power switch and the conducting resistance of above-mentioned power switch are calculated the electric current that flows into the foregoing circuit piece.
[4] at this moment, above-mentioned current measurement circuit comprises: amplifier (Amp1), and the voltage between terminals of the above-mentioned power switch under the state that is used for above-mentioned power switch is switched on is converted to its corresponding electric current; AD converter (ADC1) is used for the output signal of above-mentioned amplifier is converted to digital signal; And computing circuit (DSP1), can calculate the electric current that flows into the foregoing circuit piece according to the conversion output of above-mentioned AD converter.
When [5] many group foregoing circuit pieces and the above-mentioned power switch corresponding with it being set, above-mentioned amplifier and above-mentioned power switch dispose a plurality of accordingly.
[6] above-mentioned amplifier and above-mentioned power switch dispose when a plurality of accordingly, and above-mentioned current measurement circuit also comprises traffic pilot (MUX1), this traffic pilot can with the output signal selection of above-mentioned a plurality of amplifiers output to above-mentioned AD converter.
[7] in addition, in order to make the shared above-mentioned AD converter of above-mentioned a plurality of amplifier, above-mentioned computing circuit, above-mentioned current measurement circuit also comprises controller (CTL2), this controller can be by the above-mentioned a plurality of amplifiers of control, with the output signal selection of above-mentioned a plurality of amplifiers output to above-mentioned AD converter.
[8] above-mentioned current measurement circuit also comprises: voltage frequency conversioning circuit (VFC1), and the voltage between terminals of the above-mentioned power switch under the state that is used for above-mentioned power switch is switched on is converted to its corresponding oscillation frequency; Frequency-voltage conversion circuit (FVC) is used for the output signal of above-mentioned voltage frequency conversioning circuit is converted to its corresponding voltage; And computing circuit (DSP2), can calculate the electric current that flows into the foregoing circuit piece according to the conversion output of said frequencies voltage conversion circuit.
When [9] many group foregoing circuit pieces and the power switch corresponding with it being set, above-mentioned voltage frequency conversioning circuit disposes a plurality of with above-mentioned power switch accordingly.
[10] according to another viewpoint, constitute SIC (semiconductor integrated circuit), this SIC (semiconductor integrated circuit) comprises: circuit block (C1) has predetermined function; Regulator (Reg1) has the transistor (MP3) that is used to reduce supply voltage, by control the work voltage that above-mentioned transistorized conducting resistance forms the foregoing circuit piece according to reference voltage; And current measurement circuit (100), via above-mentioned transistor the foregoing circuit piece being provided above-mentioned work, calculate the electric current that flows into the foregoing circuit piece according to above-mentioned transistor drain-voltage between source electrodes with under the state of voltage.
According to the SIC (semiconductor integrated circuit) of said structure, current measurement circuit is calculated the electric current that flows into the foregoing circuit piece via above-mentioned transistor the foregoing circuit piece being provided work with under the state of voltage according to above-mentioned transistor drain-voltage between source electrodes.Thus, can under the state of chip operate as normal, carry out the current measurement of circuit block.
[11] above-mentioned current measurement circuit comprises: amplifier (Ampn1) is used for and will provides above-mentioned work to be converted to its corresponding electric current with the above-mentioned transistor drain-voltage between source electrodes under the state of voltage to the foregoing circuit piece via above-mentioned transistor; AD converter (ADC1) is used for the output signal of above-mentioned amplifier is converted to digital signal; And computing circuit (100), can calculate the electric current that flows into the foregoing circuit piece according to the conversion output of above-mentioned AD converter.
When [12] many group foregoing circuit pieces and the above-mentioned regulator corresponding with it being set, above-mentioned amplifier and above-mentioned regulator dispose a plurality of accordingly.
2. the explanation of embodiment
Below, further describe embodiment.
All figure being used for illustrating embodiment give same label to same parts in principle, omit it and explain over and over again.In addition, each textural element of formation semiconductor device, each signal name etc. only describe with the label of giving it sometimes.
Figure 15 represents as the SoC of an example of SIC (semiconductor integrated circuit) of the present invention (SystemOn a Chip).SoC shown in Figure 1 is not limited especially, but utilizes known SIC (semiconductor integrated circuit) manufacturing technology, for example is formed on Semiconductor substrate such as monocrystalline substrate.This SoC is coupled with external memory storage MEM in custom system, can utilize the internal logic circuit LC visit said external memory MEM of SoC.
Fig. 1 represents the structure example of above-mentioned internal logic circuit LC.
Above-mentioned internal logic circuit LC comprises current measurement circuit 100, this current measurement circuit be used for measure flowing into a plurality of power supply area Area1, Area2 ..., AreaN and above-mentioned a plurality of power supply area Area1, Area2 ..., the electric current of circuit block C1 that AreaN comprised.Above-mentioned a plurality of power supply area Area1, Area2 ..., circuit block C1 that AreaN comprised, do not limited especially, but be respectively functional module, as CPU (central processing unit), baseband processor, application processor, storer or Interrupt Process controller etc. with predetermined function.
Power supply area Area1, Area2 ..., AreaN provided hot side power supply (VDD) and the earthing power supply VSS inequality respectively with the power supply that uses at other power supply areas independently of one another.In addition, at these power supply areas, by distinguish independent control setting in Area1 in the power switch (being PSW1) of each power supply area, the power supply that can cut off each circuit block C1.Power switch is not limited especially, but is taken as the n channel type MOS transistor.Above-mentioned current measurement circuit 100 comprises amplifier Amp1～AmpN, traffic pilot MUX1, MUX controller CTL1, AD (analog/digital) converter ADC1, digital signal processor DSP 1, read only memory ROM 1.Generally, above-mentioned amplifier Amp1～AmpN, ADC1 are mimic channel.Above-mentioned amplifier Amp1～AmpN has following function, promptly power supply area Area1, the Area2 of correspondence ..., when the power switch PSW1 among the AreaN connects, will be converted to its corresponding electric current because of flowing through the terminal voltage that electric current I produces between drain electrode-source electrode.Traffic pilot MUX1 is optionally with the lead-out terminal of above-mentioned amplifier Amp1～AmpN and the AD converter ADC1 coupling of back level.This work is controlled by MUX controller CTL1.The output signal of above-mentioned AD converter ADC1 is transferred to the digital signal processor DSP 1 of back level.This digital signal processor DSP 1, according to the output signal of above-mentioned AD converter ADC1, calculate to flow into above-mentioned power supply area Area1, Area2 ..., the electric current of the power switch PSW1 among the AreaN, promptly flow into the electric current of corresponding circuit block C1.The information of the amplification coefficient α of known amplifier when in ROM1, storing conducting resistance R, the design of known power switch of when design.When calculating electric current, as required with reference to the canned data of ROM1.ROM1 can be made of nonvolatile memories such as ROM (read-only memory) such as mask ROM or flash memories.The output signal Dout1 of digital signal processor DSP 1 can output to the outside by the outside terminal Output of SoC.In addition, the output signal Dout1 of digital signal processor DSP 1, can be transferred to as required above-mentioned power supply area Area1, Area2 ..., AreaN, be used for FEEDBACK CONTROL.For example, if power supply area AreaN is the Interrupt Process controller, then during the current value more than flowing through standard, can control and make the CPU that in other power supply areas, installs give notice, the power supply of regulating chip integral body provides voltage, frequency of operation or Processing tasks number etc., current value is reduced to below the mark.
In this example, carry out in the process of operate as normal, also can measure the electric current that flows into each circuit block C1 as described below at chip.
The electric current that flows into circuit block C1 is temporarily compiled by power switch PSW1.Therefore, by the flow through electric current I of power switch of measurement, can obtain the electric current that flows into circuit block C1.Used power switch in order to measure the electric current that flows into circuit block in the prior art.But this power switch plays a role with switch as the selection of measured circuit block eventually.Therefore, be switched on or switched off by the power switch that only makes the circuit block that to measure and only make this circuit block work.That is, when chip is operate as normal (a plurality of circuit block work in the general operate as normal) state, can not carry out the current measurement of each circuit block.But,, can power supply be provided and make the chip operate as normal all or a part of power supply area on one side, Yi Bian carry out the current measurement of single circuit block C1 according to this example.
At this, according to the step of the current measurement in this example of flowchart text of Fig. 6.
At first, connect as the pairing power switch PSW1 of the circuit block C1 of measuring object (ST1).Thus, the working current I that flows through among the power switch PSW1 is because of the conducting resistance of power switch PSW1 produces voltage drop (ST2).Utilize this voltage drop, the voltage between the node (Vd) of the circuit block side among the power switch PSW1 and the node (Vs) of earthing potential side is transferred to corresponding amplifier Amp1, carries out electric current and voltage conversion (ST3) in this amplifier Amp1.The output signal of amplifier Amp1 optionally is transferred to AD converter ADC1 (ST4) by traffic pilot MUX1, and this signal is transferred to digital signal processor DSP 1 after being converted into digital signal (ST5).In digital signal processor DSP 1,, calculate the electric current that flows into power switch PSW1, promptly flow into the electric current (ST6) of circuit block C1 according to the conducting resistance of terminal voltage and the power switch PSW1 of power switch PSW1.The information of the conducting resistance of power switch PSW1 is stored among the ROM1 in advance, and this information is by digital signal processor DSP 1 reference.The electric current that flows into circuit block C1 can be by obtaining with the conducting resistance of the known power switch (PSW1) when designing of the voltage between the node (Vs) of the node (Vd) of the circuit block side of power switch and earthing potential side.In above-mentioned current measurement, also it doesn't matter even the power switch of all power supply areas is all connected, the current measurement of each circuit block in the time of therefore can carrying out the chip operate as normal.Operation result in the above-mentioned digital signal processor DSP 1 is fed to internal circuit, or outputs to outside (ST7) by outside terminal Output.
Because the conducting resistance of power switch PSW1 is less, so voltage is that signal intensity is less about 10mV between the Vd-Vs in the expectation actual chips.Therefore, if make when this signal transmitted in chip everywhere then might sneak into noise like this.Therefore, near the circuit block that amplifier Amp1～AmpN is arranged on correspondence, can shorten the length of signal transmission path from power switch to pairing amplifier Amp1～AmpN as far as possible.So, even sneak into a little noise, also can carry out current with high accuracy and measure.
Fig. 2 represents the structure example of above-mentioned amplifier Amp1～AmpN.
This amplifier is roughly divided then and comprised: the voltage in Out1 input is carried out the source follower circuit SF1 of voltage transitions, is the current mirroring circuit CM that is formed by p channel type MOS transistor MP1, MP2 of current signal with voltage transitions.The magnification α roughly available p channel type MOS transistor MP1 of this circuit and the component size of MP2 are recently represented.Vbias1 is the offset signal that is used to make SF1 work.MN1 is the N channel type MOS transistor that is used for the output voltage signal of SF1 is converted to current signal.This amplifier is a mimic channel, therefore is applied in the voltage VCC higher than the vdd voltage of digital circuit (about 3V).
Fig. 3 represents the layout of the major part of above-mentioned SoC.
Power supply area is made of these 5 of Area1～Area5.(PSW1～PSW5) is present in the both sides of each circuit block to power switch substantially.Each power supply area is made of so-called digital circuit, and amplifier Amp1～AmpN (mimic channel) is arranged on mimic channel (near the An1～An5).Thus, the distance of transmission feeble signal in chip can be shortened, high-precision measurement can be carried out.Because AD converter ADC can be shared in chip, so be arranged at certain of chip.DSP1 can be arranged at any one among power supply area Area1～Area5.
Fig. 4 represents the layout around the above-mentioned power switch.
In Fig. 4, connect up with the first metal layer M1 in the wiring that the x direction is extended, arrange VDD power lead VDDM1 and illusory ground connection (VSSM) power lead VSSMM1.VSSM is the power lead that can be cut into real ground connection (VSS) by power switch described later.The wiring of extending in the y direction use with the first metal layer of x direction wiring different, for example the second metal level M2 connects up.VDD and VSSM reduce so seek resistance by the vertical main line (VDDM2, VSSMM2) of concatenate rule owing to connect up globally at power supply area.In Fig. 4, only illustrate one respectively, but the voltage drop during for the electric current of requirements such as operating rate that internal logic circuit will be provided is controlled in the setting, rule and suitably being configured.Configuration is called as the layout of the such basic circuit of negative circuit (INV), NAND circuit (NAND), NOR circuit (NOR), the trigger (FF) of standard block in power supply area.Power switch PSW is formed by drain side diffusion layer DINV, grid G ATE1, source-side diffusion layer SINV.PSW is formed by NMOS usually.DINV is connected by the contact with VSSMM1, and SINV is connected by the contact with new ground connection VSS.That suitable with Vd node among Fig. 1 is VSSM, and that corresponding with the Vs node is VSS.Usually, thus VSS, VSSM because to be connected impedance low with the vertical main line of rule.Therefore, the test point of Vd, Vs in VSS, VSSM, have respectively 1 just much of that.On the other hand, the benefit that multi-point sampler point is set is to absorb a small amount of voltage error that produces in the power supply area.
Generally, the grid oxidation film of power switch forms thicklyer than the standard block in the power supply area.During disconnecting power switch GATE1 is set at low level (0V), during the energized switch GATE1 is set at high level (1.5V).Thus, control the annexation of illusory ground connection VSSM and new ground connection VSS.
The A-A ' of Fig. 5 presentation graphs 4, the section of B-B '.
The section of the A-A ' of (a) presentation graphs 4 of Fig. 5.Be by being formed on N type trap (Nwell) on the P type substrate (Psub), being formed on the 3 heavy well structures that the P type trap (PW1, Pwell) on the Nwell constitutes.Power switch is the N channel type MOS transistor that is formed at PW1.Form the PMOS of a part that is equivalent to the standard block in the power supply area across element Disengagement zone (ST1).GP, DP, SP are equivalent to grid, drain electrode, source electrode respectively.
The section of B-B ' in (b) presentation graphs 4 of Fig. 5.Said identical with the front, be 3 heavy well structures, the structure of power switch is also identical.Across ST1 formation is the NMOS that is equivalent to the part of standard block.GN, DN, SN are equivalent to grid, drain electrode, source electrode respectively.
According to above-mentioned example, can obtain following action effect.
(1) in the aggregate SoC of the circuit block of cutting apart by function, can under the normal operating conditions of chip, estimate, measure and analyze each circuit block institute consumed current value.In addition,, can feed back, thereby can improve the fiduciary level of chip chip controls based on the current value of measuring.
(2) because the conducting resistance of power switch PSW1 is less, so voltage is 10mV between the Vd-Vs in the expectation actual chips, signal intensity is less, but near the circuit block that amplifier Amp1～AmpN is arranged on correspondence, shorten as far as possible from power switch to the length of the signal transmission path of its corresponding amplifier Amp1～AmpN, even then sneak into a little noise, also can carry out current with high accuracy and measure.
(3) when the electric current that continues in circuit block more than the standard of flowing through, the thermal value of chip will increase, and the fiduciary level of chip will be reduced, and therefore, the electric current of the circuit block when measuring operate as normal as described above will help to improve the fiduciary level of chip.In addition, because the electric current of each circuit block can measure operate as normal the time, so evaluation analysis chip easily.
Fig. 7 represents other structure example of major part among the above-mentioned SoC.
The maximum differential of structure shown in Figure 7 and structure shown in Figure 1 is, has omitted traffic pilot MUX, utilizes the direct control amplifier Ampc1～AmpcN of control line SIG by controller CTL2, thereby has omitted traffic pilot MUX this point.For example, in the time will making Ampc1 work, the SIG that only will be input to Ampc1 is taken as high level, other control lines SIG is taken as low level gets final product.
The structure example of amplifier Ampc1 in Fig. 8 presentation graphs 7.Other amplifier architectures are identical.
Be imported into amplifier from Vd, Out1, the Out2 of Vs voltage signal of power supply area Area1 output, this is with shown in Figure 2 identical.In addition, the structure of amplifier body AMP is with shown in Figure 2 identical.In structure shown in Figure 7, newly-increased between the power supply VCC of amplifier and ground connection power switch (PSWAD, PSWAS) is set, and is provided with the switch (SW1) of amplifier.For example when having selected Area1, signal wire SIG1 is a high level, n channel type MOS transistor PSWAD, PSWAS conducting, and pair amplifier AMP provide power supply.In addition this moment, switch SW 1 is connected, and the output signal of amplifier AMP is exported from lead-out terminal AoutX.On the other hand, signal wire SIG1 is a low level, and n channel type MOS transistor PSWAD, PSWAS end, and pair amplifier AMP does not provide power supply.In addition, switch SW 1 disconnects, and prevents that neutral signal from outputing to lead-out terminal AoutX.
According to such structure, the state of the amplifier AMP work that is connected with measured power supply area appears having only, can suppress other amplifier institute consumed current, can realize that therefore the power consumption among the SoC reduces.
Fig. 9 represents other structure example of major part among the above-mentioned SoC.
The maximum differential of structure shown in Figure 9 and structure shown in Figure 1 is, replace amplifier among Fig. 1 be provided with voltage frequency conversioning circuit VFC1, VFC2 ..., VFCN, cut down the needed analog circuit area this point of each power supply area.From each voltage frequency conversioning circuit VFC1, VFC2 ..., VFCN output signal Aoutf1, Aoutf2, this signal is optionally offered frequency-voltage conversion circuit FVC by the traffic pilot MUX2 of back level.The work of multipath conversion MUX2 is controlled by controller CTL3.Voltage frequency conversioning circuit VFC1, VFC2 ..., VFCN vibrates with the voltage correspondent frequency that is transfused to respectively.Frequency-voltage conversion circuit FVC is converted into voltage according to the frequency of the signal of being imported.The output voltage of frequency-voltage conversion circuit FVC is provided for the DSP2 of back level.
During working voltage freq converting circuit VFC, the signal of importing from each power supply area is 3 systems.Promptly from the voltage level signal Out3 of hot side power vd D and two end signal Out4, the Out5 of power switch PSW1.Need the reason of voltage level signal Out3 to be, under the small voltage of degree between Vd-Vs, do not work as the characteristic of voltage frequency conversioning circuit.The Signal Processing mode of these 3 systems will be explained below.
Figure 10 represents the structure example of above-mentioned voltage frequency conversioning circuit VFC1.The structure of the voltage frequency conversioning circuit of other power supply areas is also identical.
Above-mentioned voltage frequency conversioning circuit VFC1 has 2 ring oscillators.This ring oscillator is formed by connecting by odd number phase inverter INV.Known this ring oscillator is to vibrate with the roughly proportional frequency of difference of supply voltage that is provided (source potential of p channel type MOS transistor) and ground voltage (source potential of n channel type MOS transistor).Therefore, hot side power vd D and node Vd voltage, hot side power vd D and node Vs voltage as input, are converted to frequency output with separately voltage difference.Finally, calculate the voltage difference of Vd-Vs, thereby obtain the electric current that flows into power switch PSW1 from its difference on the frequency.
The input of higher level's ring oscillator is Out3 (VDD), Out4 (Vd) among Figure 10, and the input of subordinate's ring oscillator is Out3 (VDD), Out5 (Vs) among Figure 10.To the waveform of Aoutf1～Aoutf2 output to vibrate with the roughly proportional frequency of voltage difference separately.From the signal of voltage frequency conversioning circuit VFC1 output is the oscillator signal of ring oscillator, even therefore sneak into noise a little, also because little and can carry out current with high accuracy and measure to the influence of this frequency.Output Aoutf1～Aoutf2 is imported into frequency-voltage conversion circuit FVC via traffic pilot MUX2.
Figure 11 represents the structure example of said frequencies voltage conversion circuit FVC.
In said frequencies voltage conversion circuit FVC, signal Aoutf1, the Aoutf2 that is imported is converted to the voltage that depends on frequency by the frequency-voltage conversion circuit FVCC of inside.In addition, these voltages are converted to electric current by the amplifier AMP of back level, and further the AD converter ADC by the back level is converted to digital signal.That is, the signal that outputs to DSPin1 is the information of voltage between VDD-Vd, and the information that outputs to DSPin2 is the information of voltage between VDD-Vs.Digital signal processor DSP 2 is according to the voltage between these information calculations Vd-Vs, and is later on identical with situation shown in Figure 1, calculates the current value of the power switch that flows into measured object.
According to said structure, can form the VFC circuit that is provided with each power supply area by enough standard blocks, can reduce area of chip.In addition, the information of exporting from VFC is frequency, therefore is not subject to The noise, can carry out current with high accuracy and measure.
Figure 12 represents other structure example of major part among the above-mentioned SoC.
The maximum differential of structure shown in Figure 12 and structure shown in Figure 1 is, utilizes regulator Reg1 to carry out the power supply of the circuit block C1 of each power supply area is provided, and carries out the current measurement this point of circuit block C1 by this regulator Reg1.When using regulator, use the supply voltage VCC higher than the hot side supply voltage VDD of logical circuit.
Figure 13 represents the structure example of the regulator of power supply area Area1.The controller structure of other power supply areas is identical.
Regulator Reg1 is coupled to form by reference voltage generating circuit VREFC, operational amplifier OPAmp, p channel type MOS transistor MP3.Operational amplifier OPAmp work makes the output voltage of node Vrs and reference voltage generating circuit VREFC equate.For example, when Vrs was lower than reference value, the voltage that operational amplifier OPAmp output is lower will make the voltage of node Vrs get back to reference value.Provide stable power to circuit block C1 thus.When SoC at the chip operation state acute variation has taken place (when especially resetting), circuit can delay work because of the voltage drop that chip internal takes place sometimes.Different therewith, if use regulator Reg1 then can alleviate such problem.For the electric current that flows into circuit block C1, measuring the electric current that flows into p channel type MOS transistor MP3 gets final product, identical with the situation of power switch shown in Figure 1, drain side node voltage (Vrd), the source side node voltage (Vrs) with p channel type MOS transistor MP3 outputs to Out6, Out7 respectively.This output is transferred to amplifier Ampn1～AmpnN, is converted to electric current there.
Figure 14 represents the structure example of above-mentioned amplifier Ampn1.The structure of other amplifiers is identical.
The maximum differential of structure shown in Figure 14 and structure shown in Figure 2 is to import the structure of elementary source follower SF2.From signal Out6, the Out7 of each power supply area output is value near high-voltage power supply, therefore, except with as shown in Figure 2 SF1 like that by the p channel type MOS transistor constitute different, the later circuit structure of this source follower SF2, circuit working etc. are with shown in Figure 2 identical.
Can power switch PSW1 be set at each power supply area.In addition, be provided with regulator Reg1 and power switch PSW1 the two the time, also can use any one party to carry out the current measurement of circuit block C1.
Figure 16 represents the major part of the SIC (semiconductor integrated circuit) of second embodiment of the invention.In the present embodiment, record serves as to trigger the mechanism that chip controls is fed back with the current value of measuring in chip.It is that the maximum current of chip is suppressed to certain below the value that the purpose of feedback for example has temperature with chip.SIC (semiconductor integrated circuit) rises to certain in temperature and is worth when above, and the ruined probability of function improves.In addition, the exothermic character that also encapsulated sometimes of the thermal value of chip, the restriction of environment for use.Based on such reason, the temperature control of implementing chip is extremely important.Below, illustrate by the electric current in the measured chip maximum current of chip is controlled to be the following mechanism of certain value.
The SoC of system comprises explorer RM, CPU1, CPU2, functional block FB1, FB2, timer TMR, RAM, ROM, bus arbiter ARB, interruptable controller INTA, efficient testing circuit 14, efficient counter PPC, the CLK of clock frequency control portion, internal bus BUS, power switch 28, amplifier Amp and current measurement circuit CD in the sheet.Explorer RM comprises instruction decoder DEC, control part CTL, the CWM of current management portion, the TSKM of task management portion and interruptable controller INTC.Current measurement circuit CD for example as above-mentioned embodiment shown in Figure 1 comprises traffic pilot MUX1, controller CTL1, analog-digital converter ADC1, read only memory ROM 1, digital signal processor DSP 1.In the present embodiment, CPU1, CPU2, FB1, FB2 are separately positioned on single power supply area.
Figure 17 represents the signal of the maximum current control of second embodiment of the invention.The transverse axis express time, the longitudinal axis is represented current value.Functional block FB0, FB1, FB2 represent with the rectangle of processing time and electric current respectively.Processing separately is provided with closing time (deadline).At this, in order simply to be made as the identical time.Current value is represented with the aggregate value of the functional block under certain time.Chip current is represented with the total area of rectangle.(a) be the situation that does not have maximum current management, therefore functional block FB0, FB1, FB2 carry out lowest high-current value simultaneously and are the aggregate value of electric current separately, bigger.(b) be the situation of having carried out, begin to postpone, they are not carried out simultaneously with functional block FB0, therefore can reduce lowest high-current value by the execution that makes functional block FB1, FB2 based on the maximum current control that postpones.This carries out beginning by control and realizes to meet determined electric current budget, closing time.(c) be the situation of carrying out maximum current control by controlled frequency, by make functional block FB0, FB1, FB2 all with low clock frequency work meeting electric current budget, closing time, thereby reduce lowest high-current value.(b), (c) will further reduce the electric current budget, just can not satisfy closing time.Therefore, control so that electric current budget and closing time all are met.Satisfy the processing of closing time, because therefore the processing that was through with is called real-time processing before wanting seeking time.
Figure 18 represents by reducing clock frequency the maximum current of chip to be controlled to be the process flow diagram of certain value when following.Below describe this process flow diagram in detail.TMR interrupts to the INTC of explorer RM notice at interval with the preset time of counting ms etc.Accept the explorer RM that interrupts, obtained the current value that flows into CPU1, CPU2, FB1, each circuit block of FB2 from CD.Simultaneously, the TSKM in the explorer RM, the mission bit stream of renewal cpu function piece, assurance is which task is which functional unit carrying out.In addition, obtain the task progress degree of each circuit block from efficient counter PPC.Then, explorer RM calculates the summation I_sum of the current value that flows into each circuit block.At this moment, preestablished the lowest high-current value I_max that chip is allowed at the CWM of current management portion.The value of the lowest high-current value that will allow smaller or equal to chip is set at I_max.As I_sum during, wait for interruption once more from TMR less than I_max.As I_sum during greater than I_max, according to the task progress degree of each circuit block that obtains from PPC with by TSKM managerial role information, choosing then 1 above task progress degree has more than needed and just at the circuit block of the low task of execution priority.Explorer RM sends the signal of the clock frequency that reduces the circuit block of selecting to the CLK of clock frequency control portion.Then, the CLK of clock frequency control portion reduces the clock frequency that offers the circuit block of selecting.As a result, the current value that flows into chip reduces, and the temperature that can suppress chip rises, and improves the fiduciary level of SIC (semiconductor integrated circuit).As I_sum during less than I_max, can increase clock frequency, task is handled at short notice finished.
Below understand the invention that the present inventor carries out specifically, but the invention is not restricted to this, obviously in the scope that does not break away from its purport, can carry out all changes.
Illustrated mainly that in the above description the invention that the present inventor is carried out is applied to become the situation of SoC of the application of its background, but the invention is not restricted to this, can be widely used in various SIC (semiconductor integrated circuit).
Claims (11)
1. a SIC (semiconductor integrated circuit) is characterized in that: comprise
Circuit block with predetermined function;
Can provide the power switch of work to the foregoing circuit piece with power supply; And
The voltage between terminals of the above-mentioned power switch under the state that is switched on according to above-mentioned power switch and the conducting resistance of above-mentioned power switch are calculated the current measurement circuit of the electric current that flows into the foregoing circuit piece, wherein,
Above-mentioned current measurement circuit comprises:
Voltage frequency conversioning circuit, the voltage between terminals of the above-mentioned power switch under the state that is used for above-mentioned power switch is switched on is converted to its corresponding oscillation frequency;
Frequency-voltage conversion circuit is used for the output signal of above-mentioned voltage frequency conversioning circuit is converted to its corresponding voltage; And
Computing circuit can calculate the electric current that flows into the foregoing circuit piece according to the conversion output of said frequencies voltage conversion circuit.
2. SIC (semiconductor integrated circuit) according to claim 1 is characterized in that:
Above-mentioned current measurement circuit comprises
Amplifier, the voltage between terminals of the above-mentioned power switch under the state that is used for above-mentioned power switch is switched on is converted to its corresponding electric current;
AD converter is used for the output signal of above-mentioned amplifier is converted to digital signal; And
Computing circuit can calculate the electric current that flows into the foregoing circuit piece according to the conversion output of above-mentioned AD converter.
3. SIC (semiconductor integrated circuit) according to claim 2 is characterized in that:
Be provided with many group foregoing circuit pieces and the above-mentioned power switch corresponding with it,
Above-mentioned amplifier disposes a plurality of with above-mentioned power switch accordingly.
4. SIC (semiconductor integrated circuit) according to claim 3 is characterized in that:
Above-mentioned current measurement circuit also comprises traffic pilot, this traffic pilot can with the output signal selection of above-mentioned a plurality of amplifiers output to above-mentioned AD converter.
5. SIC (semiconductor integrated circuit) according to claim 3 is characterized in that:
Above-mentioned current measurement circuit also comprises controller, and this controller can be by the above-mentioned a plurality of amplifiers of control, with the output signal selection of above-mentioned a plurality of amplifiers output to above-mentioned AD converter.
6. SIC (semiconductor integrated circuit) according to claim 1 is characterized in that:
Be provided with many group foregoing circuit pieces and the power switch corresponding with it,
Above-mentioned voltage frequency conversioning circuit disposes a plurality of with above-mentioned power switch accordingly.
7. SIC (semiconductor integrated circuit) according to claim 1 is characterized in that:
Above-mentioned SIC (semiconductor integrated circuit) also has the explorer of the working clock frequency of control foregoing circuit piece,
Above-mentioned explorer according to the measurement result and the predetermined lowest high-current value of above-mentioned current measurement circuit, is determined above-mentioned working clock frequency.
8. a SIC (semiconductor integrated circuit) is characterized in that: comprise
Circuit block has predetermined function;
Regulator has the transistor that is used to reduce supply voltage, by control above-mentioned transistorized conducting resistance according to reference voltage, forms the work voltage of foregoing circuit piece; And
Current measurement circuit via above-mentioned transistor the foregoing circuit piece being provided work with under the state of voltage, is calculated the electric current that flows into the foregoing circuit piece according to above-mentioned transistor drain-voltage between source electrodes, wherein:
Above-mentioned current measurement circuit comprises:
Amplifier is used for and will provides above-mentioned work to be converted to its corresponding electric current with the above-mentioned transistor drain-voltage between source electrodes under the state of voltage to the foregoing circuit piece via above-mentioned transistor;
AD converter is used for the output signal of above-mentioned amplifier is converted to digital signal; And
Computing circuit can be exported according to the conversion of above-mentioned AD converter and calculate the electric current that flows into the foregoing circuit piece,
Be provided with many group foregoing circuit pieces and the above-mentioned regulator corresponding with it,
Above-mentioned amplifier is corresponding with above-mentioned regulator and dispose a plurality of.
9. SIC (semiconductor integrated circuit) according to claim 8 is characterized in that:
Above-mentioned current measurement circuit is obtained the electric current that flows into the foregoing circuit piece when above-mentioned a plurality of circuit blocks provide above-mentioned work with voltage at above-mentioned a plurality of regulators.
10. a SIC (semiconductor integrated circuit) is characterized in that: comprise
A plurality of circuit blocks, this circuit block has predetermined function;
A plurality of power switches, this power switch is arranged in each of above-mentioned a plurality of circuit blocks, and the work power supply can be provided;
A plurality of current measurement circuits, this current measurement circuit is arranged in each of above-mentioned a plurality of power switches, according to the voltage between terminals of power switch corresponding in above-mentioned a plurality of power switches and the conducting resistance of above-mentioned power switch, calculate the electric current that flows into circuit block corresponding in above-mentioned a plurality of circuit blocks; And
Explorer, control is provided to each working clock frequency of above-mentioned a plurality of circuit blocks,
Above-mentioned explorer has the task management portion that keeps mission bit stream, this mission bit stream is represented the progress by a plurality of tasks of above-mentioned a plurality of circuit blocks execution, above-mentioned explorer is relatively by above-mentioned a plurality of current measurement circuits measured current value sum and predetermined lowest high-current value, when surpassing lowest high-current value by the measured current value sum of above-mentioned a plurality of current measurement circuits, above-mentioned mission bit stream according to being stored in the above-mentioned task management portion determines whether to reduce the frequency to each work clock that provides of above-mentioned a plurality of circuit blocks.
11. SIC (semiconductor integrated circuit) according to claim 10 is characterized in that:
Above-mentioned explorer also has efficient counter and the timer of the metering schedule time of metering by the progress of a plurality of tasks of above-mentioned a plurality of circuit blocks execution,
Above-mentioned task management portion when the timing time of above-mentioned timer has reached the schedule time, utilizes above-mentioned efficient counter to be taken into the progress of above-mentioned task.
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006335314 | 2006-12-13 | ||
| JP2006-335314 | 2006-12-13 | ||
| JP2006335314 | 2006-12-13 | ||
| JP2007-282958 | 2007-10-31 | ||
| JP2007282958 | 2007-10-31 | ||
| JP2007282958A JP5216302B2 (en) | 2006-12-13 | 2007-10-31 | On-chip current measuring method and semiconductor integrated circuit |
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| CN101201388A CN101201388A (en) | 2008-06-18 |
| CN101201388B true CN101201388B (en) | 2011-12-28 |
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| CN2007101998299A Expired - Fee Related CN101201388B (en) | 2006-12-13 | 2007-12-13 | Method of on-chip current measurement and semiconductor ic |
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| Country | Link |
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| JP (1) | JP5216302B2 (en) |
| CN (1) | CN101201388B (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP4983688B2 (en) * | 2008-03-27 | 2012-07-25 | 富士通セミコンダクター株式会社 | Semiconductor device |
| TWI402515B (en) * | 2009-01-09 | 2013-07-21 | Hon Hai Prec Ind Co Ltd | Signal testing apparatus |
| TWI408375B (en) * | 2009-06-05 | 2013-09-11 | Giga Byte Tech Co Ltd | Current measuring device and computer system utilizing the same |
| CN104764923B (en) * | 2015-03-18 | 2018-07-06 | 广东顺德中山大学卡内基梅隆大学国际联合研究院 | A kind of method for measuring AC influence amplitude |
| DE102015109285A1 (en) * | 2015-04-09 | 2016-10-13 | Weidmüller Interface GmbH & Co. KG | Electrical assembly and measuring circuit and measuring method for monitoring a component of the electrical assembly |
| US10382034B2 (en) * | 2016-11-22 | 2019-08-13 | Qualcomm Incorporated | Apparatus and method for sensing distributed load currents provided by power gating circuit |
| JP7211042B2 (en) | 2018-11-30 | 2023-01-24 | 株式会社リコー | Developer storage container, developing device and image forming apparatus |
| CN109613430B (en) * | 2019-02-18 | 2021-06-01 | 内蒙古伊泰准东铁路有限责任公司 | Current determination method and device |
| CN112701210B (en) * | 2020-12-29 | 2022-03-11 | 胡建伟 | Method and device for automatically repairing chip |
| KR20220136754A (en) | 2021-04-01 | 2022-10-11 | 삼성전자주식회사 | Integrated circuit device, semiconductor substrate and test system including integrated circuit device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20060125470A1 (en) * | 2004-12-10 | 2006-06-15 | Wei Chen | System and method for IDDQ measurement in system on a chip (SOC) design |
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| JPH0834221B2 (en) * | 1986-03-21 | 1996-03-29 | 日本電装株式会社 | Semiconductor device with current detection function |
| US6785826B1 (en) * | 1996-07-17 | 2004-08-31 | International Business Machines Corporation | Self power audit and control circuitry for microprocessor functional units |
| JPH10253710A (en) * | 1997-03-07 | 1998-09-25 | Citizen Watch Co Ltd | Semiconductor device and measuring method thereof |
| JP5030336B2 (en) * | 2001-06-07 | 2012-09-19 | ルネサスエレクトロニクス株式会社 | Semiconductor integrated circuit device |
| JP4521546B2 (en) * | 2003-01-24 | 2010-08-11 | ルネサスエレクトロニクス株式会社 | Semiconductor integrated circuit device |
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2007
- 2007-10-31 JP JP2007282958A patent/JP5216302B2/en not_active Expired - Fee Related
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| US20060125470A1 (en) * | 2004-12-10 | 2006-06-15 | Wei Chen | System and method for IDDQ measurement in system on a chip (SOC) design |
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| TW200844462A (en) | 2008-11-16 |
| JP5216302B2 (en) | 2013-06-19 |
| JP2008172199A (en) | 2008-07-24 |
| CN101201388A (en) | 2008-06-18 |
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