CN101178750A - PCB emulation system have error detection function and realization method thereof - Google Patents
PCB emulation system have error detection function and realization method thereof Download PDFInfo
- Publication number
- CN101178750A CN101178750A CNA2007101992112A CN200710199211A CN101178750A CN 101178750 A CN101178750 A CN 101178750A CN A2007101992112 A CNA2007101992112 A CN A2007101992112A CN 200710199211 A CN200710199211 A CN 200710199211A CN 101178750 A CN101178750 A CN 101178750A
- Authority
- CN
- China
- Prior art keywords
- mistake
- error
- emulation
- pcb
- parameter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
The invention discloses a PCB simulation system with error detection function and the realization method. The simulation system comprises an information extraction module, an error detection module, a simulation module, an error output module and a rule base. The realization method of the system comprises: reading in an EDA design document, extracting simulation information and the discriminant parameter of each element; gradually detecting the discriminant parameter of each element one by one according to the manufacturability design norm in a self built rule base, and leading error messages to be registered; displaying physical parameter error before posting simulation; carrying out real-time alarming for assembling error during simulation process; keeping all the error information in the archives after the simulation. The method can carry out detection and real-time hint for errors on a PCB design board during simulation process or output a complete detection report after simulation is finished, thereby providing amending advice for a designer and basis for amending design in shortest time.
Description
Technical field
The present invention relates to a kind of PCB analogue system and its implementation with error detection function.
Background technology
In the traditional mode that electronic product assembling is produced, design generally is to utilize multiple cad tools to finish on computers by the design engineer, manufactures then on various numerical control devices (NC) (as placement equipment etc.) and finishes.Each product is in first being processed, the slip-stick artist often will spend great amount of manpower and time and go to carry out error detection and adjustment, reason is that the part of Butut on circuit board is usually thousands of, add relevant boring, pad etc., the Butut position of wanting to make appropriate arrangements part, boring and mark in extremely limited space obviously is suitable difficulty.Therefore all must compare with the manufacturability design criteria one by one by way of manual operation before producing product, these work are inefficiency not only, and makes a mistake easily.
Secondly, the manufacturing engineer also must with feasibility and the correctness of guaranteeing working specification, revise typing to the last repeatedly to NC programming and trial production repeatedly, drops into actual batch process again.So make that to produce setup time very long, it is very big to inject capital into.
And along with the aggravation of market competition, the product delivery cycle must shorten, and production cost must be controlled.If therefore can be by flourishing at present computer software technology, provide one the cover can be according to the actual production demand, also can feed back the analogue system and the method thereof of real-time report to PCB design carrying out automatic error detection, believe and not only can save many unnecessary manpowers and time, more can improve the production efficiency of whole PCB surface mount production line.
Summary of the invention
The objective of the invention is at the deficiencies in the prior art, a kind of PCB analogue system and its implementation with error detection function is provided, can be after importing the EDA design document, automatically pcb board and components and parts information are compared with existing manufacturability design criteria one by one, find out the physical parameter mistake and the assembling capacity mistake that exist in the design fast, and then mount at analog component that the mode with text or real-time report shows in the process, and when finishing, emulation saves as wrong document, for deviser's modification again provides foundation, thereby effectively reduce since the unreasonable factor of design in early stage to the later stage make bring recall the change number of times, reach minimizing of Products Development cycle and cost, the optimization of product design quality, the maximization of production efficiency.
For achieving the above object, the technical solution used in the present invention is a kind of PCB analogue system with error detection function, and this system comprises:
Information extraction modules: read in the EDA design document, therefrom extract the discriminant parameter of artificial intelligence, components and parts and pcb board, and it is saved as the intermediate file of unified structure and form, to be used for follow-up emulation and error detection;
Error detection module: the discriminant parameter of each element that will extract from information extraction modules, detect one by one according to the manufacturability design criteria, detect two big class mistakes respectively according to physical parameter error criterion and assembling capacity error criterion;
Emulation module: according to the artificial intelligence of extracting in the information extraction modules, set up the virtual emulation model of manufacturing system, recover the 3D shape of PCB bare board and components and parts, utilize graph transformation technology and two caching technology, components and parts mount the motion simulation of process on the realization pcb board;
Mistake output module:, carry out demonstration to physical parameter mistake and assembling capacity mistake according to the information of error detection module record;
Rule base has been deposited the manufacturability design criteria in the storehouse, wherein be divided into the criterion of physical parameter error criterion and assembling capacity mistake again;
The information extraction modules output terminal connects emulation module and error detection module, the output terminal connection error output module of emulation module and error detection module, and error detection module is connected with rule base.
Wrong output module of the present invention can also connect document library, and document library is wrong document in order to deposit, and when the deviser will revise design, can extract wrong document viewing from document library.
A kind of PCB analogue system of the present invention with error detection function, the implementation method that this system carries out PCB emulation may further comprise the steps:
1) information extraction modules is read in the EDA design document, therefrom extracts detailed artificial intelligence and is used for emulation, and the discriminant parameter that extracts components and parts and pcb board is used for error detection;
2) error-detecting to the components and parts that extract from design document and the discriminant parameter of pcb board, detects one by one according to the manufacturability design criteria in the rule base, and the physical parameter mistake and the assembling capacity mistake that exist according to the testing result record;
3) error detection module detects the physical parameter mistake, and shows with text mode by wrong output module before simulation mounts emulation;
4) emulation module analog PCB surface mount process, and in simulation process, the assembling capacity mistake is shown by wrong output module with real-time mode;
5) mount after emulation finishes, the mistake output module shows all physics parameter errors and assembling capacity mistake.
Physical parameter mistake described in the native system The Realization of Simulation method and assembling capacity mistake comprise the mistake that just can detect according to element self discriminant parameter and must differentiate the mistake that just can detect with the parameter of other elements.
The miscue message that this mistake output module described in the native system The Realization of Simulation method shows comprises: numbering, errors present, type of error and the error number of the type of sequence number, the element that makes a mistake, the element that makes a mistake, for collision error, in type of error, also write down the element numbering of conflicting with the element that makes a mistake.
The mistake that must just can detect described in the native system The Realization of Simulation method with the parameter differentiation of other elements, the polygon collision detection method has been adopted in the detection of this mistake, its method comprises: check whether two polygonal boundary rectangles conflict, if do not conflict, then polygon does not conflict; Otherwise, need through relatively judging and,, conflict property mistake is arranged then based on point if two classes can have a class to detect the polygon conflict in judging based on the relatively judgement on limit.
The present invention compares with prior art, has the following advantages:
1) analogue system of the present invention, PCB surface mount process can be presented with directly perceived, lively, accurate way on computers, replace traditional examination and paste process to simulate mode that chip mounter mounts process on computers, saved a large amount of time and production cost.
2) analogue system of the present invention can also detect physical parameter mistake and the assembling capacity mistake that exists in the design automatically, and while misregistration information is to allow the user understand wrong loca in the shortest time.For the assembling capacity mistake, can also in the visual simulating process, provide prompting with real-time mode, a large amount of wrong search time and manpower have been saved in the device position place that allows the user know in the shortest time to make a mistake in mode the most intuitively, and the reason that makes a mistake.
3) institute that error detection can also be come out of analogue system of the present invention is wrong saves as wrong document, leaves in the document library, therefrom extracts as reference frame when making things convenient for the designer to revise design, shortens the manufacturing cycle thereby reach, the purpose that reduces production costs.
Below, in conjunction with the embodiments and accompanying drawing, the present invention is described in further details.
Description of drawings
Fig. 1 is the system construction drawing of analogue system of the present invention;
Fig. 2 is the process flow diagram of network simulation system method of the present invention;
Fig. 3 is the error-detecting method process flow diagram of analogue system of the present invention;
Fig. 4 is the collision detection method process flow diagram of analogue system of the present invention.
Embodiment
A kind of PCB analogue system of present embodiment with error detection function, system architecture as shown in Figure 1 comprises:
(1) information extraction modules: this module can be used for extracting relevant information from the EDA design document that reads in.The form of the EDA design document that it reads in by analysis, with different design documents such as Protel, PowerPCB etc. are converted to the intermediate file of same form.From middle file, extract on the one hand then the emulation Useful Information, be used for emulation as plank pad descriptor, plank arc description information, components and parts via hole information etc.; Extract discriminant parameter on the one hand, cross pore size, plank bond pad shapes, device profile etc. as device to the useful element of error detection.Because a lot of discriminant parameters are not explicit existence in intermediate file, but lie among the several parameters, thus also need to find the relation between them, and by calculating these parameters.The size of pcb board for example just need find the housing summit of pcb board in intermediate file, just can obtain by calculating then.
(2) error detection module: the discriminant parameter of each element that will extract from information extraction modules, detect one by one according to existing manufacturability design criteria, detect two big class mistakes respectively according to physical parameter error criterion and assembling capacity error criterion.In testing process, for the detection of non-conflict mistake, only need be with parameter and concrete numeral comparison, whether wrongly can learn, for example the radius of plank via hole must be greater than 0, initial layers can not equal end layer etc.For the detection of conflict property mistake, whether wrongly then need discriminant parameter with other same type to compare just to determine, for example detect and whether conflict between two via holes or two devices etc.Afterwards, the mistake that detects is divided into the physical parameter mistake and the assembling capacity mistake is deposited, and misregistration information, comprises: numbering, errors present, type of error and the error number of the type of sequence number, the element that makes a mistake, the element that makes a mistake.For collision error, in type of error, also write down the element numbering of conflicting with the element that makes a mistake.In addition, also to carry out mark to the components and parts of makeing mistakes.
(3) emulation module: according to the artificial intelligence of extracting in the information extraction modules, set up the virtual emulation model of manufacturing system, recover the 3D shape of PCB bare board and components and parts.Utilize graph transformation technology and two caching technology, components and parts mount the motion simulation of process on the realization pcb board.And can realize to view rotation, translation, amplify and dwindle etc., also can regulate and mount simulation speed, the beginning that control mounts, suspend and end.
(4) mistake output module according to the information of error detection module record, carries out the demonstration to physical parameter mistake and assembling capacity mistake.For the physical parameter mistake, before mounting emulation, show with textual form, be kept at simultaneously in the physical parameter error listing; For the assembling capacity mistake, in mounting simulation process, provide the real-time alerting prompting, and upgrade the assembling capacity error listing simultaneously, the error items that had shown is inserted tabulation.After mounting the emulation end, can check all physics parameter errors and assembling capacity mistake, and it is saved as wrong document.
(5) rule base has been deposited the manufacturability design criteria in the storehouse, wherein be divided into physical parameter error criterion and assembling capacity error criterion again.
The information extraction modules output terminal connects emulation module and error detection module, the output terminal connection error output module of emulation module and error detection module, and error detection module is connected with rule base.The deviser also can require this rule base is added, deletes and revises according to reality.
Present embodiment also includes a document library, and the wrong document in order to deposit when the deviser will revise design, can extract wrong document viewing from document library, as the reference frame of revising again.
Described system carries out the implementation method of PCB emulation, it is characterized in that this method may further comprise the steps:
1) information extraction modules is read in the EDA design document, therefrom extracts detailed artificial intelligence and is used for emulation, and the discriminant parameter that extracts components and parts and pcb board is used for error detection;
2) error-detecting to the components and parts that extract from design document and the discriminant parameter of pcb board, detects one by one according to the manufacturability design criteria in the existing rule base, and the physical parameter mistake and the assembling capacity mistake that exist according to the testing result record;
3) error detection module detects the physical parameter mistake, and shows with text mode by wrong output module before simulation mounts emulation;
4) emulation module is finished PCB surface mount process, and in simulation process the assembling capacity mistake is shown by wrong output module with real-time mode;
5) mount after emulation finishes, the mistake output module shows all physics parameter errors and assembling capacity mistake.
Physical parameter mistake described in the present embodiment and assembling capacity mistake comprise the mistake that just can detect according to element self discriminant parameter and must differentiate the mistake that just can detect with the parameter of other elements.
The miscue message that wrong output module in the present embodiment shows comprises: numbering, errors present, type of error and the error number of the type of sequence number, the element that makes a mistake, the element that makes a mistake, for collision error, in type of error, also write down the element numbering of conflicting with the element that makes a mistake.
The part of Fig. 2 then is an explanation main operation workflow of the present invention, mainly is divided into following step: read in the EDA design document, extract artificial intelligence by file conversion and be used to mount emulation.Simultaneously, by calculating or directly extracting the discriminant parameter that obtains each element of pcb board, to be used for the error-detecting of back; Follow error detection, wherein more detailed steps will illustrate by Fig. 3; Before emulation, show all physics parameter error information, and deposit all these mistakes in the physical parameter error listing; Then analogue system begins simulation and mounts process, shows in real time the assembling capacity false alarm for example, when certain device that is mounting conflicts with peripheral devices, can provide warning prompt in simulation process, upgrades the assembling capacity error listing simultaneously; Emulation can be checked physical parameter error listing and assembling capacity error listing, and all error messages are saved as wrong document after finishing, put into document library.
Fig. 3 then begins the explanation of error detection flow process: at first, system extracts an element (except the PCB bare board, element refers to each components and parts); In rule base, find all physical parameter error criterion relevant then with the discriminant parameter of this element, its error criterion also comprises static error criterion and collision error criterion, only need compare one by one for non-conflict error criterion and to get final product, for conflict property error criterion, its testing process will provide detailed description in Fig. 4, if wrong, misregistration information; Then, similarly, find all assembling capacity error criterion relevant with the discriminant parameter of this element in rule base, the detection of wherein non-conflict mistake and conflict property mistake is the same, if wrong, misregistration information; After this element has detected, extract next element and detect again, all detect up to all elements and finish, so far finish the flow process of whole error detection.
Fig. 4 then is the flow process of the collision detection of analogue system of the present invention:
(1) extract parameter with the discriminant parameter of this element other element of the same type, for example, detect the conflict of the pad profile of pcb board, extract the description of the pad profile of all other elements earlier, the discriminant parameter here is exactly the pad profile; When detecting certain device profile conflict, extract the appearance information of all devices, the discriminant parameter here then is the device profile;
(2) secondly, the similar parameter with one of them of the discriminant parameter of the element that will detect compares, because detecting, collision error mainly is related to polygon and polygonal collision detection (using the polygon of forming by a plurality of points to approach circle or arc) here, thereby the polygon collision detection algorithm is proposed, this algorithm may further comprise the steps again:
A. calculate two polygonal boundary rectangles respectively, the boundary rectangle here refers to this polygonal minimum rectangle that comprises that the limit is parallel to x coordinate axis or y coordinate axis, checks whether two boundary rectangles conflict, if do not conflict, leap to step (4), if conflict, execution in step b;
B. carry out comparing, check respectively whether two polygons have the summit to be positioned at the other side's polygonal region, if having, then step (3) is jumped in conflict based on the conflict of point; Otherwise, execution in step c;
C. carry out relatively based on the conflict on limit, the limit of checking two changeable shapes respectively whether with the other side's limit juxtaposition, have, then conflict, execution in step (3) if do not have, jumps to step (4);
(3) write down collision error information, comprise the numbering of two elements that detect conflict;
Does (4) similar parameter with all relatively finish? if flow process stops; Otherwise, get next similar parameter and continue relatively to get back to step (2).
Supplementary notes to the polygon algorithm: check whether two polygonal boundary rectangles conflict, if do not conflict, then polygon does not conflict; Otherwise,,, just can jump out collision detection algorithm if can judge the polygon conflict in view of the above through relatively judgement based on point; Otherwise, also need just can detect polygon and whether conflict through relatively judgement based on the limit.
Claims (6)
1. PCB analogue system with error detection function, this system comprises:
Information extraction modules: read in the EDA design document, therefrom extract the discriminant parameter of artificial intelligence, components and parts and pcb board, and it is saved as the intermediate file of unified structure and form, to be used for follow-up emulation and error detection;
Error detection module: the discriminant parameter of each element that will extract from information extraction modules, detect one by one according to the manufacturability design criteria, detect two big class mistakes respectively according to physical parameter error criterion and assembling capacity error criterion;
Emulation module: according to the artificial intelligence of extracting in the information extraction modules, set up the virtual emulation model of manufacturing system, recover the 3D shape of PCB bare board and components and parts, utilize graph transformation technology and two caching technology, components and parts mount the motion simulation of process on the realization pcb board;
Mistake output module:, carry out demonstration to physical parameter mistake and assembling capacity mistake according to the information of error detection module record;
Rule base has been deposited the manufacturability design criteria in the storehouse, wherein be divided into physical parameter error criterion and assembling capacity error criterion again;
The information extraction modules output terminal connects emulation module and error detection module, the output terminal connection error output module of emulation module and error detection module, and error detection module is connected with rule base.
2. a kind of PCB analogue system that requires as right 1 with error detection function, it is characterized in that described wrong output module also connects document library, document library is wrong document in order to deposit, and when the deviser will revise design, extracts wrong document viewing from document library.
3. the implementation method of utilizing system according to claim 1 to carry out PCB emulation is characterized in that this method may further comprise the steps:
1) information extraction modules is read in the EDA design document, therefrom extracts artificial intelligence and is used for emulation, and the discriminant parameter that extracts components and parts and pcb board is used for error detection;
2) error-detecting to the components and parts that extract from design document and the discriminant parameter of pcb board, detects one by one according to the manufacturability design criteria in the existing rule base, and the physical parameter mistake and the assembling capacity mistake that exist according to the testing result record;
3) error detection module detects the physical parameter mistake, and shows with text mode by wrong output module before simulation mounts emulation;
4) the surface mount process of emulation module analog PCB, and in simulation process, the assembling capacity mistake is shown by wrong output module with real-time mode;
5) mount after emulation finishes, the mistake output module shows all physics parameter errors and assembling capacity mistake.
4. implementation method of carrying out PCB emulation as claimed in claim 3, it is characterized in that: described physical parameter mistake and assembling capacity mistake comprise the mistake that the discriminant parameter according to components and parts and pcb board just can detect and must differentiate the mistake that just can detect jointly with the parameter of other elements.
5. implementation method of carrying out PCB emulation as claimed in claim 3, it is characterized in that: the miscue message that this mistake output module shows comprises: numbering, errors present, type of error and the error number of the type of sequence number, the element that makes a mistake, the element that makes a mistake, for collision error, in type of error, also write down the element numbering of conflicting with the element that makes a mistake.
6. implementation method of carrying out PCB emulation as claimed in claim 3, it is characterized in that: the described mistake that must just can detect with the parameter differentiation of other elements, the polygon collision detection method has been adopted in the detection of this mistake, its method may further comprise the steps: check whether two polygonal boundary rectangles conflict, boundary rectangle is not if conflict, and then polygon does not conflict; Otherwise, need through relatively judging and,, conflict property mistake is arranged then based on point if two classes can have a class to detect the polygon conflict in judging based on the relatively judgement on limit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2007101992112A CN100541502C (en) | 2007-12-13 | 2007-12-13 | A kind of PCB analogue system and its implementation with error detection function |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2007101992112A CN100541502C (en) | 2007-12-13 | 2007-12-13 | A kind of PCB analogue system and its implementation with error detection function |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101178750A true CN101178750A (en) | 2008-05-14 |
| CN100541502C CN100541502C (en) | 2009-09-16 |
Family
ID=39405003
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2007101992112A Expired - Fee Related CN100541502C (en) | 2007-12-13 | 2007-12-13 | A kind of PCB analogue system and its implementation with error detection function |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100541502C (en) |
Cited By (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101986317A (en) * | 2010-11-19 | 2011-03-16 | 常州奥施特信息科技有限公司 | Electronic whole set surface mounting technology production line virtual manufacturing system and realization method thereof |
| CN101986316A (en) * | 2010-11-19 | 2011-03-16 | 常州奥施特信息科技有限公司 | Printed circuit board virtual manufacturing system of electronic design automation of electronic product and realization method thereof |
| CN102012839A (en) * | 2010-12-10 | 2011-04-13 | 深圳市同洲电子股份有限公司 | Data interaction method, system and synchronous interaction module between DFM (design for manufacture) and EDA (electronic design automation) |
| CN102073775A (en) * | 2011-01-18 | 2011-05-25 | 西安电子科技大学 | Method for checking electric fitting data of printed circuit board |
| CN102542116A (en) * | 2012-01-06 | 2012-07-04 | 深圳市汉普电子技术开发有限公司 | Method and device of DFM (Design for Manufacturability) analysis automation |
| CN102789509A (en) * | 2011-05-16 | 2012-11-21 | 比亚迪股份有限公司 | Method for marking device that does not need to be welded and system |
| CN102902832A (en) * | 2011-07-26 | 2013-01-30 | 京信通信系统（中国）有限公司 | Method and device for detecting mistaken deletion of PCB (printed circuit board) silkscreen numbers |
| CN102902858A (en) * | 2012-10-09 | 2013-01-30 | 合肥工业大学 | Relevance marking method for faulted devices in combined circuit board test result |
| CN104809310A (en) * | 2015-05-14 | 2015-07-29 | 武汉新芯集成电路制造有限公司 | Replacement method of IP function modules |
| CN106406531A (en) * | 2016-09-20 | 2017-02-15 | 常州奥施特信息科技有限公司 | A method for VR virtual printed circuit board manufacture factory |
| CN106507588A (en) * | 2016-11-02 | 2017-03-15 | 济南浪潮高新科技投资发展有限公司 | A kind of method of automatic detection unnecessary component in PCB |
| CN106815444A (en) * | 2017-01-20 | 2017-06-09 | 福州大学 | A kind of method of automatic measurement PCB map files component distance |
| CN108133103A (en) * | 2017-12-21 | 2018-06-08 | 大连芯巧电子科技有限公司 | A kind of Electronic Design DFM detecting systems, method and medium |
| CN108629103A (en) * | 2015-04-08 | 2018-10-09 | 上海望友信息科技有限公司 | The manufacture of SMT patches and SMT screen plate production method and system |
| CN109299538A (en) * | 2018-09-21 | 2019-02-01 | 郑州云海信息技术有限公司 | A kind of detection method and device of layout-design |
| CN109446600A (en) * | 2018-10-12 | 2019-03-08 | 上海望友信息科技有限公司 | Generation method, system, computer storage medium and the equipment of 3D emulation data |
| WO2019119737A1 (en) * | 2017-12-20 | 2019-06-27 | 上海望友信息科技有限公司 | Cold plate examination method and system, computer-readable storage medium and equipment |
| CN110489885A (en) * | 2019-08-22 | 2019-11-22 | 北京中科寒武纪科技有限公司 | Operation method, device and Related product |
| CN110532578A (en) * | 2018-05-24 | 2019-12-03 | 珠海格力电器股份有限公司 | A kind of intelligent integral design method and platform |
| CN110533998A (en) * | 2018-05-24 | 2019-12-03 | 江苏开放大学（江苏城市职业学院） | A kind of self-help intelligent electrical practice training platform |
| CN113281587A (en) * | 2021-04-26 | 2021-08-20 | Tcl王牌电器(惠州)有限公司 | Detection method and system based on manufacturability design simulator |
| WO2021217725A1 (en) * | 2020-04-27 | 2021-11-04 | 深圳市华星光电半导体显示技术有限公司 | Method and apparatus for inspecting display panel, and electronic device |
| CN114417626A (en) * | 2022-01-24 | 2022-04-29 | 深圳市云采网络科技有限公司 | Method and device for detecting assemblability, method and medium for checking bill of material |
-
2007
- 2007-12-13 CN CNB2007101992112A patent/CN100541502C/en not_active Expired - Fee Related
Cited By (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101986316A (en) * | 2010-11-19 | 2011-03-16 | 常州奥施特信息科技有限公司 | Printed circuit board virtual manufacturing system of electronic design automation of electronic product and realization method thereof |
| CN101986317A (en) * | 2010-11-19 | 2011-03-16 | 常州奥施特信息科技有限公司 | Electronic whole set surface mounting technology production line virtual manufacturing system and realization method thereof |
| CN101986317B (en) * | 2010-11-19 | 2013-02-13 | 常州奥施特信息科技有限公司 | Electronic whole set surface mounting technology production line virtual manufacturing system and realization method thereof |
| CN102012839A (en) * | 2010-12-10 | 2011-04-13 | 深圳市同洲电子股份有限公司 | Data interaction method, system and synchronous interaction module between DFM (design for manufacture) and EDA (electronic design automation) |
| CN102073775A (en) * | 2011-01-18 | 2011-05-25 | 西安电子科技大学 | Method for checking electric fitting data of printed circuit board |
| CN102073775B (en) * | 2011-01-18 | 2012-08-08 | 西安电子科技大学 | Method for checking electric fitting data of printed circuit board |
| CN102789509B (en) * | 2011-05-16 | 2015-09-02 | 比亚迪股份有限公司 | A kind of mark does not weld the method and system of device |
| CN102789509A (en) * | 2011-05-16 | 2012-11-21 | 比亚迪股份有限公司 | Method for marking device that does not need to be welded and system |
| CN102902832A (en) * | 2011-07-26 | 2013-01-30 | 京信通信系统（中国）有限公司 | Method and device for detecting mistaken deletion of PCB (printed circuit board) silkscreen numbers |
| CN102902832B (en) * | 2011-07-26 | 2016-06-22 | 京信通信系统（中国）有限公司 | A kind of detect method and the device that pcb board silk-screen sequence number is deleted by mistake |
| CN102542116A (en) * | 2012-01-06 | 2012-07-04 | 深圳市汉普电子技术开发有限公司 | Method and device of DFM (Design for Manufacturability) analysis automation |
| CN102542116B (en) * | 2012-01-06 | 2014-12-17 | 深圳市汉普电子技术开发有限公司 | Method and device of DFM (Design for Manufacturability) analysis automation |
| CN102902858B (en) * | 2012-10-09 | 2015-10-21 | 合肥工业大学 | The relevance mask method of fault components and parts in combination circuit plate test result |
| CN102902858A (en) * | 2012-10-09 | 2013-01-30 | 合肥工业大学 | Relevance marking method for faulted devices in combined circuit board test result |
| CN108629103A (en) * | 2015-04-08 | 2018-10-09 | 上海望友信息科技有限公司 | The manufacture of SMT patches and SMT screen plate production method and system |
| CN108629103B (en) * | 2015-04-08 | 2022-02-11 | 上海望友信息科技有限公司 | SMT patch manufacturing and SMT screen plate manufacturing method and system |
| CN104809310A (en) * | 2015-05-14 | 2015-07-29 | 武汉新芯集成电路制造有限公司 | Replacement method of IP function modules |
| CN106406531A (en) * | 2016-09-20 | 2017-02-15 | 常州奥施特信息科技有限公司 | A method for VR virtual printed circuit board manufacture factory |
| CN106507588A (en) * | 2016-11-02 | 2017-03-15 | 济南浪潮高新科技投资发展有限公司 | A kind of method of automatic detection unnecessary component in PCB |
| CN106815444A (en) * | 2017-01-20 | 2017-06-09 | 福州大学 | A kind of method of automatic measurement PCB map files component distance |
| WO2019119737A1 (en) * | 2017-12-20 | 2019-06-27 | 上海望友信息科技有限公司 | Cold plate examination method and system, computer-readable storage medium and equipment |
| CN108133103A (en) * | 2017-12-21 | 2018-06-08 | 大连芯巧电子科技有限公司 | A kind of Electronic Design DFM detecting systems, method and medium |
| CN110532578A (en) * | 2018-05-24 | 2019-12-03 | 珠海格力电器股份有限公司 | A kind of intelligent integral design method and platform |
| CN110533998A (en) * | 2018-05-24 | 2019-12-03 | 江苏开放大学（江苏城市职业学院） | A kind of self-help intelligent electrical practice training platform |
| CN109299538A (en) * | 2018-09-21 | 2019-02-01 | 郑州云海信息技术有限公司 | A kind of detection method and device of layout-design |
| CN109446600A (en) * | 2018-10-12 | 2019-03-08 | 上海望友信息科技有限公司 | Generation method, system, computer storage medium and the equipment of 3D emulation data |
| CN110489885A (en) * | 2019-08-22 | 2019-11-22 | 北京中科寒武纪科技有限公司 | Operation method, device and Related product |
| WO2021217725A1 (en) * | 2020-04-27 | 2021-11-04 | 深圳市华星光电半导体显示技术有限公司 | Method and apparatus for inspecting display panel, and electronic device |
| US11907626B2 (en) | 2020-04-27 | 2024-02-20 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Method, device, and electronic apparatus of inspecting display panel |
| CN113281587A (en) * | 2021-04-26 | 2021-08-20 | Tcl王牌电器(惠州)有限公司 | Detection method and system based on manufacturability design simulator |
| CN113281587B (en) * | 2021-04-26 | 2023-03-10 | Tcl王牌电器(惠州)有限公司 | Detection method and system based on manufacturability design simulator |
| CN114417626A (en) * | 2022-01-24 | 2022-04-29 | 深圳市云采网络科技有限公司 | Method and device for detecting assemblability, method and medium for checking bill of material |
Also Published As
| Publication number | Publication date |
|---|---|
| CN100541502C (en) | 2009-09-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100541502C (en) | A kind of PCB analogue system and its implementation with error detection function | |
| KR101946398B1 (en) | Quick Processing System and Method for SMT Equipment | |
| CN102930114B (en) | Electronic product EDA designs the visible detection method of manufacturability | |
| CN101986316A (en) | Printed circuit board virtual manufacturing system of electronic design automation of electronic product and realization method thereof | |
| CN107357259B (en) | A kind of chip mounter off-line programing information processing method | |
| CN101369249A (en) | Method and apparatus for marking GUI component of software | |
| US9934354B1 (en) | Methods, systems, and computer program product for implementing a layout-driven, multi-fabric schematic design | |
| CN103678737B (en) | A kind of lever system dummy assembly method | |
| CN107292042A (en) | A kind of BIM modeling methods | |
| US6629307B2 (en) | Method for ensuring correct pin assignments between system board connections using common mapping files | |
| CN110222381B (en) | Method, system, medium and terminal for generating dynamic installation guide file for PCB assembly | |
| JP5691743B2 (en) | Mounting design support program, method and apparatus | |
| CN109815635B (en) | Boiler MFT automatic design system and method | |
| CN111475970A (en) | Structural model derivation system and method | |
| CN103177064B (en) | A kind of method automatically enrolling given content in electronic document | |
| CN101131709B (en) | Distributed circuit layout character face processing method and system thereof | |
| US20080027701A1 (en) | Printed Circuit Board Design Instruction Support Method and Device | |
| CN101770527A (en) | Method for modifying data of circuit components | |
| CN1979500A (en) | Part arrangement automatical checking system and method | |
| CN113705143B (en) | Automatic simulation system and automatic simulation method | |
| CN115816831A (en) | Cloud-based control 3D printer power consumption reduction method, device, equipment and medium | |
| CN110852035A (en) | PCB design platform capable of independently learning | |
| CN1658198B (en) | Method for checking circuit arrangement | |
| US20110231807A1 (en) | Circuit design aiding apparatus and computer-readable recording medium storing circuit design aiding program | |
| CN112100973B (en) | Mirror image via hole checking and replacing method based on ALLEGRO software |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090916 Termination date: 20101213 |