CN101131709B - Distributed circuit layout character face processing method and system thereof - Google Patents
Distributed circuit layout character face processing method and system thereof Download PDFInfo
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- CN101131709B CN101131709B CN200610126507A CN200610126507A CN101131709B CN 101131709 B CN101131709 B CN 101131709B CN 200610126507 A CN200610126507 A CN 200610126507A CN 200610126507 A CN200610126507 A CN 200610126507A CN 101131709 B CN101131709 B CN 101131709B
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- circuit pattern
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Abstract
A kind of division-work circuit diagram literal processing method and system can work on the computer, used for offering the literal processing function for the circuit diagram the computer aided design software on the circuit diagram draws; it is characterized in that it can divide definition and changing of the literal data of the circuit diagram from the changing of its circuit diagram and work separately, making the changing of the literal data not related to the changing of the circuit diagram as the back technique. The character can make it more time-saving, labor-saving and efficiently to design the circuit diagram.
Description
Technical field
The present invention relates to a kind of computer information technology, particularly relevant for literal disposal route of a kind of distributed circuit layout character and system, it can be applicable to a computer platform, and the literal face processing capacity of a division of labor formula is provided in order to the circuit arrangement map that an area of computer aided circuit layout design software is drawn out.
Background technology
In electronics manufacturing circle, the design of circuit board adopts computer assisted circuit layout design software to draw required circuit arrangement map mostly, and when actual production, produces required circuit board according to this circuit arrangement map in the robotization mode.US business benefit China (Cadence) Allegro software that company developed is a kind of area of computer aided circuit layout design software of the normal employing of present electronics manufacturing circle institute.
On practice, the circuit arrangement map of main frame motherboard or circuit card has usually need add some lteral datas on the side of each electronic component, for example be the numbering of these electronic components (this type of lteral data is commonly called as again and is " white paint ", that is shows these lteral datas on the printed circuit board (PCB) in manufacturing upward to coat with white paint).In the application of Allegro software, this kind lteral data is defined as a literal face (silkscreen), and each literal face is adhered to the circuit pattern of its genus.
In concrete enforcement, the design branch common and the literal face under it of the circuit design in the circuit arrangement map comes and carries out in division of labor mode.Yet a shortcoming of present Allegro circuit layout design software is that it can't allow circuit design and the design of literal face divide to come and carry out in division of labor mode.Because Allegro software lacks this kind function, so the data definition of literal face must add into lteral data when circuit pattern being imported to circuit arrangement map in passing, and is arranged in precalculated position on the circuit arrangement map simultaneously together with circuit pattern.
Yet a shortcoming of the above-mentioned practice is when the literal face data under certain circuit pattern on the circuit layout designer desire modification circuit arrangement map, it must at first be deleted this circuit pattern in circuit arrangement map, then obtain the original design map file of this circuit pattern again, use that this original design figure shelves are once imported program more again, and the literal face data that will newly revise are added in this remittance process.Yet this kind practice is obviously very loaded down with trivial details and waste time and energy and inefficent.In addition, if the circuit pattern on the circuit arrangement map was once crossed after importing and was revised, after then its deletion being imported its original design map file again, the circuit layout slip-stick artist re-executes a modification to the original design figure shelves that import again more again again, therefore makes operation repeat and the reduction work efficiency.
Summary of the invention
The shortcoming of prior art in view of the above, fundamental purpose of the present invention is to be to provide literal disposal route of a kind of distributed circuit layout character and system, it can allow the definition of the literal face data in the circuit arrangement map and change can divide the work to carry out with the change of its affiliated circuit pattern, makes the change of literal face data can not involve the change of circuit pattern.
Literal disposal route of distributed circuit layout character of the present invention and system design are applied to a computer platform, in order to provide the literal face processing capacity of a division of labor formula to an area of computer aided circuit layout design software (for example the being Allegro software) circuit arrangement map of being drawn out.
The literal disposal route of distributed circuit layout character of the present invention comprises at least: (S1) circuit pattern controlled of response one user is drawn incident and is drawn out a plurality of circuit patterns, and in each circuit pattern one group of layout attributes of pre-defined literal face under it; (S2) the literal face data definition incident controlled of response one user comes to define a literal face data file for each circuit pattern; (S3) the circuit pattern remittance incident controlled of response one user imports this circuit pattern to this circuit arrangement map; And (S4) the literal face data sink incoming event controlled of response one user imports the literal data file of this article to this circuit arrangement map, and the automatic circuit pattern of comparing the literal face data that belong to every remittance, and the predetermined layout attributes that the literal data foundation of this article is belonged to the circuit pattern of the literal data of this article is arranged on this circuit arrangement map.
The literal Processing System Design of distributed circuit layout character of the present invention is used for the aforesaid method of specific implementation, the OO component models of its entity framework comprises at least: (A) circuit pattern drafting module, it can provide circuit pattern that a user controls to draw function and draw a circuit pattern, and in this circuit pattern one group of layout attributes of pre-defined literal face under it; (B) a literal face data definition module, its literal face data definition facility that can provide a user to control to define a literal face data file for each circuit pattern that this circuit pattern drafting module is drawn; (C) circuit pattern imports module, and the circuit pattern that its circuit pattern remittance function that can provide a user to control is drawn this circuit pattern drafting module imports to this circuit arrangement map; And (D) literal face data import module, its literal face data that can provide a user to control import function the defined literal face of the literal data definition module of this article data file are imported to this circuit arrangement map, and it can compare the circuit pattern of the literal face data that belong to every remittance automatically, and the predetermined layout attributes of the literal data of this article according to the circuit pattern that belongs to the literal data of this article is arranged on this circuit arrangement map.
The characteristics of literal disposal route of distributed circuit layout character of the present invention and system are to allow the change branch of the definition of the literal face data in the circuit arrangement map and change and its affiliated circuit pattern come independently to carry out separately, make that the change of literal face data can be as not involving the change of circuit pattern as the background technology.These characteristics can allow the design effort of circuit arrangement map more time saving and energy saving and efficient.
Description of drawings
Fig. 1 is an application synoptic diagram, is loaded on the application mode of a computer platform in order to show the literal disposal system of distributed circuit layout character of the present invention;
Fig. 2 is a configuration diagram, in order to show the basic framework of the literal disposal system of distributed circuit layout character of the present invention;
Fig. 3 is a schematic layout pattern, in order to the example of the arrangement form that shows a circuit arrangement map;
Fig. 4 is a schematic layout pattern, is modified form later in order to show circuit arrangement map shown in Figure 3 in wherein circuit pattern and literal face data.
[main element symbol description]
10 computer platforms
20 area of computer aided circuit layout design softwares
30 circuit arrangement maps
40 first circuit patterns
The literal face of 41 first circuit patterns
The modification part of 42 first circuit patterns
50 second circuit patterns
The literal face of 51 second circuit patterns
The literal disposal system of 100 distributed circuit layout characters of the present invention
110 circuit pattern drafting modules
120 literal face data definition modules
121 literal face data files
130 circuit patterns import module
140 literal face data import module
The circuit pattern that 201 users control is drawn incident
The literal face data definition incident that 202 users control
The literal face data definition incident that 203 users control
The literal face data sink incoming event that 204 users control
Embodiment
Below promptly cooperate appended graphicly, disclose the embodiment of explanation literal disposal route of distributed circuit layout character of the present invention and system in detail.
Fig. 1 promptly shows the application mode of the literal disposal system of distributed circuit layout character of the present invention (as the square of label 100 indications).As shown in the figure, the literal disposal system 100 of distributed circuit layout character of the present invention is loaded on a computer platform 10 in practical application, for example be desktop PC, mobile computer or network workstation, and this computer platform 10 is loaded with a computer assisted circuit layout design software 20, for example the Allegro software that developed of US business Cadence Design Systems Inc. (US) (Cadence) provides a literal face processing capacity in order to circuit layout Figure 30 that this circuit layout design software 20 is drawn out.
In practical application, as shown in Figure 3, utilize the remittance mode to arrange the circuit pattern that one or more this circuit layout design software 20 is drawn among aforesaid circuit layout Figure 30, for example be 2 circuit patterns 40,50; Wherein first circuit pattern 40 is associated to a corresponding character face 41, and its word content for example is " J2 "; Second circuit pattern 50 then is associated to another literal face 51, and its word content for example is that " U1 " (annotate: Fig. 3 is only for exemplary graphic; In practical application, circuit layout Figure 30 may comprise the circuit pattern of more electronic component and circuit).
As shown in Figure 2, the basic framework of the literal disposal system 100 of distributed circuit layout character of the present invention comprises at least: (A) circuit pattern drafting module 110; (B) a literal face data definition module 120; (C) circuit pattern imports module 130; And (D) literal face data import module 140.
The individual attribute and the function of each composition module 110,120,130,140 in the literal disposal system 100 of distributed circuit layout character of the present invention below promptly are described at first respectively.
The circuit pattern that circuit pattern drafting module 110 can provide a user to control is drawn function, also can respond the circuit pattern that a user controls and draw the map file that incident 201 is set up a plurality of circuit patterns 40,50, for example be the figure shelves of electronic component or circuit.In addition, the user can so that in each circuit pattern 40,50 layout attributes of pre-defined literal face under it, for example comprise its coordinate, font form, size and the anglec of rotation.These literal face layout attributes will adhere to the circuit pattern 40,50 under each.
The literal face data definition facility that literal face data definition module 120 can provide a user to control, also can respond the literal face data definition incident 202 that a user controls and set up a literal face data file 121, in order to the circuit pattern of being drawn at aforesaid circuit pattern drafting module 110 40,50 define required literal face data respectively, for example define first circuit pattern, 40 affiliated literal face data and be " J2 ", and the literal face data under the definition second circuit pattern 50 are " U1 ". this literal face data file 121 is separately individual other file, does not adhere to any circuit pattern 40,50.
The circuit pattern that circuit pattern imports module 130 can provide a user to control imports function, also can respond circuit pattern that a user controls and import the circuit pattern 40,50 that incident 203 drawn above-mentioned circuit pattern drafting module 110 and import, and the circuit pattern 40,50 of each remittance is arranged in a precalculated position on this circuit layout Figure 30 to this circuit layout Figure 30.
The literal face data that literal face data import module 140 can provide a user to control import function, also can respond the literal face data sink incoming event 204 that a user controls above-mentioned literal face data definition module 120 defined literal face data files 121 are imported to this circuit layout Figure 30.In this process, literal face data import module 140 can compare the circuit pattern that belongs to the every literal face data in the literal data file 121 of this article automatically, and every literal face data are adhered on this circuit layout Figure 30 according to predefined layout attributes (being coordinate, font form, size and the anglec of rotation) in the circuit pattern 40,50 that belongs to the literal data of this article.
Below promptly utilize an application example that the integrated operation mode of the literal disposal system 100 of distributed circuit layout character of the present invention when practical application is described.In this application example, supposing that the design of circuit design and literal face divides to come carries out in division of labor mode, for example for to be responsible for circuit design by slip-stick artist's first, and is responsible for the design of literal face by slip-stick artist's second.
When practical application, can utilize circuit pattern drafting module 110 to draw set of circuits pattern 40,50 (that is send the circuit pattern that a user controls by slip-stick artist's first and draw incident 201) by slip-stick artist's first, and the simultaneously layout attributes of pre-defined literal face under it, for example coordinate, font form, size and the anglec of rotation in each circuit pattern 40,50.These literal face layout attributes will adhere to the circuit pattern 40,50 under each.
In this simultaneously, slip-stick artist's second can utilize literal face data definition module 120 to set up a literal face data file 121 (that is send literal face data definition incident 202 that a user control by slip-stick artist's second), wherein the circuit pattern of promptly being drawn at aforesaid circuit pattern drafting module 110 40,50 defines required literal face data respectively, for example defines first circuit pattern, 40 affiliated literal face data and is " U1 " for the literal face data under " J2 " and the definition second circuit pattern 50.
After above-mentioned circuit pattern drawing and the work of literal face data definition are finished, can for example be responsible for circuit pattern 40,50 and the literal face data file 121 under it are imported to circuit layout Figure 30 by the circuit layout slip-stick artist; Its job procedure imports to this circuit layout Figure 30 (promptly send the circuit pattern that a user controls and import incident 203) at first utilizing circuit pattern to import circuit pattern 40,50 that module 130 drawn above-mentioned circuit pattern drafting module 110, uses circuit pattern 40,50 with each remittance and is arranged in precalculated position on this circuit layout Figure 30; Then utilizing literal face data to import module 140 imports above-mentioned literal face data definition module 120 defined literal face data files 121 to this circuit layout Figure 30 (promptly sending the literal face data sink incoming event 204 that a user controls).In this process, the literal data remittance of this article module 140 can be compared every literal face data " J2 " and " U1 " the affiliated circuit pattern in the literal data file 121 of this article automatically, and with every literal face data " J2 " and " U1 " as shown in Figure 3, according to the circuit pattern under it 40, predefined layout attributes in 50 (is a coordinate, the font form, size, and the anglec of rotation) adheres on this circuit layout Figure 30, can on the specified position of first circuit pattern 40, form a literal face 41 (i.e. " J2 "), and on the specified position of second circuit pattern 50 formation another literal face 51 (i.e. " U1 ").
If the circuit layout slip-stick artist has and need for example change the literal face 41 of first circuit pattern 40 into " J3 " from original " J2 ", as long as then the circuit layout slip-stick artist utilizes literal face data definition module 120 to revise literal face data file 121 (also " J2 " that is about to wherein changes " J3 " into), amended literal face data file 121 being utilized literal face data to import module 140 imports to circuit layout Figure 30 again, change the literal face 41 of first circuit pattern 40 into " J3 " from original " J2 " as can be as shown in Figure 4. in this situation, if first circuit pattern 40 once was modified (part of label 42 indications in as Fig. 4) after importing, can't be as must be at first as the background technology importing first circuit pattern 40 of original version after will 40 deletions of first circuit pattern more again in the then aforesaid literal face data modification process, that is the change of literal face data can be as not involving the change of circuit pattern as the background technology.
Generally speaking, the invention provides literal disposal route of a kind of distributed circuit layout character and system, it can be applicable to a computer platform, provides a literal face processing capacity in order to the circuit arrangement map that an area of computer aided circuit layout design software is drawn out; And its characteristics are to allow the change branch of the definition of the literal face data in the circuit arrangement map and change and its affiliated circuit pattern come independently to carry out separately, make that the change of literal face data can be as not involving the change of circuit pattern as the background technology.These characteristics can allow the design effort of circuit arrangement map more time saving and energy saving and efficient.Therefore the present invention has better progressive and practicality than background technology.
The above is preferred embodiment of the present invention only, is not in order to limit the scope of essence technology contents of the present invention.Essence technology contents of the present invention broadly is defined in the scope of appended claims.If any technology entity that other people are finished or method are identical or are a kind of change of equivalence with the following definien of claim institute, all will be regarded as being covered by among the scope of claims of the present invention.
Claims (9)
1. literal disposal route of distributed circuit layout character, it can be applicable to a computer platform, in order to the circuit arrangement map of a Computer Aided Drawing is carried out a literal face handling procedure;
The literal disposal route of this distributed circuit layout character comprises at least:
Respond the circuit pattern that a user controls and draw incident and draw out a plurality of circuit patterns, and in each circuit pattern one group of layout attributes of pre-defined literal face under it;
Responding the literal face data definition incident that a user controls to define a literal face data file for each circuit pattern;
Responding the circuit pattern remittance incident that a user controls imports this circuit pattern to this circuit arrangement map; And
Responding the literal face data sink incoming event that a user controls imports the literal data file of this article to this circuit arrangement map, and the automatic circuit pattern of comparing the literal face data that belong to every remittance, and the predetermined layout attributes that the literal data foundation of this article is belonged to the circuit pattern of the literal data of this article is arranged on this circuit arrangement map.
2. the literal disposal route of distributed circuit layout character according to claim 1, wherein the literal layout attributes of this article comprises one of them of coordinate, font form, size and anglec of rotation institute cohort group at least.
3. the literal disposal route of distributed circuit layout character according to claim 1, wherein this circuit arrangement map is drawn out by a circuit layout design software.
4. the literal disposal route of distributed circuit layout character according to claim 1, wherein this circuit pattern is associated to a corresponding character face.
5. literal disposal system of distributed circuit layout character, it can be loaded on a computer platform, in order to the circuit arrangement map of a Computer Aided Drawing is carried out a literal face handling procedure;
The literal disposal system of this distributed circuit layout character comprises at least:
One circuit pattern drafting module, it can provide circuit pattern that a user controls to draw function and draw a circuit pattern, and in this circuit pattern one group of layout attributes of pre-defined literal face under it;
One literal face data definition module, its literal face data definition facility that can provide a user to control to define a literal face data file for each circuit pattern that this circuit pattern drafting module is drawn;
One circuit pattern imports module, and the circuit pattern that its circuit pattern remittance function that can provide a user to control is drawn this circuit pattern drafting module imports to this circuit arrangement map; And
One literal face data import module, its literal face data that can provide a user to control import function the defined literal face of the literal data definition module of this article data file are imported to this circuit arrangement map, and it can compare the circuit pattern of the literal face data that belong to every remittance automatically, and the predetermined layout attributes of the literal data of this article according to the circuit pattern that belongs to the literal data of this article is arranged on this circuit arrangement map.
6. the literal disposal system of distributed circuit layout character according to claim 5, wherein the literal layout attributes of this article comprises one of them of coordinate, font form, size and anglec of rotation institute cohort group at least.
7. the literal disposal system of distributed circuit layout character according to claim 5, wherein this circuit arrangement map is drawn out by a circuit layout design software.
8. the literal disposal system of distributed circuit layout character according to claim 7, it is integrated into this circuit layout design software with append mode.
9. the literal disposal system of distributed circuit layout character according to claim 5, wherein this circuit pattern is associated to a corresponding character face.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200610126507A CN101131709B (en) | 2006-08-22 | 2006-08-22 | Distributed circuit layout character face processing method and system thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200610126507A CN101131709B (en) | 2006-08-22 | 2006-08-22 | Distributed circuit layout character face processing method and system thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101131709A CN101131709A (en) | 2008-02-27 |
| CN101131709B true CN101131709B (en) | 2010-05-12 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200610126507A Expired - Fee Related CN101131709B (en) | 2006-08-22 | 2006-08-22 | Distributed circuit layout character face processing method and system thereof |
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| CN (1) | CN101131709B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI528200B (en) * | 2012-11-09 | 2016-04-01 | 緯創資通股份有限公司 | Circuit layout adjusting method |
| TWI630498B (en) * | 2016-12-22 | 2018-07-21 | 和碩聯合科技股份有限公司 | Method and system for drawing circuit and computer program products capable of performing drawing circuit |
| CN107729009A (en) * | 2017-10-23 | 2018-02-23 | 郑州云海信息技术有限公司 | A kind of method of rotary device word in PCB design |
| CN108053460B (en) * | 2017-12-04 | 2022-02-08 | 上海振华重工(集团)股份有限公司 | Drawing method and device of electric power system diagram |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1421806A (en) * | 2001-11-27 | 2003-06-04 | 英业达股份有限公司 | Computer aided circuit design and topological design |
| CN1584889A (en) * | 2004-06-08 | 2005-02-23 | 威盛电子股份有限公司 | Method for preserving circuit artificial word and document annotations |
| CN1787725A (en) * | 2004-12-10 | 2006-06-14 | 英业达股份有限公司 | Method for enhancing positioning efficiency of electronic component |
-
2006
- 2006-08-22 CN CN200610126507A patent/CN101131709B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1421806A (en) * | 2001-11-27 | 2003-06-04 | 英业达股份有限公司 | Computer aided circuit design and topological design |
| CN1584889A (en) * | 2004-06-08 | 2005-02-23 | 威盛电子股份有限公司 | Method for preserving circuit artificial word and document annotations |
| CN1787725A (en) * | 2004-12-10 | 2006-06-14 | 英业达股份有限公司 | Method for enhancing positioning efficiency of electronic component |
Non-Patent Citations (2)
| Title |
|---|
| JP特开2000-132584A 2000.05.12 |
| JP特开平11-353350A 1999.12.24 |
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| CN101131709A (en) | 2008-02-27 |
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