CN101178675A - Method and device for verifying data - Google Patents
Method and device for verifying data Download PDFInfo
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- CN101178675A CN101178675A CNA2007101609750A CN200710160975A CN101178675A CN 101178675 A CN101178675 A CN 101178675A CN A2007101609750 A CNA2007101609750 A CN A2007101609750A CN 200710160975 A CN200710160975 A CN 200710160975A CN 101178675 A CN101178675 A CN 101178675A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
Abstract
The invention discloses a method and a device for verifying the data which belongs to the field of data storage. The method comprises: a CPU makes the wrong check of the verifying data and the corrected verifying code; the data is stored in the memory that a target chip uses; the verifying code is stored; wrong check and corrected verifying are made to the data according to the data and the verifying code by the CPU. The device comprises a disposing module, a storage module and a verifying module. The invention can correctly judge the correctness of data in the memory used by the target chip. Compared with the prior art, the invention overcomes the defect that the target chip hardware does not support the ECC verifying function, protects the data in the memory used by the target chip and improves the reliability of data.
Description
Technical field
The present invention relates to field of data storage, particularly a kind of method and apparatus of checking data.
Background technology
ECC (Error Checking and Correcting, bug check and correction) when being meant the storage data, in the extra ECC result of calculation of position storage of data bit, it is the ECC check code, when reading the data of having stored again, according to the ECC check code these data are carried out verification,, then handle accordingly if find that these data are wrong.As when checking out 1 bit mistake, then correct, when checking out a plurality of bit mistake, then produce warning information.
The ECC function is generally finished by the Memory Controller Hub of chip in the prior art; when storage data in internal memory; Memory Controller Hub carries out ECC and calculates the ECC check code; and also be stored in this ECC check code in the internal memory; when from internal memory, reading these data; according to the ECC check code of having stored these data are carried out verification, correct accordingly if these data make a mistake and protect.
In realizing process of the present invention, the inventor finds that above-mentioned prior art has following shortcoming at least:
The Memory Controller Hub that is not all chips all has the ECC function; when the chip of not supporting the ECC function on this hardware is stored in internal memory and during reading of data; can't carry out the ECC verification to data according to the ECC check code; therefore; when abnormal conditions take place when; can't protect the data of storage, may cause important data to be destroyed.When making the data generation soft failure in the internal memory when a bit saltus step takes place for a certain reason, can't carry out verification and protection to these data.
Summary of the invention
In order to improve the reliability of data, the embodiment of the invention provides a kind of method and apparatus of checking data.Described technical scheme is as follows:
On the one hand, the embodiment of the invention provides a kind of method of checking data, and described method comprises:
CPU generates the bug check of data to be verified and the check code of correction, and described data storage is in the employed internal memory of objective chip;
Store described check code;
CPU carries out bug check and corrects verification described data according to described data and check code.
On the other hand, the embodiment of the invention also provides a kind of device of checking data, and described device comprises:
Processing module is used to generate the check code of the bug check and the correction of data to be verified, in the employed internal memory of the objective chip of described data storage in described device;
Memory module is used to store the check code that described processing module generates;
The verification module is used for the check code according to described data and the storage of described memory module, and described data are carried out bug check and corrected verification.
The beneficial effect of the technical scheme that the embodiment of the invention provides is:
By generating the ECC check code in advance and according to the data and this ECC check code that read these data being carried out the ECC verification when the verification, can correctly judge the correctness of the data in the employed internal memory of objective chip.Compared with prior art, overcome the defective that objective chip hardware is not supported the ECC verifying function, whether the data that can in time detect in the employed internal memory of objective chip are destroyed, and it is protected, improved the reliability of data.
Description of drawings
Fig. 1 is the method flow diagram of the checking data that provides of the embodiment of the invention 1;
Fig. 2 is the synoptic diagram that concerns of the chip that provides of the embodiment of the invention 1 and internal memory;
Fig. 3 is the synoptic diagram that CPU that the embodiment of the invention 1 provides protects the data in the employed internal memory of NP;
Fig. 4 is the structure drawing of device of the checking data that provides of the embodiment of the invention 2.
Embodiment
For making the purpose, technical solutions and advantages of the present invention clearer, embodiment of the present invention is described further in detail below in conjunction with accompanying drawing.
The embodiment of the invention reads these data and ECC check code by the ECC check code that storage in the employed internal memory of objective chip generates and stores these data during data during verification, according to these data and ECC check code these data are carried out the ECC verification.
Embodiment 1
Referring to Fig. 1, the embodiment of the invention provides a kind of method of checking data, specifically comprises:
S101: in the employed internal memory of objective chip, store data.
S102: the ECC check code that generates and stores these data;
Wherein, the step that generates the ECC check code can be realized that in the present embodiment, the process of carrying out this software code is realized by CPU by software.This ECC check code can be stored in the employed internal memory of CPU, also can be stored in other storeies, for example the employed internal memory of objective chip.In the present embodiment, this ECC check code is stored in the employed internal memory of CPU.
S103: reading of data from the employed internal memory of objective chip, read the ECC check code from the employed internal memory of CPU.
Wherein, can when using these data, carry out the ECC verification, also can regularly carry out verification, as 5ms or 10ms or the like to the data in the internal memory to these data.
S104:, these data are carried out the ECC verification according to data that read and ECC check code.
Wherein, data are carried out the method for ECC verification, can be when reading described data, to recomputate to obtain new ECC check code according to identical algorithm, the ECC check code that generates among new ECC check code and the S102 is compared, if two ECC check codes are inequality, illustrate that then mistake has appearred in described data; If two ECC check codes are identical, illustrate that then described data are correct.Wherein, whether identical method has multiple to compare two ECC check codes.For example, ECC check code that generates among the S102 and the new ECC check code that calculates are carried out the step-by-step XOR,, represent that then these data are correct if the result is 0; Otherwise, represent this error in data.
If, find that mistake has taken place described data through after the ECC verification, can also correct or processing such as alarm these data, for example,, then correct processing if the mistake of a bit takes place; If the mistake of a plurality of bits takes place, then carry out alarming processing.
Referring to Fig. 2, during verification, CPU is by objective chip reading of data from the employed internal memory of objective chip, CPU reads the ECC check code of having stored from its employed internal memory, and these data are carried out the ECC verification, thereby the correctness of the data of storing in the employed internal memory of checking objective chip according to this ECC check code with from the data of objective chip.
Resource for fear of take chip too much owing to frequently carry out verification further, can also increase following step in the said method:
In the employed internal memory of objective chip, store before the data, the employed internal memory of objective chip is divided at least one, is divided into polylith usually, when the storage data, in ready-portioned, and the state recording of piece that will have data is for using with data storage.As can designing a data structure, the user mode with the memory block at the ECC check code that generates and this data place during the storage data all is stored in this data structure; At this moment, if the ECC check code also is stored in the employed internal memory of objective chip, then this ECC check code and described data storage are in different pieces.
Adopt the mode of timing verification during verification, the state of each piece of quantitative check storage data, if current block is for using, reading of data from this piece then, and from the piece of storage ECC check code, read this ECC check code, according to data that read and ECC check code these data are carried out the ECC verification.Wherein,,, the partial memory piece can be checked at every turn, also all memory blocks can be checked at every turn for each piece of storage data according to actual conditions.Further, when data that deletion from internal memory has been stored, can be with the status modifier of the memory block at this data place for using, to make things convenient for follow-up use.
Said process S101 to S104 can be used for the internal memory that more important data relate to is carried out ECC management and protection.For example, referring to Fig. 3, CPU generates and issues NP (Network Processor, network processing unit) the various list items that are applied in the message repeating process are given NP, NP receives the back processing such as message classification, filtration, business processing and routing forwarding of carrying out according to contents in table, save as the employed internal memory of NP among the figure, wherein preserve the particular content of list item.When under the CPU during forwarding list item, the driver of CPU is with in the list item write memory, trigger simultaneously and call the call back function of pre-registration in driver, call back function calculates the ECC check code of this list item, and the ECC check code is kept in the ECC data structure of CPU distribution, this data structure can be stored in the employed internal memory of CPU, also can store in the employed internal memory of NP shown in the figure.In addition, CPU starts a quantitative check task, reads list item in the NP internal memory and the ECC check code in being stored in the ECC data structure this list item is carried out the ECC verification, if the result of verification is that list item is correct, soft failure does not take place in expression NP memory field, and system can normally move; If the result of verification is an entry error, expression NP lost efficacy the memory field; The inspection task is carried out error correction according to the ECC check code of preserving, if can not error correction, the task of then checking be informed the upper strata by alarm module, and processing policy is determined according to list item address, significance level in the upper strata.
The present embodiment pin can correctly be judged the correctness of the data in the employed internal memory of objective chip by generating the ECC check code in advance and carrying out the ECC verification according to data and this ECC check code when the verification.Compared with prior art, overcome the defective that objective chip hardware is not supported the ECC verifying function, whether the data that can in time detect in the employed internal memory of objective chip are destroyed, and it is protected, improved the reliability of data.Internally deposit into capable piecemeal storage and ECC verification, can save the shared precious resources of ECC verification, improved efficient and practicality.
Embodiment 2
Referring to Fig. 4, the embodiment of the invention also provides a kind of device of checking data, specifically comprises:
Processing module is used to generate the check code of the bug check and the correction of data to be verified, and data storage is in the employed internal memory of objective chip; The employed internal memory of objective chip and objective chip all is arranged in described device in the present embodiment;
Memory module is used for the check code that the stores processor module generates;
The verification module is used for the check code according to data and memory module storage, and data are carried out bug check and corrected verification.
Further, verification module specifically comprises:
Reading unit is used for regularly from the internal memory reading of data, or when using data, reading of data from internal memory also is used to read the check code of memory module storage;
Verification unit is used for the data and the check code that read according to reading unit, and data are carried out bug check and entangled verification.
Further, said apparatus also comprises:
Divide module, be used for the employed internal memory of objective chip is divided at least one;
Data memory module is used for data storage to be verified at the piece of dividing Module Division;
Logging modle is used for data memory module is stored the state recording of piece of data for using;
Correspondingly, verification module specifically comprises:
Inspection unit is used to check the state of the piece of dividing Module Division;
Verification unit is used for checking out at least one state when using when inspection unit, and the piece of reading state for having used carries out bug check and correct verification data according to the check code of data of storing in this piece and memory module storage.
Further, said apparatus also comprises:
Correct module, be used for when the calibration mode block check goes out error in data, data being corrected or alarming processing.
Present embodiment can correctly be judged the correctness of the data in the employed internal memory of objective chip by generating the ECC check code in advance and carrying out the ECC verification according to data and this ECC check code when the verification.Compared with prior art, overcome the defective that objective chip hardware is not supported the ECC verifying function, whether the data that can in time detect in the employed internal memory of objective chip are destroyed, and it is protected, improved the reliability of data.
The embodiment of the invention can utilize software to realize, corresponding software can be stored in the storage medium that can read, in chip or internal memory.
Below only be preferred embodiment of the present invention, or not within the spirit and principles in the present invention not all in order to restriction the present invention, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (9)
1. the method for a checking data is characterized in that, described method comprises:
CPU generates the bug check of data to be verified and the check code of correction, and described data storage is in the employed internal memory of objective chip;
Store described check code;
CPU carries out bug check and corrects verification described data according to described data and check code.
2. the method for checking data according to claim 1 is characterized in that, the described check code of described storage is specially:
Described check code is stored in the employed internal memory of CPU, perhaps described check code is stored in the employed internal memory of described objective chip.
3. the method for checking data according to claim 1 is characterized in that, described CPU carries out bug check and corrects verification described data according to described data and check code, is specially:
Regularly read described data and check code, described data are carried out bug check and corrected verification;
Or when using described data, read described data and described check code, described data are carried out bug check and corrected verification.
4. the method for checking data according to claim 3 is characterized in that, before the bug check of the data that described CPU generation is to be verified and the check code of correction, also comprises:
The employed internal memory of objective chip is divided at least one, and in described, the state of the piece of the described data of recording storage is for using with data storage to be verified;
Correspondingly, described CPU carries out bug check and corrects verification described data according to described data and described check code, specifically comprises:
CPU checks the state of the piece of described division, if for using, then according to the data of storage among described check code and described described data is carried out bug check and is corrected verification.
5. according to the method for the described checking data of arbitrary claim in the claim 1 to 4, it is characterized in that described method also comprises:
When CPU carries out bug check and corrects verification described data according to described data and check code, when finding described error in data, described data are corrected or alarming processing.
6. the device of a checking data is characterized in that, described device comprises:
Processing module is used to generate the check code of the bug check and the correction of data to be verified, and described data storage is in the employed internal memory of objective chip;
Memory module is used to store the check code that described processing module generates;
The verification module is used for according to the data of described internal memory and the check code of described memory module storage described data being carried out bug check and being corrected verification.
7. the device of checking data according to claim 6 is characterized in that, described verification module specifically comprises:
Reading unit is used for regularly reading described data from described internal memory, or when using described data, reads described data from described internal memory, also is used to read the check code of described memory module storage;
Verification unit is used for the data and the check code that read according to described reading unit, and described data are carried out bug check and entangled verification.
8. the device of checking data according to claim 6 is characterized in that, described device also comprises:
Divide module, be used for the employed internal memory of described objective chip is divided at least one;
Data memory module is used for data storage to be verified piece in described division Module Division;
Logging modle is used for described data memory module is stored the state recording of piece of described data for using;
Correspondingly, described verification module specifically comprises:
Inspection unit is used to check the state of the piece of described division Module Division;
Verification unit, be used for checking out that when described inspection unit at least one state is when using, read described state and be the piece that used, described data are carried out bug check and corrected verification according to the data of storage in described and the check code of described memory module storage.
9. according to the device of the described checking data of arbitrary claim in the claim 6 to 8, it is characterized in that described device also comprises:
Correct module, be used for when described calibration mode block check goes out described error in data, described data being corrected or alarming processing.
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CNB2007101609750A CN100562857C (en) | 2007-12-14 | 2007-12-14 | The method and apparatus of checking data |
PCT/CN2008/073460 WO2009089716A1 (en) | 2007-12-14 | 2008-12-11 | Data checking method and device |
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CNB2007101609750A CN100562857C (en) | 2007-12-14 | 2007-12-14 | The method and apparatus of checking data |
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WO2009089716A1 (en) * | 2007-12-14 | 2009-07-23 | Huawei Technologies Co., Ltd. | Data checking method and device |
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Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5459742A (en) * | 1992-06-11 | 1995-10-17 | Quantum Corporation | Solid state disk memory using storage devices with defects |
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-
2007
- 2007-12-14 CN CNB2007101609750A patent/CN100562857C/en not_active Expired - Fee Related
-
2008
- 2008-12-11 WO PCT/CN2008/073460 patent/WO2009089716A1/en active Application Filing
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