CN101162711A - Packaging cover board, chip packaging structure and manufacturing method thereof - Google Patents
Packaging cover board, chip packaging structure and manufacturing method thereof Download PDFInfo
- Publication number
- CN101162711A CN101162711A CNA2006101317851A CN200610131785A CN101162711A CN 101162711 A CN101162711 A CN 101162711A CN A2006101317851 A CNA2006101317851 A CN A2006101317851A CN 200610131785 A CN200610131785 A CN 200610131785A CN 101162711 A CN101162711 A CN 101162711A
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- chip
- cover plate
- encapsulation cover
- support portion
- packaging structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16235—Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip
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Abstract
A chip package structure comprises a chip, a package cover board and a bound layer, wherein, the chip is provided with a drive surface which is provided with an image sensing element and a plurality of connection cushions positioned on the periphery of the sensing element. In addition, the package cover board is arranged above the drive surface and comprises a baseplate and a support part positioned on the baseplate, wherein, a holding room is left on the baseplate by the support part, the support part contacts with the drive surface of the chip to ensure the image sensing element on the drive surface arranged in the holding room. Besides, the bound layer is arranged between the support part and the drive surface. The chip package structure of the invention has the advantages of high rate of finished products of technique, low cost of production and good optical penetrating power.
Description
Technical field
The present invention relates to a kind of chip-packaging structure and manufacture method thereof, and particularly relate to a kind of chip-packaging structure and manufacture method thereof with encapsulation cover plate.
Background technology
In semiconductor industry, (integrated circuits, production IC) mainly are divided into three phases to integrated circuit: the making of the manufacturing of wafer (wafer), integrated circuit (IC) and the encapsulation (package) of integrated circuit etc.Wherein, bare chip (die) is finished via wafer fabrication, circuit design, photomask (mask) making and cut crystal steps such as (wafer saw), and each cuts formed bare chip by wafer, via the contact on the bare chip with after external signal is electrically connected, can with packing colloid (molding compound) bare chip be coated again.The purpose of its encapsulation is to prevent that bare chip is subjected to moisture, heat, The noise, and the media that is electrically connected between bare chip and the external circuit is provided, and so promptly finishes the encapsulation step of integrated circuit.
And because the encapsulation step of traditional integrated circuit is with after forming a plurality of bare chips at cut crystal, via routing technology (wire bonding process) or controlled collapsible chip connec-tion (flip chip process) contact on the bare chip is electrically connected with external signal, just bare chip is coated afterwards with packing colloid.Therefore, bare chip is not before coating with packing colloid, and extraneous particulate (particles) falls to be attached on the bare chip easily, and makes the process yield (yield) of existing chip-packaging structure reduce.And the cost height of above-mentioned packaging technology.
In order to address the above problem, existing another kind of chip-packaging structure as shown in Figure 1.This chip-packaging structure 200 comprises a chip 210, an encapsulation cover plate 220 and a sept (spacer) 230a.Wherein, dispose an Image Sensor 214 on the active surface 212 of chip 210 and be positioned at Image Sensor 214 a plurality of connection pads 216 on every side.In addition, the periphery of sept 230a is coated with an adhesion layer 230b, so encapsulation cover plate 220 is support and the top that is disposed at active surface 212 of sticking together that sees through adhesion layer 230b by sept 230a.
Though this kind packaged type cost is low and can improve the packaging technology rate of finished products, but, owing to being by sept 230a and adhesion layer 230b support between chip 210 and the encapsulation cover plate 220 and sticking together, and the light transmittance of sept 230a and adhesion layer 230b (optic transmission) is lower, therefore will make the light transmittance of integral core chip package 200 reduce.
In addition, because the limitation in height of sept 230, in this chip-packaging structure 200, the distance between encapsulation cover plate 220 and the Image Sensor 214 is quite close.Therefore, when extraneous particulate falls to encapsulation cover plate 220 outer surfaces, particulate may be come out by imaging, and cause Image Sensor 214 optical qualities to be affected.
Via as can be known above-mentioned, existing chip-packaging structure has that process yield is low, manufacturing cost is high, light transmittance is low and influence shortcomings such as optical element quality.Therefore, existing chip-packaging structure has improved necessity in fact.
Summary of the invention
Purpose of the present invention is providing a kind of encapsulation cover plate exactly, and it can solve the low shortcoming of light transmittance of existing chip-packaging structure.
A further object of the present invention provides a kind of chip-packaging structure, and its process yield that can solve existing chip-packaging structure is low, manufacturing cost is high, light transmittance is low and influence shortcoming such as optical element quality.
Another purpose of the present invention provides a kind of manufacture method of chip-packaging structure, and it can solve shortcomings such as the low and manufacturing cost height of the process yield of existing chip-packaging structure.
Based on above-mentioned purpose or other purpose, the present invention proposes a kind of encapsulation cover plate, and it is in order to encapsulate a wafer, and wherein wafer comprises a plurality of element regions.Encapsulation cover plate comprises a substrate and a support portion.The support portion is disposed on the substrate, and wherein the support portion can define a plurality of spatial accommodations on substrate, and each spatial accommodation can be corresponding with each element region on the wafer.
Described according to the preferred embodiments of the present invention, the height of above-mentioned support portion is for example between 15 to 50 microns.
Described according to the preferred embodiments of the present invention, the top of above-mentioned support portion for example has a groove.In addition, above-mentioned encapsulation cover plate for example also comprises an adhesion layer, and it is positioned at groove.
Described according to the preferred embodiments of the present invention, above-mentioned encapsulation cover plate for example also comprises at least one pair of quasi-mark, is disposed on the substrate.
Described according to the preferred embodiments of the present invention, the material of above-mentioned encapsulation cover plate for example is glass or polymethyl methacrylate.
Based on above-mentioned purpose or other purpose, the present invention proposes a kind of chip-packaging structure, comprises a chip, an encapsulation cover plate and an adhesion layer.Wherein, chip has an active surface, and disposes an Image Sensor on the active surface and be positioned at Image Sensor a plurality of connection pads on every side.In addition, encapsulation cover plate is disposed at the active surface top, encapsulation cover plate comprises a substrate and a support portion that is positioned on the substrate, wherein the support portion can define a spatial accommodation on substrate, and the support portion contacts with the active surface of chip, so that the Image Sensor on the active surface is disposed in the spatial accommodation.In addition, adhesion layer is disposed between support portion and the active surface.
Described according to the preferred embodiments of the present invention, the height of above-mentioned support portion is for example greater than the height of Image Sensor.
Described according to the preferred embodiments of the present invention, the height of above-mentioned support portion is for example between 15 to 50 microns.
Described according to the preferred embodiments of the present invention, the top of above-mentioned support portion for example has a groove, and adhesion layer is to be positioned at groove.
Described according to the preferred embodiments of the present invention, the material of above-mentioned encapsulation cover plate for example is glass or polymethyl methacrylate.
Based on above-mentioned purpose or other purpose, the present invention proposes a kind of manufacture method of chip-packaging structure, comprises the following steps.At first, provide a wafer, wafer has an active surface, and has disposed a plurality of Image Sensors on the active surface and be positioned at each Image Sensor a plurality of connection pads on every side.Then, provide an encapsulation cover plate, encapsulation cover plate comprises a substrate and a support portion that is positioned on the substrate, and wherein the support portion can define a plurality of spatial accommodations on substrate.Moreover, between the active surface of support portion and wafer, form an adhesion layer, and encapsulation cover plate is engaged with the active surface of wafer, wherein each Image Sensor on the wafer can correspondence be disposed in each spatial accommodation.At last, cut encapsulation cover plate and cut crystal respectively to form a plurality of chip-packaging structures.
Described according to the preferred embodiments of the present invention, above-mentioned encapsulation cover plate is to utilize photoetching and etch process or molding moulding (molding) technology and form.
Described according to the preferred embodiments of the present invention, the height of above-mentioned support portion is for example greater than the height of the Image Sensor on the wafer.
Described according to the preferred embodiments of the present invention, the height of above-mentioned support portion is for example between 15 to 50 microns.
Described according to the preferred embodiments of the present invention, when above-mentioned making encapsulation cover plate, a groove is formed on the top that for example also is included in the support portion.In addition, adhesion layer for example is to be coated in the groove.
Described according to the preferred embodiments of the present invention, when above-mentioned making encapsulation cover plate, for example also be included in and form at least one pair of quasi-mark on the encapsulation cover plate.In addition, above-mentioned making in encapsulation cover plate and the step that the active surface of wafer engages for example also comprises by alignment mark and carries out contraposition.
Described according to the preferred embodiments of the present invention, the material of above-mentioned encapsulation cover plate for example is glass or polymethyl methacrylate (PMMA).
Based on above-mentioned, because chip-packaging structure of the present invention is directly with encapsulation cover plate wafer to be encapsulated just wafer to be cut afterwards, therefore can prevent that extraneous particulate from falling to be attached on the chip, so chip-packaging structure of the present invention and method can promote process yield.And this kind chip-packaging structure and method compared to the conventional package mode simple and low cost of manufacture.
In addition, because the support portion and the substrate of encapsulation cover plate of the present invention all are material transparent, therefore utilizing this encapsulation cover plate to encapsulate can be so that the light transmittance of chip-packaging structure be good than the traditional die encapsulating structure.
In addition, distance between chip of the present invention and the encapsulation cover plate can design the height of support portion according to actual demand, when the height of support portion greater than to a certain degree the time, when if particulate is arranged attached to the outer surface of encapsulation cover plate, particulate will lose Jiao and can't imaging, so the optical quality of Image Sensor can not be affected.
For above and other objects of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 illustrates the generalized section of existing another kind of chip-packaging structure.
Fig. 2 illustrates the generalized section of a kind of chip-packaging structure of the preferred embodiment of the present invention.
Fig. 3 then illustrates the schematic top plan view of the chip-packaging structure of Fig. 2.
Fig. 4 to Fig. 6 illustrates the generalized section of manufacture method of the chip-packaging structure of Fig. 2.
The simple symbol explanation
200: existing chip-packaging structure
210,310: chip
212,312: active surface
214,314: Image Sensor
216,316: connection pad
220,320, P: encapsulation cover plate
230a: sept
230b, 330: adhesion layer
300: chip-packaging structure of the present invention
322: substrate
324: the support portion
324a: groove
A: arrow
H1: the height of support portion
H2: the height of Image Sensor
S: spatial accommodation
W: wafer
Z: element region
Embodiment
Please refer to Fig. 2 and Fig. 3, Fig. 2 illustrates the generalized section of a kind of chip-packaging structure of the preferred embodiment of the present invention, and Fig. 3 then illustrates the schematic top plan view of the chip-packaging structure of Fig. 2.The chip-packaging structure 300 of present embodiment comprises a chip 310, an encapsulation cover plate 320 and an adhesion layer 330.Wherein, chip 310 has an active surface 312, and disposes an Image Sensor 314 on the active surface 312 and be positioned at Image Sensor 314 a plurality of connection pads 316 on every side.In one embodiment, Image Sensor 314 for example comprises contact image sensor (contact image sensor) or complementary metal oxide semiconductor image sensor (CMOS image sensor), it is in order to receiving an external optical signal, and light signal is converted to the signal of telecommunication and is handled via chip 310.And Image Sensor 314 can be electrically connected with being positioned at its connection pad 316 on every side, and it for example sees through metal interconnecting (not illustrating) and is electrically connected.
In addition, encapsulation cover plate 320 is disposed at the top of active surface 312, and encapsulation cover plate 320 comprises a substrate 322 and a support portion 324 that is positioned on the substrate 322.As shown in Figure 2, support portion 324 can define a spatial accommodation S on substrate 322, and support portion 324 contacts with the active surface 312 of chip 310, so that the Image Sensor 314 on the active surface 312 is disposed in the spatial accommodation S.In addition, adhesion layer 330 is disposed between support portion 324 and the active surface 312.Thus, the Image Sensor 314 on the chip 310 can get up in packed cover plate 320 cappings, and Image Sensor 314 and external environment are kept apart.
Particularly, please refer to Fig. 2, in encapsulation cover plate 320 of the present invention, the height H 1 of support portion 324 can be greater than the height H 2 of Image Sensor 314.Preferably, the height H 1 of support portion 324 is between 15 to 50 microns.In addition, in a preferred embodiment, the top of support portion 324 has a groove 324a, and adhesion layer 330 is to be positioned at groove 324a.In addition, the material of encapsulation cover plate 320 for example is glass or polymethyl methacrylate (PMMA).The material of adhesion layer 330 for example is the ultraviolet light adhesion material.
What deserves to be mentioned is, owing to be that the support portion 324 that sees through encapsulation cover plate 320 is supported between encapsulation cover plate 320 and the chip 310, therefore, the distance between encapsulation cover plate 320 and the chip 310 can not be restricted, and it can be required and be designed to any height according to reality.If the distance between encapsulation cover plate 320 and the chip 310 is higher than to a certain degree, if when particulate is arranged attached to encapsulation cover plate 320 outer surfaces, will be because losing burnt (de-focus) and can imaging.Therefore, can make unlikely being affected of optical quality of the Image Sensor 314 on the chip 310.
Follow-up, can be applied to chip and be installed in (chip on board on the circuit board, COB) or chip be installed in that (chip on flex, mode COF) make the connection pad 316 on the chip-packaging structure 300 be electrically connected with the electronic installation (not illustrating among Fig. 2) of next level on the soft board.
Below be illustrated at the manufacture method of the chip-packaging structure 300 of present embodiment.Fig. 4 to Fig. 6 illustrates the generalized section of manufacture method of the chip-packaging structure of Fig. 2.Please refer to Fig. 4, at first, provide a wafer W, wafer W has an active surface 312, and disposed a plurality of Image Sensors 314 on the active surface 312, it lays respectively in a plurality of element region Z of wafer W, and is positioned at a plurality of connection pads 316 around each Image Sensor 314.
Then, provide an encapsulation cover plate P, encapsulation cover plate P comprises a substrate 322 and a support portion 324 that is positioned on the substrate 322, and wherein support portion 324 can define a plurality of spatial accommodation S on substrate 322.More detailed explanation is, the position of the spatial accommodation S that support portion 324 is defined on substrate 322 and number are according to the position of the element region Z of wafer W and number and decide.So, follow-up when wafer W is engaged with encapsulation cover plate P, each spatial accommodation S on the encapsulation cover plate P can cover each Image Sensor 314 on the wafer W.
In addition, if the material glass of encapsulation cover plate P then can utilize photoetching (photolithography) and etching (etching) technology to be formed.Offer a piece of advice it, for example with comprehensive painting photoresist (photoresist) material in the surface of a large glass, and via exposure (exposure) and (development) technology of developing forming patterning photoresist layer, and further carry out etch process to form encapsulation cover plate P by this patterning photoresist layer for glass again.Yet, if the material polymethyl methacrylate of encapsulation cover plate P can utilize photoetching and etch process or molding moulding (molding) technology is formed.With regard to the molding moulding process, a large-scale PMMA plate can be pressed via a mould, to form the encapsulation cover plate P of Fig. 4.
Please continue with reference to figure 4, via the formed encapsulation cover plate P of above-mentioned technology, the height H 1 of its support portion 324 is for example greater than the height H 2 of the Image Sensor on the wafer W 314 again.Preferably, the height H 1 of support portion 324 is for example between 15 to 50 microns.In one embodiment, in the technology of above-mentioned formation encapsulation cover plate P, a groove 324a is formed on the top that more can be included in support portion 324.In another embodiment, also be included in encapsulation cover plate P and go up at least one alignment mark M of formation.What deserves to be mentioned is that the present invention more can be disposed at correspondence the thickness of the substrate 322 of these connection pad 316 tops and do thinlyyer, in order to follow-up cutting step (stating as follows).
Moreover, please refer to Fig. 4 and Fig. 5, between the active surface 312 of support portion 324 and wafer W, form an adhesion layer 330, and the active surface 312 of encapsulation cover plate P and wafer W is bonded with each other, and each Image Sensor 314 on the wafer W can correspondence be disposed in each spatial accommodation S.Please refer to Fig. 4, in the present embodiment, adhesion layer 330 for example is to be coated in the groove 324a, and in addition, adhesion layer 330 also can be pre-formed on active surface 312 and correspond to the position that engages with groove 324a, but does not illustrate with drawing.In addition, above-mentioned making in encapsulation cover plate P and the step that the active surface 312 of wafer W engages more can comprise by alignment mark M and carry out contraposition, so that each Image Sensor 314 certain correspondence is disposed in each spatial accommodation S.
At last, please refer to Fig. 5 and Fig. 6, cut encapsulation cover plate P and cut crystal W respectively to form a plurality of chip-packaging structures 300.In the present embodiment, cut the position of encapsulation cover plate P and wafer W and direction respectively shown in the arrow A among Fig. 5.In addition, with regard to the mode of cutting, the mode that the mode of cutting encapsulation cover plate P can adopt laser cutting or cut with diamond cutter, the mode of cut crystal W then takes diamond cutter to cut usually.In addition, when encapsulation cover plate P cuts, can cut encapsulation cover plate P and wafer W in regular turn with regard to temporal sequencing, or cut crystal W and encapsulation cover plate P in regular turn, perhaps cut encapsulation cover plate P and wafer W simultaneously.Moreover in the process of cutting encapsulation cover plate P, the part substrate of these connection pad 316 tops can be removed to expose these connection pads 316.
In sum, chip-packaging structure of the present invention has the following advantages at least:
(1) because chip-packaging structure of the present invention is promptly directly not encapsulate with encapsulation cover plate before wafer cuts, therefore extraneous particulate is not easy to be attached on the chip, so the process yield of chip-packaging structure of the present invention can promote.And the manufacturing cost of this kind chip-packaging structure reduces;
(2) because the support portion and the substrate of encapsulation cover plate of the present invention are all transparent material, therefore utilizing this encapsulation cover plate to encapsulate can be so that the light transmittance of chip-packaging structure be good than the traditional die encapsulating structure;
(3) distance between chip of the present invention and the encapsulation cover plate can design the height of support portion according to actual demand, when the height of support portion greater than to a certain degree the time, if the outer surface of particulate attached to encapsulation cover plate arranged, attached to the particulate of the outer surface of encapsulation cover plate will because of and chip between distance excessive and lose burnt thereby can't imaging, so the optical quality of Image Sensor can not be affected.
Though the present invention discloses as above with preferred embodiment; yet it is not in order to limit the present invention; those skilled in the art can do a little change and retouching without departing from the spirit and scope of the present invention, thus protection scope of the present invention should with accompanying Claim the person of being defined be as the criterion.
Claims (20)
1. encapsulation cover plate, it is in order to encapsulate wafer, and wherein this wafer comprises a plurality of element regions, and this encapsulation cover plate comprises:
Substrate; And
The support portion is disposed on this substrate, and wherein this support portion can define a plurality of spatial accommodations on this substrate, and each spatial accommodation can be corresponding with each element region on this wafer.
2. encapsulation cover plate as claimed in claim 1, wherein the height of this support portion is between 15 to 50 microns.
3. encapsulation cover plate as claimed in claim 1, wherein the top of this support portion has groove.
4. encapsulation cover plate as claimed in claim 3 also comprises adhesion layer, is positioned at this groove.
5. encapsulation cover plate as claimed in claim 1 also comprises at least one pair of quasi-mark, is disposed on this substrate.
6. encapsulation cover plate as claimed in claim 1, wherein the material of this encapsulation cover plate is glass or polymethyl methacrylate.
7. chip-packaging structure comprises:
Chip has active surface, and disposes Image Sensor on this active surface and be positioned at this Image Sensor a plurality of connection pads on every side;
Encapsulation cover plate, be disposed at this active surface top, this encapsulation cover plate comprises substrate and the support portion that is positioned on this substrate, wherein this support portion can define spatial accommodation on this substrate, and this support portion contacts with this active surface of this chip, so that this Image Sensor on this active surface is disposed in this spatial accommodation; And
Adhesion layer is disposed between this support portion and this active surface.
8. chip-packaging structure as claimed in claim 7, wherein the height of this support portion is greater than the height of this Image Sensor.
9. chip-packaging structure as claimed in claim 7, wherein the height of this support portion is between 15 to 50 microns.
10. chip-packaging structure as claimed in claim 7, wherein the top of this support portion has groove, and this adhesion layer is to be positioned at this groove.
11. chip-packaging structure as claimed in claim 7, wherein the material of this encapsulation cover plate is glass or polymethyl methacrylate.
12. the manufacture method of a chip-packaging structure comprises:
Wafer is provided, and this wafer has active surface, has disposed a plurality of Image Sensors on this active surface and has been positioned at each Image Sensor a plurality of connection pads on every side;
Encapsulation cover plate is provided, and this encapsulation cover plate comprises substrate and the support portion that is positioned on this substrate, and wherein this support portion can define a plurality of spatial accommodations on this substrate;
Form adhesion layer between this active surface of this support portion and this wafer, and this encapsulation cover plate is engaged with this active surface of this wafer, wherein each Image Sensor on this wafer can correspondence be disposed in each spatial accommodation; And
Cut this encapsulation cover plate respectively and cut this wafer to form a plurality of chip-packaging structures.
13. the manufacture method of chip-packaging structure as claimed in claim 12, wherein this encapsulation cover plate is to utilize photoetching and etch process or molding moulding process and form.
14. the manufacture method of chip-packaging structure as claimed in claim 12, wherein the height of this support portion is greater than the height of this Image Sensor on this wafer.
15. the manufacture method of chip-packaging structure as claimed in claim 12, wherein the height of this support portion is between 15 to 50 microns.
16. the manufacture method of chip-packaging structure as claimed in claim 12, wherein when making this encapsulation cover plate, groove is formed on the top that also is included in this support portion.
17. the manufacture method of chip-packaging structure as claimed in claim 16, wherein this adhesion layer is to be coated in this groove.
18. the manufacture method of chip-packaging structure as claimed in claim 12 wherein when making this encapsulation cover plate, also is included in and forms at least one pair of quasi-mark on this encapsulation cover plate.
19. the manufacture method of chip-packaging structure as claimed in claim 18 wherein makes in this encapsulation cover plate and the step that this active surface of this wafer engages, also comprises by this alignment mark and carries out contraposition.
20. the manufacture method of chip-packaging structure as claimed in claim 12, wherein the material of this encapsulation cover plate is glass or polymethyl methacrylate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2006101317851A CN101162711A (en) | 2006-10-12 | 2006-10-12 | Packaging cover board, chip packaging structure and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2006101317851A CN101162711A (en) | 2006-10-12 | 2006-10-12 | Packaging cover board, chip packaging structure and manufacturing method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101162711A true CN101162711A (en) | 2008-04-16 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2006101317851A Pending CN101162711A (en) | 2006-10-12 | 2006-10-12 | Packaging cover board, chip packaging structure and manufacturing method thereof |
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| CN (1) | CN101162711A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106356391A (en) * | 2016-08-30 | 2017-01-25 | 昆山工研院新型平板显示技术中心有限公司 | Manufacturing method of packaging cover, packaging structure and manufacturing method of packaging structure |
| CN106531903A (en) * | 2016-11-10 | 2017-03-22 | 昆山国显光电有限公司 | Oled packaging method and packaging structure |
| CN107275228A (en) * | 2016-04-07 | 2017-10-20 | 力成科技股份有限公司 | Improve the method for packaging semiconductor of upper cover plate precision |
| CN109119387A (en) * | 2018-09-04 | 2019-01-01 | 京东方科技集团股份有限公司 | Encapsulating structure |
| CN110010485A (en) * | 2018-10-10 | 2019-07-12 | 浙江集迈科微电子有限公司 | A kind of hermetic type optical-electric module manufacture craft with light path converting function |
| CN112034017A (en) * | 2020-09-16 | 2020-12-04 | 电子科技大学 | Wafer-level packaging-based micro thermal conductivity detector and preparation method thereof |
| CN108649045B (en) * | 2018-07-06 | 2024-04-09 | 昆山丘钛微电子科技有限公司 | Packaging structure and camera module |
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2006
- 2006-10-12 CN CNA2006101317851A patent/CN101162711A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107275228A (en) * | 2016-04-07 | 2017-10-20 | 力成科技股份有限公司 | Improve the method for packaging semiconductor of upper cover plate precision |
| CN107275228B (en) * | 2016-04-07 | 2019-08-06 | 力成科技股份有限公司 | Improve the method for packaging semiconductor of upper cover plate precision |
| CN106356391A (en) * | 2016-08-30 | 2017-01-25 | 昆山工研院新型平板显示技术中心有限公司 | Manufacturing method of packaging cover, packaging structure and manufacturing method of packaging structure |
| CN106531903A (en) * | 2016-11-10 | 2017-03-22 | 昆山国显光电有限公司 | Oled packaging method and packaging structure |
| CN106531903B (en) * | 2016-11-10 | 2019-04-02 | 昆山国显光电有限公司 | OLED encapsulation method and encapsulating structure |
| CN108649045B (en) * | 2018-07-06 | 2024-04-09 | 昆山丘钛微电子科技有限公司 | Packaging structure and camera module |
| CN109119387A (en) * | 2018-09-04 | 2019-01-01 | 京东方科技集团股份有限公司 | Encapsulating structure |
| CN109119387B (en) * | 2018-09-04 | 2021-01-26 | 京东方科技集团股份有限公司 | Packaging structure |
| CN110010485A (en) * | 2018-10-10 | 2019-07-12 | 浙江集迈科微电子有限公司 | A kind of hermetic type optical-electric module manufacture craft with light path converting function |
| CN112034017A (en) * | 2020-09-16 | 2020-12-04 | 电子科技大学 | Wafer-level packaging-based micro thermal conductivity detector and preparation method thereof |
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