CN101154046A - Manufacturing method for double-mosaic structure - Google Patents
Manufacturing method for double-mosaic structure Download PDFInfo
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- CN101154046A CN101154046A CNA2006101168791A CN200610116879A CN101154046A CN 101154046 A CN101154046 A CN 101154046A CN A2006101168791 A CNA2006101168791 A CN A2006101168791A CN 200610116879 A CN200610116879 A CN 200610116879A CN 101154046 A CN101154046 A CN 101154046A
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Abstract
A dual pattern structure manufacturing method includes the following steps that: a semi-conductor base is provided; a dielectric layer is formed on the semi-conductor base; the dielectric layer is spin coated with a first photoresist layer which is selectively exposed, and the photoresist layer is removed through development; the dielectric layer uncovered by the first photoresist layer is etched and forms a first opening; the first photoresist layer is removed; the mixed solution of CLK888 and oxyful is used to clean the surface of the dielectric layer; a sacrificial layer is formed in the first opening and on the dielectric layer; the sacrificial layer is spin coated with a second photoresist layer; the second photoresist layer is selectively exposed and developed, and a second opening is formed in the dielectric layer through etching. The cleaning in the method can remove photoresist residue in the dual pattern structure manufacturing technology.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, particularly a kind of double mosaic structure manufacture method.
Background technology
Photo-etching technological process in the semiconductor fabrication is promptly by at wafer surface spin coating photoresist, and exposure imaging is with the figure transfer made in advance on the mask plate process to the photoresist.The wafer that has the photoresist figure then is admitted to etching or etching is carried out in the zone that is not covered by photoresist on the wafer to ion implantation device or ion injects, to form needed structure and doping content.Etching or ion need be removed the photoresist pattern by technologies such as ashing and cleanings after injecting and finishing, to descend technologies such as one deposition, grinding, photoetching.Yet ashing (Ash) and advance the acid tank cleaning and but be difficult to sometimes the photoresist that stays in the photoetching of preceding road is removed fully, thereby can stay photoresist residue (Scum), these residues can influence technologies such as follow-up photoetching, etching, cause the figure after the etching to produce into defective.For example, in the mosaic technology of copper, after etching forms connecting hole (Via), need to remove the photoresist pattern layer that connects the escutcheon curtain as etching, remove in the process of this photoresist pattern layer, usually can stay residue in ashing as interconnection line.Described residue can influence the profile of the groove of follow-up formation, and then the profile and the resistance of the metal connecting line of influence formation, makes the electric current that flows through described metal connecting line not reach the requirement of expection, can open circuit when serious, causes device stability to descend.Number of patent application is that 200510056297.4 Chinese patent discloses a kind of dual-damascene technics.Fig. 1 to Fig. 5 is the manufacture method of the mosaic technology of this patent disclosure.
As shown in Figure 1, at first provide semiconductor substrate 100, in the described semiconductor-based end 100, be formed with device layer.Deposition first dielectric layer 102 on the described semiconductor-based end 100.Described first dielectric layer 102 is a carbon nitrogen silicon compound.On described first dielectric layer 102, form second dielectric layer 104.Described second dielectric layer 104 is an advanced low-k materials.
As shown in Figure 2, spin coating first photoresist layer 106 on described second dielectric layer 104 forms connecting hole figure 108 by exposure imaging.
As shown in Figure 3, second dielectric layer 104 of the described connecting hole figure of etching 108 bottoms forms connecting hole 108a in described second dielectric layer 104.
As shown in Figure 4, remove described first photoresist layer 106, and form an anti-reflecting layer 110 on described connecting hole 108a neutralizes second dielectric layer 104, spin coating second photoresist layer 112 on described anti-reflecting layer 110 forms channel patterns 114.
As shown in Figure 5, the material of the described channel patterns of etching 114 bottoms is transferred to described channel patterns 114 in second dielectric layer 104, removes described second photoresist layer 112 and anti-reflecting layer 110, forms groove 114a.
Behind the connecting hole 108a that forms as shown in Figure 3, need remove first photoresist layer 106 by the oxygen gas plasma ashing, enter acid tank then and carry out wet-cleaned, yet, owing in photo-etching technological process, there is the multistep Technology for Heating Processing to remove solvent and moisture in the photoresist, to increase adhesiveness and the anti-etching ability of photoresist in wafer surface, thereby, when photoresist is removed in ashing, because the adhesiveness of photoresist and wafer surface is bigger, causes the part photoresist to be difficult to be removed and generate the photoresist residue.As shown in Figure 6, after removing described first photoresist layer 106, part photoresist residue 116 remains in described second dielectric layer 104 surface or first dielectric layer, 102 surfaces, when etching forms groove 114a, described residue 116 has stopped the etching of plasma to second dielectric layer 104 as anti-etching dose, cause the groove 114a profile variations that forms, so can influence formation device electrically.
Summary of the invention
Therefore, the object of the present invention is to provide a kind of double mosaic structure manufacture method, the photoresist residue is difficult to removed problem in the existing dual pattern structure manufacturing technology to solve.
For achieving the above object, a kind of double mosaic structure manufacture method provided by the invention comprises:
The semiconductor substrate is provided; On the described semiconductor-based end, form dielectric layer; Spin coating first photoresist layer on described dielectric layer, and selectivity described first photoresist layer that exposes are removed first photoresist layer that is exposed by develop; The described dielectric layer that is not covered by first photoresist layer of etching forms first opening in described dielectric layer; Remove described first photoresist layer; Clean described dielectric layer surface with alkaline solution; On the described first opening neutralization medium layer, form sacrifice layer, spin coating second photoresist layer on described sacrifice layer; Selectivity exposure, described second photoresist layer and form second opening in the described dielectric layer by being etched in develops.
The method of removing described first photoresist layer comprises ashing and wet-cleaned.
Described alkaline solution comprises CLK888, a kind of in the aqua ammonia.
Described alkaline solution is the mixed solution of CLK888 and hydrogen peroxide.
The ratio of described CLK888 and hydrogen peroxide is 5: 1 to 15: 1.
The temperature of the mixed solution of described CLK888 and hydrogen peroxide is 50 to 70 ℃.
The time of described cleaning is 10 minutes to 1 hour.
Described dielectric layer comprises a kind of or its combination in black diamond, fluorine silex glass, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, monox, silicon nitride, the silit.
Described first opening and second opening comprise connecting hole, groove.
Described sacrifice layer comprises photoresist, DUO and other antireflection material.
This method further comprises: formed an etching stop layer before forming dielectric layer on the described semiconductor-based end.
This method further comprises: remove described second photoresist layer and sacrifice layer, filled conductive material in described first opening and second opening.
Accordingly, the present invention also provides a kind of removal method of photoresist residue, comprising: the semiconductor substrate is provided, and described semiconductor-based basal surface has the photoresist residue; With alkaline solution described semiconductor-based basal surface is cleaned.
Described alkaline solution comprises the mixed solution of CLK888 and hydrogen peroxide.
Compared with prior art, the present invention has the following advantages: the inventive method can be removed the photoresist residue on dielectric layer surface by the mixed solution cleaning of CLK888 and hydrogen peroxide, has avoided the influence of photoresist residue to subsequent technique.
Be applied in the dual-damascene technics, after forming first opening on the dielectric layer, the inventive method is by using CLK888, and aqua ammonia cleans described dielectric layer surface.Owing in photoetching, need the substrate surface that adheres to that photoresist can be best, make that photoresist is difficult to be removed, plasma has very high energy and temperature when etching simultaneously, also increased the adhesiveness of photoresist at substrate surface, in addition because substrate surface inevitably adsorbs the pollutant of external environment condition, and substrate has nitrogenous material, and nitrogenous material can make photoresist produce residue in the pollutant of substrate surface and the substrate.Thereby after removing photoresist, oxygen gas plasma can produce into the photoresist residue on the dielectric layer surface.The cleaning of CLK888 and hydrogen peroxide solution by alkalescence, the photoresist residue on dielectric layer surface can be removed.Avoided of the influence of photoresist residue to follow-up formation second opening.Make second opening that forms have profile preferably, thereby make the conductive material of in first opening and second opening, filling to meet the requirements of electric property, improved the stability of the device that forms.Improved the yield of product aborning.
Description of drawings
Fig. 1 to Fig. 5 is the diagrammatic cross-section of existing a kind of dual-damascene structure manufacture method;
Fig. 6 is the synoptic diagram that produces the photoresist residue in the existing dual-damascene structure manufacture process;
Fig. 7 to Fig. 9 removes the synoptic diagram that photoresist residue method is removed semiconductor-based basal surface residue for the present invention;
Figure 10 is the process flow diagram of dual pattern structure manufacturing technology of the present invention;
Figure 11 to Figure 18 is the diagrammatic cross-section of dual pattern structure manufacturing technology of the present invention.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the specific embodiment of the present invention is described in detail below in conjunction with accompanying drawing.
The photoresist that is spin-coated on substrate surface in the photoetching needs to remove so that carry out next process with dry etching or wet-cleaned after etching, yet because the multistep Technology for Heating Processing in photoetching for example soft roasting (Softbake), postexposure bake (PEB), hard roasting (Hard bake), the factors such as bombardment of the plasma of high energy make that photoresist is difficult to peel off from substrate surface in pollutant that substrate surface is nitrogenous and the etching, thereby can produce photoresist residue (Scum) at substrate surface after wet method or dry method remove photoresist, described photoresist residue can influence the formation of the middle pattern (pattern) of follow-up photoetching etching technics.Cause producing defective in the device, or even fatal defective (killer defect), influence device performance, reduce the yield of producing.The invention provides a kind of method of removing the photoresist residue, promptly select for use the mixed solution of CLK888 and hydrogen peroxide that the semiconductor substrate surface is cleaned, this cleaning can be removed the photoresist residue of substrate surface.
Below in conjunction with embodiment the removal method of photoresist residue of the present invention is described in detail.
As shown in Figure 7, semiconductor substrate 200 is provided, the described semiconductor-based end 200, comprise a substrate 201, described substrate 201 can be materials such as silicon on polysilicon, monocrystalline silicon, amorphous silicon, the insulation course (SOI), arsenicization are sowed, silicon Germanium compound, be formed with shallow trench isolation from 202 in described substrate 201, described shallow trench isolation is filled with insulating medium for example monox, silicon nitride or its combination in 202.In described substrate 201, also be formed with source electrode 203a and drain electrode 203b by doping, be formed with an oxide layer 204 on described substrate 201 surfaces, on the oxide layer 204 between described source electrode 203a and the drain electrode 203b, be formed with grid 206, described grid 206 can be a polysilicon, metal silicide or its combination, be formed with side wall (spacer) 207 in described grid 206 both sides, be formed with a dielectric layer 208 on described oxide layer 204 and grid, described dielectric layer 208 can be a monox, silicon nitride, the nitrogen-oxygen-silicon compound, nitrogen nitrogen silicon compound, the fluorine silex glass, a kind of or its combination in the insulating material such as phosphorosilicate glass.
As shown in Figure 8, spin coating photoresist 210 and form contact hole (contact) pattern 212 by technologies such as exposure imagings on described dielectric layer 208 is transferred to described contact hole pattern 212 by etching and is formed contact hole 212a in the described dielectric layer 208.As shown in Figure 9, remove described photoresist 210.The method of removing is a dry method oxygen gas plasma etching.Owing in photoetching, need the substrate surface that adheres to that photoresist can be best, it is necessary that this is that photoresist satisfies technologies such as etching, this makes that photoresist is difficult to be removed, plasma has very high energy and temperature when etching simultaneously, also increased the adhesiveness of photoresist at substrate surface, in addition because substrate surface inevitably adsorbs the pollutant of external environment condition, and substrate has nitrogenous material, and nitrogenous material can make photoresist produce residue in the pollutant of substrate surface and the substrate.Thereby after removing photoresist, oxygen gas plasma can produce into photoresist residue 215 on dielectric layer 208 surfaces.
After removing photoresist 210, be that dielectric layer 208 surfaces are cleaned to surface, the described semiconductor-based ends 200 with alkaline solution.Described alkaline solution comprises CLK888, a kind of in the aqua ammonia.Select the mixed solution of CLK888 and hydrogen peroxide in the present embodiment for use.The proportional range of described CLK888 and hydrogen peroxide is 5: 1 to 15: 1, selects for use in the present embodiment 10: 1.The temperature of described alkaline solution is 50 to 70 ℃.The temperature of the mixed solution of CLK888 and hydrogen peroxide is 60 ℃ in the present embodiment, sustainable 10 minutes to 1 hour of the time of described cleaning.The cleaning of CLK888 and hydrogen peroxide solution by alkalescence, the photoresist residue 215 on surface of the semiconductor-based ends 200 can be removed.Removed surface, the described semiconductor-based ends 200 simultaneously owing to expose particle (particle), the pollutant that absorbs in the environment externally to the open air.
The removal method of photoresist residue of the present invention can be used in the manufacture method of dual-damascene structure technology.
Figure 10 is the process flow diagram of dual-damascene structure manufacture method of the present invention.
As shown in figure 10, at first provide the semiconductor substrate, in the described semiconductor-based end, be formed with device layer (S200).
On the described semiconductor-based end, form dielectric layer (S210).Described dielectric layer is a kind of or its combination in black diamond, fluorine silex glass, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, monox, silicon nitride, the silit.
Spin coating first photoresist layer on described dielectric layer, and described first photoresist layer that optionally exposes carry out develop then and remove the photoresist that is exposed, and form the pattern (S220) of first opening.
The described dielectric layer that is not covered by first photoresist layer of etching forms first opening (S230) in described dielectric layer, described first opening can be that groove also can be a connecting hole.
Remove first photoresist layer (S240) by the oxygen gas plasma ashing.
After removing described first photoresist layer, clean described dielectric layer surface (S250) with alkaline solution, described alkaline solution is the mixed solution of CLK888 and hydrogen peroxide.Residual by cleaning the photoresist that to remove described dielectric layer surface.
On the described first opening neutralization medium layer, form sacrifice layer, spin coating second photoresist layer (S260) on described sacrifice layer.Described sacrifice layer can be photoresist, DU0 and other antireflection material.
Selectivity exposure, described second photoresist layer and form second opening (S270) in the described dielectric layer by being etched in develops.Described second opening can be connecting hole or groove.By remove first photoresist layer in ashing after, the dielectric layer surface is cleaned in the said method, can be removed the photoresist residue on dielectric layer surface, avoided of the influence of described photoresist residue the profile that forms second opening with alkaline solution.
Below dual-damascene structure manufacture method of the present invention is described in detail.
As shown in figure 11, at first provide semiconductor substrate 300, in the described semiconductor-based end 300, be formed with device layer.The described semiconductor-based end 300 can be materials such as silicon on polysilicon, monocrystalline silicon, amorphous silicon, the insulation course (SOI), arsenicization are sowed, silicon Germanium compound.Described device layer can be a metal oxide semiconductor transistor.To carrying out the plasma surface pre-service in the described semiconductor-based end 300 with device layer.Can eliminate the pollutant of substrate surface by the plasma surface pre-service, improve the character of Facing material of the described semiconductor-based ends 300, strengthen the dielectric layer that subsequent technique forms and the adhesiveness on surface, the described semiconductor-based ends 300.After finishing the plasma pre-service to surface, the described semiconductor-based ends 300, deposition-etch stops layer 302 on surface, the described semiconductor-based ends 300.The method that deposits described etching stop layer 302 is a kind of in physical vapour deposition (PVD), chemical vapor deposition, plasma enhanced chemical vapor deposition, high density plasma CVD, the ald.Described etching stop layer 302 is a kind of or its combination in monox, silit, silicon nitride, carbon silicon oxide compound, the nitrogen-doped silicon carbide, and thickness is 20 to 80nm.
As described in Figure 12, form dielectric layer 304 on described etching stop layer 302, described dielectric layer 304 is a kind of or its combination in black diamond, fluorine silex glass, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, monox, silicon nitride, the silit.The method that forms described dielectric layer 304 is physical vapour deposition (PVD) or chemical vapor deposition.
As shown in figure 13, spin coating first photoresist layer 306 on described dielectric layer 304, the thickness of photoresist 306 is decided according to the difference of process conditions.For being applied to chemically-amplified resist that exposure wavelength is 248nm, be generally 30 to 100nm.
As shown in figure 14, heat treating equipment is sent at the described semiconductor-based end 200 that has photoresist 306 carried out soft roasting (soft bake), the temperature of baking is 80 ℃ to 150 ℃, and the time is 10 to 60 seconds.By the solvent in the described photoresist 306 of baking removal, behind soft bake, send into exposure sources, through a series of alignings back by scanning type exposure with the figure transfer on the mask plate to described photoresist 306, by can generation light acid and solable matter in the photoresist 306 of sensitization.Carry out postexposure bake (PEB) then, the light acid that exposure produces can be used as catalyzer and produce more light acid and solable matter in photoresist, temperature and time by control PEB makes that solable matter reaches target call in the photoresist, by developing and washing and remove, generate first opening figure 308 by the solable matter behind sensitization and the PEB.
As shown in figure 15, by etching described first opening figure 308 is transferred to the formation first opening 308a on the described dielectric layer 304, the first opening 308a is a connecting hole described in the present embodiment, thereby described etching stop layer 302 is exposed in described first opening 308a bottom.Remove described first photoresist layer 306 by the oxygen plasma cineration technics.
With alkaline solution described dielectric layer 304 surfaces are cleaned.Described alkaline solution comprises CLK888, a kind of in the aqua ammonia.Select the mixed solution of CLK888 and hydrogen peroxide in the present embodiment for use.The proportional range of described CLK888 and hydrogen peroxide is 5: 1 to 15: 1, selects for use in the present embodiment 10: 1.The temperature of described alkaline solution is 50 to 70 ℃.The temperature of the mixed solution of CLK888 and hydrogen peroxide is 60 ℃ in the present embodiment, sustainable 10 minutes to 1 hour of the time of described cleaning.Owing in photoetching, need the substrate surface that adheres to that photoresist can be best, make that photoresist is difficult to be removed, plasma has very high energy and temperature when etching simultaneously, also increased the adhesiveness of photoresist at substrate surface, in addition because substrate surface inevitably adsorbs the pollutant of external environment condition, and substrate has nitrogenous material, and nitrogenous material can make photoresist produce residue in the pollutant of substrate surface and the substrate.Thereby after removing photoresist, oxygen gas plasma can produce into the photoresist residue on dielectric layer 304 surfaces.The cleaning of CLK888 and hydrogen peroxide solution by alkalescence, the photoresist residue on dielectric layer 304 surfaces can be removed.Avoided of the influence of photoresist residue to follow-up formation second opening.
As shown in figure 16, on the described first opening 308a neutralization medium layer 304, form a sacrifice layer 310, spin coating second photoresist layer 312 on described sacrifice layer 310.Described sacrifice layer 310 can be photoresist, DUO or other antireflection material, and described sacrifice layer 310 can be avoided forming the bottom that the second opening process ionic medium body damages the first opening 308a in etching.On the other hand, described sacrifice layer 310 is filled in and makes among the described first opening 308a that second photoresist layer, 312 lower surfaces are comparatively smooth, more helps forming second patterns of openings, 314 profiles preferably.
As shown in figure 17, the sacrifice layer 310 and second dielectric layer 304 of described second patterns of openings of etching 314 bottoms form the second opening 314a in described second dielectric layer 304, and the bottom of the described second opening 314a is higher than the bottom of the described first opening 308a.Owing to after removing first photoresist layer 306, removed the photoresist residue on described dielectric layer 304 surfaces by the alkaline solution cleaning, etching can be transferred to described second patterns of openings 314 in the described dielectric layer 304 comparatively accurately, form the second opening 314a and have profile preferably, its live width is within specification limit (CD in spec) also.Remove described second photoresist layer 312 and sacrifice layer 310.
As shown in figure 18, first dielectric layer 302 of the first opening 308a shown in etching bottom, filled conductive material copper for example forms attachment plug 308b and interconnection line 314b in the described first opening 308a and the second opening 314a.
Though the present invention with preferred embodiment openly as above; but it is not to be used for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; can make possible change and modification, so protection scope of the present invention should be as the criterion with the scope that claim of the present invention was defined.
Claims (14)
1. double mosaic structure manufacture method comprises:
The semiconductor substrate is provided;
On the described semiconductor-based end, form dielectric layer;
Spin coating first photoresist layer on described dielectric layer, and selectivity described first photoresist layer that exposes are removed first photoresist layer that is exposed by develop;
The described dielectric layer that is not covered by first photoresist layer of etching forms first opening in described dielectric layer;
Remove described first photoresist layer;
Clean described dielectric layer surface with alkaline solution;
On the described first opening neutralization medium layer, form sacrifice layer, spin coating second photoresist layer on described sacrifice layer;
Selectivity exposure, described second photoresist layer and form second opening in the described dielectric layer by being etched in develops.
2. double mosaic structure manufacture method as claimed in claim 1 is characterized in that: the method for removing described first photoresist layer comprises ashing and wet-cleaned.
3. double mosaic structure manufacture method as claimed in claim 1, its characteristic is: described alkaline solution comprises CLK888, a kind of in the aqua ammonia.
4. double mosaic structure manufacture method as claimed in claim 1 is characterized in that: described alkaline solution is the mixed solution of CLK888 and hydrogen peroxide.
5. double mosaic structure manufacture method as claimed in claim 4 is characterized in that: the ratio of described CLK888 and hydrogen peroxide is 5: 1 to 15: 1.
6. double mosaic structure manufacture method as claimed in claim 4 is characterized in that: the temperature of the mixed solution of described CLK888 and hydrogen peroxide is 50 to 70 ℃.
7. double mosaic structure manufacture method as claimed in claim 1 is characterized in that: the time of described cleaning is 10 minutes to 1 hour.
8. double mosaic structure manufacture method as claimed in claim 1 is characterized in that: described dielectric layer comprises a kind of or its combination in black diamond, fluorine silex glass, phosphorosilicate glass, Pyrex, boron-phosphorosilicate glass, monox, silicon nitride, the silit.
9. double mosaic structure manufacture method as claimed in claim 1 is characterized in that: described first opening and second opening comprise connecting hole, groove.
10. double mosaic structure manufacture method as claimed in claim 1 is characterized in that: described sacrifice layer comprises photoresist, DUO and other antireflection material.
11. double mosaic structure manufacture method as claimed in claim 1 is characterized in that, this method further comprises: formed an etching stop layer before forming dielectric layer on the described semiconductor-based end.
12. double mosaic structure manufacture method as claimed in claim 1 is characterized in that, this method further comprises: remove described second photoresist layer and sacrifice layer, filled conductive material in described first opening and second opening.
13. the removal method of a photoresist residue comprises:
The semiconductor substrate is provided, and described semiconductor-based basal surface has the photoresist residue;
With alkaline solution described semiconductor-based basal surface is cleaned.
14. the removal method of photoresist residue as claimed in claim 13, its characteristic is: described alkaline solution comprises the mixed solution of CLK888 and hydrogen peroxide.
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| CN2006101168791A CN101154046B (en) | 2006-09-30 | 2006-09-30 | Manufacturing method for double-mosaic structure |
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| CN2006101168791A CN101154046B (en) | 2006-09-30 | 2006-09-30 | Manufacturing method for double-mosaic structure |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103353708A (en) * | 2013-06-14 | 2013-10-16 | 大连理工大学 | Multilayer negative photoresist mold manufacturing method |
| CN104241114A (en) * | 2013-06-09 | 2014-12-24 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing semiconductor device |
| CN112147848A (en) * | 2019-06-26 | 2020-12-29 | 山东华光光电子股份有限公司 | Preparation method of small-size groove |
| CN113764260A (en) * | 2020-06-01 | 2021-12-07 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and forming method thereof |
| CN114895531A (en) * | 2022-04-18 | 2022-08-12 | 上海图灵智算量子科技有限公司 | Method of cleaning a substrate for a lithographic process |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7223684B2 (en) * | 2004-07-14 | 2007-05-29 | International Business Machines Corporation | Dual damascene wiring and method |
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2006
- 2006-09-30 CN CN2006101168791A patent/CN101154046B/en not_active Expired - Fee Related
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104241114A (en) * | 2013-06-09 | 2014-12-24 | 中芯国际集成电路制造(上海)有限公司 | Method for manufacturing semiconductor device |
| CN104241114B (en) * | 2013-06-09 | 2017-11-10 | 中芯国际集成电路制造(上海)有限公司 | A kind of manufacture method of semiconductor devices |
| CN103353708A (en) * | 2013-06-14 | 2013-10-16 | 大连理工大学 | Multilayer negative photoresist mold manufacturing method |
| CN112147848A (en) * | 2019-06-26 | 2020-12-29 | 山东华光光电子股份有限公司 | Preparation method of small-size groove |
| CN113764260A (en) * | 2020-06-01 | 2021-12-07 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor structure and forming method thereof |
| CN114895531A (en) * | 2022-04-18 | 2022-08-12 | 上海图灵智算量子科技有限公司 | Method of cleaning a substrate for a lithographic process |
| CN114895531B (en) * | 2022-04-18 | 2024-02-23 | 上海图灵智算量子科技有限公司 | Method for cleaning a substrate for a lithographic process |
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