CN101106102A - 柔性导电互连 - Google Patents

柔性导电互连 Download PDF

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CN101106102A
CN101106102A CN200710138509.2A CN200710138509A CN101106102A CN 101106102 A CN101106102 A CN 101106102A CN 200710138509 A CN200710138509 A CN 200710138509A CN 101106102 A CN101106102 A CN 101106102A
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substrate
conducting polymer
polymer
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L·莫斯利
J·马维蒂
F·华
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Intel Corp
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Abstract

柔性导电互连，包括由于工艺条件而易于失效的层间电介质的集成电路可通过借助导电聚合物上的焊料球将集成电路连接至衬底而得到保护。导电聚合物允许将电流导入或导出集成电路，并提供对包括机械挠动和热膨胀以及收缩的应力的缓冲。结果，可以使用相对较低的介电常数的材料作为集成电路中的层间电介质。

Description

柔性导电互连
技术领域
本发明涉及附着管芯(die)至封装件(package)的互连。
背景技术
通常当固定管芯于有机衬底时，在附着组装工艺中，管芯中的层间电介质(ILD)易于破碎。这种破碎是由于这样的事实，即较低介电常数的层间电介质比绝大多数传统的ILD材料机械性更脆弱。
具体而言，现今的倒装芯片技术用焊点来提供衬底和硅管芯之间的机械和电连接。最严重的应力状况之一发生在芯片附着工艺中。应力产生于衬底和硅管芯间膨胀系数不匹配的状况。硅，焊盘材料(pad material)，和衬底材料比管芯内部的层间电介质更强硬。
在芯片附着工艺中，产生于在温度变化中管芯和衬底的热膨胀系数不匹配和焊接所需要的升高的温度的应力，通过焊点直接传递到管芯中。既然层间电介质是管芯中最脆弱的材料，它可能受到损害。
发明内容
根据本发明的一些实施方案，导电聚合物可以用作附着管芯至封装件的互连的一部分。导电聚合物可以用在封装件或管芯上。导电聚合物可以具有足够的柔性以降低在管芯中的层间电介质层中的应力。
如在这里所用的，导电聚合物是一种具有电导率至少为1E6西门子每米(S/m)以上或者电阻率不超过铜的一至两个数量级量值的聚合物。导电聚合物的例子包括有机聚合物，共聚物，和共轭聚合物。具体的例子包括聚苯胺，聚吡咯，聚噻吩(聚乙烯二氧噻吩，和聚(3-环己基噻吩))，聚(对亚苯基亚乙烯基)，聚乙炔，聚(芴)聚萘和对聚苯硫。
在一些实施方案中，通过插入导电添加剂如碳颗粒或金属纤维如铜或银纤维，导电或不导电的聚合物可以变得导电或更加导电。在许多情况中，有机导电聚合物具有离域(delocalized)的导带，通常包括产生没有定域态的能带结构的芳香族单元。已被导入导带或价带中的电荷载流子显著地提升了导电能力。
根据本发明的一些实施方案，理想的导电聚合物可以具有其表面法线方向的大于7mm/N的挠度和在切线方向大于10mm./N的挠度。
附图说明
图1是本发明的一个实施方案的局部放大图；
图2是本发明的另一个实施方案的局部放大图；
图3是本发明的另一个实施方案的局部放大图；以及
图4是根据本发明的一个实施方案的系统图。
具体实施方案
参考图1，根据本发明的一个实施方案，集成电路或管芯12可以固定于衬底14。在本发明的一个实施方案中，集成电路12是包括焊料球22的倒装芯片，以形成集成电路12和衬底14的表面安装连接。阻焊膜20可以环绕接触区域。
衬底14可以包括较低的金属或铜迹线16，通过垂直的电连接或穿过介电层18的通孔30耦合。介电层18，位于电通路的附近，可以由阻焊膜20覆盖。穿过阻焊膜的开口为迹线16和焊料球22之间的电连接提供空间。
在本发明的一个实施方案中，一对金属焊盘26和24可以夹着插入的导电聚合物28。在本发明的一个实施方案中焊盘26和24可以是铜。在这样的实施方案中，通孔30可以也由铜来形成，尽管也可以用其它材料。在一个实施方案中导电聚合物28的厚度可以为约10至50微米。在一些实施方案中，焊盘26、24和聚合物28的总阻抗可以是约5毫欧或更少。
作为图1中所示的布局的结果，能够得到从迹线16到集成电路12的电导通，与此同时提供缓冲给集成电路12。此缓冲产生于导电聚合物28相对于金属的更大的柔性。此缓冲可以保护集成电路12内部的层间电介质避免失效。这可能是减小机械负载和与缓冲相关的机械挤压的结果。导电聚合物的应用也可以为集成电路12和衬底14之间的相应热膨胀留有余地，因为压力或张力可以被吸收在聚合物28中。
参考图2，根据本发明的另一个实施方案，可以使用单独的一个金属焊盘24与导电聚合物28a，在一些实施方案中，它可以更厚。通常，导电聚合物28或28a可以比传统的用来形成互连的金属诸如铜更具有柔性。
通过用导电聚合物作为互连的一部分，可以减小集成电路中层间电介质内的应力。在一些实施方案中，导电聚合物没有取代焊锡凸块，仅仅只是用来减小应力的附加层。
聚合物28或28a的形成可以通过多种不同的方法完成。在一个实施方案中，聚合物可以被丝网印刷。另一种可替换的方式是将聚合物旋涂在上面，接着，用光刻胶从不需要聚合物的地方除去聚合物。同样，可以用掩膜以便可以淀积聚合物，之后除去掩膜。其它可能的技术包括溅射、浸渍、电镀、电子束淀积、喷射和真空淀积。
作为另一种替换方式，会形成导电聚合物的单体可以与聚合催化剂混合以形成分散体。一种合适的聚合催化剂是Baytron C催化剂，它是甲苯磺酸铁III盐和正丁炔醇，由德国Gostar的H.C.Starck GmbH出售。Baytron C催化剂是商业上可获得的催化剂，用于Baytron M聚合物，即3，4-乙烯二氧噻吩，是由德国Gostar的H.C.Starck GmbH出售的单体。
一旦形成催化剂的分散体，多种技术可以用来施加聚合物，包括以上描述的任何一种技术。在一些实施方案中，可以愈合或固化导电聚合物。固化可以发生在每次导电聚合物层施加之后或者在整个导电聚合物涂层的施加之后。在一些实施方案中，可以通过浸渍到电解液如磷酸和/或硫酸溶液中，然后对溶液施加恒定电压直到电流减小到预定水平，来固化导电聚合物。
参考图3，集成电路管芯40的连接也可以如图3所示通过柔性导电聚合物28a完成。例如，可以在如互连或其它金属线的导电迹线42上定义柔性导电聚合物28a。导电触点或焊盘24可以定义在聚合物28a上，而且例如通过焊料球22可以对其进行适当连接。另外，除了这是与集成电路管芯连接的事实外，前面的讨论等同地适用于本实施方案。钝化层44可以环绕接触区域并且覆盖迹线42。在一些情况下层44可以小于10微米厚。
参考图4，根据本发明的一个实施方案，集成电路10可以是处理器，如例所示，它可以安装在诸如计算机的电子组件36中。处理器可以与包括总线的板30耦合，它接着将处理器与其它器件如存储器32和输入/输出接口34电耦合。
这样，在一些实施方案中，板30可以与衬底14相对应。在其它实施方案中，管芯可以是通过导电聚合物固定于衬底的处理器，可以封装管芯和衬底成为集成电路封装件，之后安装其至例如印刷电路板的板上。然而，通常，可以耦合衬底14至板30。其它的排布也是可以的。当然，基于处理器的系统的构造和它的应用是极其多变的。例如，除了形成母板上的集成电路或其它元件，本发明可以用在多种集成电路中，提及的一些例子包括存储集成电路，逻辑集成电路，和通信电路。
通常，获得集成电路至板或其它衬底的表面安装，同时使用相当低的介电常数的材料，由于在处理集成电路和板的过程中热膨胀系数的不匹配，挤压，和热的施加，它可能易于破碎，实施例将应用于这样的情况。
贯穿本说明书中的参照“一个实施方案”或“实施方案”意指与该实施方案有关联的特定的特征、结构或者特性包括在围绕本发明内的至少一种实施方式中。这样，短语“一个实施方案”或“在实施方案中”的出现不一定是指同样的实施方案。另外，特定的特征，结构，或者特性可以存在于除了示出的特定实施方案外的其它适当形式，并且所有的这些形式可以包含在本申请的权利要求中。
尽管参照有限数目的实施方案描述本发明，本领域技术人员可以懂得大量的由其而来的修改例和变形例。所附的权利要求意图覆盖所有的这些修改例和变形例，只要是落入在本发明的确切精神和范围内。

Claims (30)

1.一种方法，其包括：
通过导电聚合物电耦合具有焊料球的集成电路至衬底。
2.根据权利要求1的方法，包括在衬底上提供导电聚合物。
3.根据权利要求2的方法，包括用所述焊料球耦合所述集成电路至所述衬底。
4.根据权利要求3的方法，包括在所述导电聚合物上提供金属触点，所述金属触点接触所述焊料球。
5.根据权利要求4的方法，包括在所述导电聚合物下提供金属触点。
6.根据权利要求5的方法，包括提供穿过所述衬底的通孔，所述通孔耦合至所述焊料球。
7.根据权利要求1的方法，包括使用具有导电添加剂的导电聚合物。
8.根据权利要求1的方法，包括使用成形为导电的聚合物材料的导电聚合物。
9.根据权利要求1的方法，包括使用具有至少1E6 S/m电导率的导电聚合物进行的电耦合。
10.根据权利要求1的方法，包括耦合集成电路至衬底，所述集成电路包括层间电介质。
11.一种互连，包括：
衬底；
通过焊料球表面安装在所述衬底上的管芯；以及
所述衬底包括其上固定有所述焊料球的导电聚合物。
12.根据权利要求11的互连，包括位于所述导电聚合物的至少一面上的金属焊盘。
13.根据权利要求11的互连，包括位于所述聚合物的两面上的导电焊盘。
14.根据权利要求11的互连，包括通孔和迹线，所述通孔和所述迹线电耦合至所述导电聚合物。
15.根据权利要求11的互连，其中所述导电聚合物包括导电的聚合物。
16.根据权利要求11的互连，其中所述导电聚合物包括聚合物和在所述聚合物中能够使电流被所述导电聚合物导通的材料。
17.根据权利要求11的互连，其中所述导电聚合物具有至少1E6 S/m的电导率。
18.根据权利要求11的互连，其中所述互连封装在集成电路封装件中。
19.根据权利要求11的互连，其中所述集成电路包括层间电介质。
20.根据权利要求11的互连，其中所述导电聚合物具有其表面法线方向的大于7mm每牛顿的挠度。
21.一种衬底，包括：
结构；
在所述结构上的金属焊盘；以及
在所述结构和所述金属焊盘之间的导电聚合物。
22.根据权利要求21的衬底，其中所述衬底是印刷电路板。
23.根据权利要求21的衬底，其中所述衬底是用于集成电路封装的衬底。
24.根据权利要求21的衬底，包括位于所述导电聚合物的两面上的金属焊盘。
25.根据权利要求21的衬底，包括位于所述结构上的迹线和穿过所述结构的通孔，所述通孔耦合至所述迹线和所述导电聚合物。
26.根据权利要求21的衬底，其中所述导电聚合物具有至少1E6 S/m的电导率。
27.根据权利要求21的衬底，其中所述导电聚合物具有其表面法线方向的大于7mm每牛顿的挠度。
28.根据权利要求21的衬底，其中所述导电聚合物包括导电的聚合物。
29.根据权利要求21的衬底，其中所述导电聚合物包括聚合物和在所述聚合物中能够使电流被所述导电聚合物导通的材料。
30.根据权利要求21的衬底，其中所述衬底是管芯。
CN200710138509.2A 2006-06-27 2007-06-27 柔性导电互连 Pending CN101106102A (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110691459A (zh) * 2018-07-05 2020-01-14 同泰电子科技股份有限公司 利用防焊限定开窗形成连接端子的电路板结构

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20090070916A (ko) * 2007-12-27 2009-07-01 삼성전기주식회사 반도체 장치 및 그 제조방법
KR101641102B1 (ko) * 2009-04-01 2016-07-20 쿨리케 앤드 소파 인더스트리즈, 인코포레이티드 도전성 범프, 와이어 루프 및 그 형성 방법
TWI419095B (zh) 2010-10-25 2013-12-11 Au Optronics Corp 顯示器

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3031344A (en) * 1957-08-08 1962-04-24 Radio Ind Inc Production of electrical printed circuits
US6064120A (en) * 1997-08-21 2000-05-16 Micron Technology, Inc. Apparatus and method for face-to-face connection of a die face to a substrate with polymer electrodes
JP3033539B2 (ja) * 1997-08-26 2000-04-17 日本電気株式会社 キャリアフィルムおよびその製造方法
US6297564B1 (en) * 1998-04-24 2001-10-02 Amerasia International Technology, Inc. Electronic devices employing adhesive interconnections including plated particles
US6251211B1 (en) * 1998-07-22 2001-06-26 Micron Technology, Inc. Circuitry interconnection method
US6492738B2 (en) * 1999-09-02 2002-12-10 Micron Technology, Inc. Apparatus and methods of testing and assembling bumped devices using an anisotropically conductive layer
US6333104B1 (en) * 2000-05-30 2001-12-25 International Business Machines Corporation Conductive polymer interconnection configurations
US6201305B1 (en) * 2000-06-09 2001-03-13 Amkor Technology, Inc. Making solder ball mounting pads on substrates
US6396156B1 (en) * 2000-09-07 2002-05-28 Siliconware Precision Industries Co., Ltd. Flip-chip bonding structure with stress-buffering property and method for making the same
US6767819B2 (en) * 2001-09-12 2004-07-27 Dow Corning Corporation Apparatus with compliant electrical terminals, and methods for forming same
US7036573B2 (en) * 2002-02-08 2006-05-02 Intel Corporation Polymer with solder pre-coated fillers for thermal interface materials
US6864147B1 (en) * 2002-06-11 2005-03-08 Avx Corporation Protective coating for electrolytic capacitors
US6762503B2 (en) * 2002-08-29 2004-07-13 Micron Technology, Inc. Innovative solder ball pad structure to ease design rule, methods of fabricating same and substrates, electronic device assemblies and systems employing same
US6813153B2 (en) * 2002-09-18 2004-11-02 Intel Corporation Polymer solder hybrid

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110691459A (zh) * 2018-07-05 2020-01-14 同泰电子科技股份有限公司 利用防焊限定开窗形成连接端子的电路板结构

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