CN101064497A - Complementary metal oxide semiconductor cascade high-gain current-to-voltage converter - Google Patents

Abstract

A kind of CMOS common source common bar high plus current voltage converter, The invention relates to current voltage converting technique field, it includes common source common bar current mirror composed by transistors, the common source common bar current mirror is end-to-end joint by the common source common bar current mirror composed by four PMOS transistors and the common source common bar current mirror composed by four NMOS transistors, the alternating current signal is input from the joint position of upper and lower current mirror, and imaged by two current mirrors, the output voltage equals to the product of input current and output common source common bar structure resistance. The invention converts tiny pA class current signal to mV voltage, realizes high plus with character that the output resistance of the common source common bar current mirror is big, the structure is simple and plus is big, because there is feedback resistance, problem of stability does not be taken into account.

Description

The complementary metal oxide semiconductor cascade high-gain current-to-voltage convertor

Technical field

The present invention relates to the current-to-voltage convertor technical field, particularly a kind of complementary metal oxide semiconductors (CMOS) (CMOS) cascade high-gain current-to-voltage converter.

Background technology

In order to detect the low current signal (pA magnitude) of MEMS electric-field sensor output, need the current-to-voltage convertor of a kind of high-gain of design, traditional current-to-voltage convertor is to constitute with amplifier and a feedback resistance [to consult: Pittet, P.; Lu, G.N.; El Mourabit, A, On-chip transimpedance preamplifier for CMOS BDJ optical detectorusing active enhanced impedance loads 9th International Conferenceon Electronics, Circuits and Systems, 2002], do like this except the complexity of circuit structure, realize high gain, need resistance big especially, this has taken a large amount of silicon area; Also need between speed and stability, trade off, therefore be necessary to design a kind of high-gain current-to-voltage converter of simple structure.

Summary of the invention

The purpose of this invention is to provide a kind of CMOS cascade high-gain current-to-voltage converter, it is simple in structure, gain is high, can solve problems of the prior art.

For achieving the above object, technical solution of the present invention provides a kind of CMOS cascade high-gain current-to-voltage converter, comprise the common-source common-gate current mirror that transistor is formed, the common-source common-gate current mirror that the common-source common-gate current mirror that it is made up of four P-type mos (PMOS) transistor and four N type metal oxide semiconductors (NMOS) transistor are formed docks up and down and forms, ac current signal is from current mirror joint input up and down, by two current mirror mirror images, output voltage equals input current and the product of exporting cascodes resistance.

Described current-to-voltage convertor, it also comprises a current source biasing circuit of being made up of two nmos pass transistors, be in the common-source common-gate current mirror circuit that four NMOS transistors is formed, be connected in series this current source biasing circuit, wherein, the drain and gate of the nmos pass transistor in the current source biasing circuit connects an end of a constant-current source, another termination power of this constant-current source, this grid is electrically connected with two grids that are total to bank tube in the current mirroring circuit again, the drain and gate of another nmos pass transistor is electrically connected the source ground of this another nmos pass transistor with the grid of two common source pipes in the current mirroring circuit; And the substrate terminal ground connection of two nmos pass transistors in the current source biasing circuit;

The ac current signal input, only with common-source common-gate current mirror circuit that four PMOS transistors are formed in two altogether the grids of bank tubes be electrically connected.

Described current-to-voltage convertor, it also comprises a current source biasing circuit of being made up of two PMOS transistors, be in the common-source common-gate current mirror circuit that four PMOS transistors are formed, be connected in series this current source biasing circuit, wherein, the transistorized substrate termination power of two PMOS in the current source biasing circuit, the transistorized source-drain electrode of one PMOS connects power supply, transistorized grid of this PMOS and drain electrode are electrically connected with the grid of two common source pipes in the current mirroring circuit again, another PMOS transistor drain and grid connect an end of a constant-current source, the other end ground connection of this constant-current source, the transistorized grid of this another PMOS are electrically connected with two grids that are total to bank tube in the current mirroring circuit again;

The ac current signal input, only with common-source common-gate current mirror circuit that four NMOS transistors is formed in two altogether the grids of bank tubes be electrically connected.

Described current-to-voltage convertor, it adds a load capacitance at output, can use as current follower, and then the input AC current signal can be shunted between load capacitance and output cascade resistance, thereby on load capacitance, set up voltage, realize the current/voltage conversion.

The high-gain current-to-voltage converter a kind of simple in structure of the present invention's design, the current signal of faint pA magnitude is converted into the voltage of mV magnitude, its core texture is made up of eight transistors, utilize the big characteristics of common-source common-gate current mirror output impedance to realize high-gain, reached simple in structure and characteristics high-gain, owing to there is not feedback resistance, do not need to consider the problem of stability simultaneously.

Description of drawings

Fig. 1 automatic biasing cascade high-gain current-to-voltage converter of the present invention circuit diagram;

Fig. 2 impressed current of the present invention source biasing cascade high-gain current-to-voltage converter (I type) circuit diagram;

Fig. 3 impressed current of the present invention source biasing cascade high-gain current-to-voltage converter (II type) circuit diagram.

Embodiment

Referring to Fig. 1, Fig. 2 and Fig. 3, the present invention contains two kinds of structures: 1, automatic biasing cascade (Cascode) high-gain current-to-voltage converter; 2, impressed current source biasing cascade (Cascode) high-gain current-to-voltage converter.

Automatic biasing cascade (Cascode) high-gain current-to-voltage converter, the common-source common-gate current mirror that the common-source common-gate current mirror of being made up of 4 PMOS transistors and 4 nmos pass transistors are formed docks up and down and forms, the alternating current small-signal is from current mirror joint input up and down, by two current mirror mirror images, output voltage equals input current and the product of exporting cascodes resistance; Impressed current source biasing cascade (Cascode) high-gain current-to-voltage converter, contain two kinds of bias structures, I type and II type, I type are to have increased a current source and two nmos pass transistors provide bias current for following NMOS current mirror on the basis of automatic biasing current-to-voltage convertor; The II type is to have increased a current source and two PMOS transistors provide bias current for top PMOS current mirror on the basis of automatic biasing current-to-voltage convertor.

Be based on the expression formula of striding resistance in small-signal equivalent circuit derivation automatic biasing cascade (Cascode) high-gain current-to-voltage converter of MOS transistor below, see Fig. 1.v ₁, v ₂, v ₃, v ₄Be the node voltage that provides among Fig. 1, v _i, v _oBe respectively input, output node voltage, input small-signal current i _InFlow into by direction shown in Fig. 1, be divided into two i up and down ₁And i ₂, g _MiAnd r _OiRepresent i transistor M respectively _iMutual conductance and because the drain-source resistance that causes of channel length modulation effect.

For the sake of simplicity, ignore M1, M2, M3, the bulk effect of M4.Obtain following formula:

$g_{m3}(v_i-v_1)+\frac{(v_i-v_1)}{r_{o3}}{g}_{m7}{v}_1+\frac{v_1}{r_{o7}}=i_1---\left(1\right)$

$g_{m1}(v_i-v_2)+\frac{(v_i-v_2)}{r_{o1}}{g}_{m5}{v}_2+\frac{v_2}{r_{o5}}=i_2---\left(2\right)$

i ₁+i ₂＝i _in (3)

$g_{m8}{v}_1+\frac{v_3}{r_{o8}}=g_{m4}(v_i-v_3)+\frac{v_o-v_3}{r_{o4}}$

$=-[g_{m2}(v_i-v_4)+\frac{v_o-v_4}{r_{o2}}]=-(g_{m6}{v}_2+\frac{v_4}{r_{o6}})$ (4)

By (1), (2), (3):

$v_o=\frac{\frac{g_{m8}(g_{m3}+\frac{1}{r_{o3}})}{g_{m7}+\frac{1}{r_{o7}}+g_{m3}+\frac{1}{r_{o3}}}+\frac{g_{m6}(g_{m1}+\frac{1}{r_{o1}})}{g_{m5}+\frac{1}{r_{o5}}+g_{m1}+\frac{1}{r_{o1}}}}{\frac{1}{r_{o2}+r_{o6}+g_{m2}{r}_{o2}{r}_{o6}}+\frac{1}{r_{o4}+r_{o8}+g_{m4}{r}_{o4}{r}_{o8}}}{v}_i---\left(6\right)$

Because $g_{m6}\≈g_{m5}+\frac{1}{r_{o5}},g_{m8}\≈g_{m7}+\frac{1}{r_{o7}}$

Can get

$v_o\≈\frac{i}{\frac{1}{r_{o2}+r_{o6}+g_{m2}{r}_{o2}{r}_{o6}}+\frac{1}{r_{o2}+r_{o6}+g_{m2}{r}_{o2}{r}_{o6}}}=-i\left(R_{\mathrm{2,6}\mathrm{cascode}}\right|\left|R_{\mathrm{4,8}\mathrm{cascode}}\right)$

R _2,6cascode‖ R _4,8cascodeExpression is the parallel connection of the output impedance of two common-source common-gate current mirrors up and down.

Impressed current source biasing cascade high-gain current-to-voltage converter is shown in Fig. 2 (I type), Fig. 3 (II type), and its derivation and front of striding resistance is similar, no longer repeats.

Because the input impedance of two kinds of structures among Fig. 2, Fig. 3 is low, and the output impedance height, so can be used as current follower uses, if add a load capacitance at output, then the input AC current signal will be shunted between load capacitance and output cascade resistance, thereby the voltage of setting up on load capacitance is:

$v_o\≈\frac{i_{\mathrm{in}}}{\mathrm{j\ωC}}---\left(8\right)$

Wherein, i _InBe the input AC current signal, j is an imaginary unit, and ω is the input signal angular frequency, and C is a load capacitance.Realized the current/voltage conversion equally.

Claims (4)

1, a kind of complementary metal oxide semiconductor cascade high-gain current-to-voltage convertor, comprise the common-source common-gate current mirror that transistor is formed, it is characterized in that, the common-source common-gate current mirror that common-source common-gate current mirror of being made up of four PMOS transistors and four NMOS transistors are formed docks up and down and forms, ac current signal is from current mirror joint input up and down, by two current mirror mirror images, output voltage equals input current and the product of exporting cascodes resistance.

2, current-to-voltage convertor as claimed in claim 1, it is characterized in that, also comprise a current source biasing circuit of forming by two nmos pass transistors, be in the common-source common-gate current mirror circuit that four NMOS transistors is formed, be connected in series this current source biasing circuit, wherein, the drain and gate of the nmos pass transistor in the current source biasing circuit connects an end of a constant-current source, another termination power of this constant-current source, this grid is electrically connected with two grids that are total to bank tube in the current mirroring circuit again, the drain and gate of another nmos pass transistor is electrically connected the source ground of this another nmos pass transistor with the grid of two common source pipes in the current mirroring circuit; And the substrate terminal ground connection of two nmos pass transistors in the current source biasing circuit;

The ac current signal input, only with common-source common-gate current mirror circuit that four PMOS transistors are formed in two altogether the grids of bank tubes be electrically connected.

3, current-to-voltage convertor as claimed in claim 1, it is characterized in that, also comprise a current source biasing circuit of forming by two PMOS transistors, be in the common-source common-gate current mirror circuit that four PMOS transistors are formed, be connected in series this current source biasing circuit, wherein, the transistorized substrate termination power of two PMOS in the current source biasing circuit, the transistorized source electrode of one PMOS connects power supply, transistorized grid of this PMOS and drain electrode are electrically connected with the grid of two common source pipes in the current mirroring circuit again, another PMOS transistor drain and grid connect an end of a constant-current source, the other end ground connection of this constant-current source, the transistorized grid of this another PMOS are electrically connected with two grids that are total to bank tube in the current mirroring circuit again;

The ac current signal input, only with common-source common-gate current mirror circuit that four NMOS transistors is formed in two altogether the grids of bank tubes be electrically connected.

4, as claim 2 or 3 described current-to-voltage convertors, it is characterized in that, add a load capacitance at output, can use as current follower, then the input AC current signal can be shunted between load capacitance and output cascade resistance, thereby on load capacitance, set up voltage, realize the current/voltage conversion.

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