CN101063781A - TFTLCD array substrates device structure and manufacturing method therefor - Google Patents
TFTLCD array substrates device structure and manufacturing method therefor Download PDFInfo
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- CN101063781A CN101063781A CN 200610078658 CN200610078658A CN101063781A CN 101063781 A CN101063781 A CN 101063781A CN 200610078658 CN200610078658 CN 200610078658 CN 200610078658 A CN200610078658 A CN 200610078658A CN 101063781 A CN101063781 A CN 101063781A
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Abstract
This invention provides one TFT LCD array baseboard parts structure, which comprises transparent baseboard underlay, grating electrode scan line, grating electrode, grating electrode insulation layer, source layer, data scan line, film transistor manager part by cross between scan line and data scan line, light block bar in both sides of transparent pixel electrode parallel with data line, transparent pixel electrode and deactivation layer contacting with film transistor leakage electrode, wherein the invention is characterized by the following: the transparent pixel electrode edge has public electrode parallel to the grating electrode in one structure with light block bar. This invention also discloses one process method for the structure.
Description
Technical field
The invention relates to a kind of Thin Film Transistor-LCD (TFT LCD) array base palte device architecture and manufacture method.Relate in particular to a kind of public electrode structure and manufacture method thereof.
Background technology
In flat panel display, TFT LCD has characteristics low in energy consumption, that manufacturing cost is relatively low and radiationless, has therefore occupied leading position in flat panel display market.TFT LCD device is formed box by array glass substrate and color film glass substrate.As shown in Figure 1, be the non-crystalline silicon tft structural section synoptic diagram and the single pixel exterior view of present main flow.It is the bottom grating structure that adopts the corrosion of back of the body raceway groove.This kind TFT device can lower the photic leakage current in the raceway groove.As shown in Figure 1a, gate electrode protuberance 11 (with the overlapping lug boss of pixel) and transparent pixels electrode form memory capacitance.Remove special public electrode like this, improved aperture ratio of pixels.In the TFT of main flow device,, be parallel to the both sides formation shield bars 12 of data line as shown in Figure 2 in pixel in order further to reduce to the light leak in the pixel behind the box.Shield bars uses and the grid same material, finishes making with in a photoetching (Mask) operation.
5-Mask technology as shown in Figure 3 is the typical process technology of making TFT at present.Its main technique step was divided into for five steps:
Form grid and lead-in wire thereof;
Form grid electrode insulating layer and amorphous silicon semiconductor layer;
Form source-drain electrode and data lead;
Form the passivation protection layer;
Form the transparent pixels electrode.
Each step comprises that all thin-film deposition, exposure and pattern form and corrode three main technique.Aforesaid is a kind of typical 5-Mask technology.By changing Mask design and processes flow process, other 5-Mask technology is arranged also.Because each gate electrode does not couple together, the current potential of the public electrode of each memory capacitance is distinguishing.In traditional TFT LCD device,, often see owing to crosstalk (Cross-Talk), flicker (Flicker) and horizontal white line etc. that electrode signal difference causes are bad.Common solution has the design of the peripheral circuit of improvement and improves mode input signal or the like.
Summary of the invention
The objective of the invention is provides a kind of public electrode structure of matrix load in order to overcome the defective of prior art, by the current potential homogeneity of regulating and controlling public electrode, thus the display quality of raising TFT LCD.Another object of the present invention is to utilize shield bars to improve the area of memory capacitance, thereby increases the signal stabilization of memory capacitance.
To achieve these goals, the invention provides a kind of TFT LCD array base palte device architecture, comprise: the transparency carrier substrate, the gate electrode sweep trace, gate electrode, the grid electrode insulating layer, active layer, the data scanning line is formed at the film transistor device of gate electrode sweep trace and data scanning line intersection, and is parallel with data line and be positioned at the shield bars of transparent pixels electrode both sides, the transparent pixels electrode that contacts with the thin film transistor (TFT) drain electrode, passivation layer is characterized in that: there is the public electrode parallel with the gate electrode sweep trace transparent pixels electrode edge below.
Wherein, described public electrode, shield bars, gate electrode sweep trace are the material same section that forms with a photoetching.Described public electrode and shield bars are the one connected structure.Described public electrode, shield bars and transparent pixels electrode exist part to overlap, and constitute memory capacitance with pixel electrode together.Link to each other by lead-in wire between the shield bars of described public electrode and neighbor, and this lead-in wire employing is the transparent conductive material identical with the transparent pixels electrode.Described gate electrode sweep trace is constituted by aluminium, chromium, tungsten, tantalum, titanium, molybdenum, aluminium nickel metal or alloy.Described transparent pixels electrode is made up of tin indium oxide, indium zinc oxide or aluminum zinc oxide material.
To achieve these goals, the invention provides also provides a kind of TFT LCD array base palte device making method simultaneously, it is characterized in that, comprises the steps:
Wherein, described step 1 depositing metal film is specially the combination of aluminium, chromium, tungsten, tantalum, titanium, molybdenum, aluminium nickel metal or alloy.The deposit pixel electrode layer is specially tin indium oxide, indium zinc oxide or aluminum zinc oxide in the described step 5.
The present invention is with respect to being traditional TFT LCD device, connects electric current and current potential between each public electrode of matrix load active balance that forms by the pixel electrode lead-in wire.Compared with former TFT pixel, the input end of common electrode signal increases, and reduces diverse location place signal difference and keeps balanced more signal distributions.The common signal line of matrix load improves leaping voltage (Kick-BackVoltage Δ Vp), can lower effectively like this because the product fraction defective that flicker and white line etc. cause.Simultaneously, form memory capacitance with the transparent pixels electrode together, increased the area of memory capacitance on the one hand with public, shield bars, on the other hand, since stable with the public electrode charging voltage, leaping voltage is diminished, improved flicker and image retention.
Below in conjunction with the drawings and specific embodiments the present invention is further described in detail.
Description of drawings
Fig. 1 a is prior art TFT LCD single pixel vertical view on array base palte;
Fig. 1 b is an A-A partial cross sectional view among Fig. 5;
Fig. 2 has the single pixel vertical view of TFT LCD of shield bars for prior art;
Fig. 3 is a kind of typical 5Mask process flow diagram of the prior art;
Fig. 4 is the single pixel vertical view of TFT LCD device of the present invention;
Fig. 5 A is an A-A partial cross sectional view among Fig. 5;
Fig. 5 B is a B-B partial cross sectional view among Fig. 5;
Fig. 5 C is a C-C partial cross sectional view among Fig. 5;
Fig. 6 A is the public electrode current diagram of prior art;
Fig. 6 B is a matrix load public electrode current diagram of the present invention;
Fig. 7 A is the pixel vertical view of TFT LCD device of the present invention after the ground floor gate electrode is finished;
Fig. 7 B is a B-B partial cross sectional view among Fig. 7;
Fig. 8 is the pixel vertical view of TFT LCD device of the present invention after the 4th layer of passivation layer finished;
Fig. 9 A is an A-A partial cross sectional view among Fig. 8;
Fig. 9 B is a B-B partial cross sectional view among Fig. 8;
Fig. 9 C is a C-C partial cross sectional view among Fig. 8.
Identify among the figure: 1, gate electrode sweep trace; 2, gate electrode; 3, active layer; 4, grid electrode insulating layer; 5, data scanning line; 6, source electrode; 7, drain electrode; 8, passivation layer; 9, passivation layer via hole; 10, transparent pixels electrode; 11, grid protuberance; 12, shield bars; 13, public electrode; 14, the passivation layer via hole of public electrode; 15, transparent pixels lead-in wire.
Embodiment
Below in conjunction with description of drawings and first-selected specific embodiment, the present invention is further elaborated:
Shown in Figure 4 and 5 a, 5b, 5c, one group of gate electrode sweep trace 1 and parallel with it public electrode lead-in wire 13 are arranged on the array base palte of this TFT LCD, and one group of vertical with it data scanning line 5.Adjacent gate electrode sweep trace and data scanning line have defined pixel region.Each pixel packets contains a TFT switching device, transparent pixels electrode 10, twice shield bars 12 and part public electrode 13.Shown in Fig. 5 A, the TFT device is made up of gate electrode 2, grid electrode insulating layer 4, semiconductor active layer 3 and source electrode 6 and drain electrode 7.Transparent pixels electrode 10 is connected with the drain electrode 7 of TFT by the via hole 9 of passivation layer.Identical with top with a kind of traditional TFT dot structure.TFT LCD dot structure characteristics of the present invention are, at first public electrode 13 and shield bars 12 are coupled together (as shown in Figure 4); Secondly shown in Fig. 5 A and 5B, the public electrode of pixel up and down is connected by the passivation layer via hole 14 of public electrode, passivation layer via hole and transparent pixels lead-in wire 15 on the shield bars 12.Transparent pixels lead-in wire 15 is realized in same mask technological process with transparent pixels electrode 10.Passivation layer is after finishing the data line pattern, carries out plated film and photoetching process before the transparent pixels electrodeposition.In addition, transparent pixels electrode 10 exists part to overlap with shield bars 12 and public electrode 13, and forms memory capacitance together.
Above-mentioned pixel is a kind of typical structure of the present invention, and it can carry out various forms of accommodations, as shield bars being arranged on the periphery of whole transparent pixels electrode, comprises its top; Or the shield bars on the left side is not connected with public electrode, connect and the shield bars on the right is connected with public electrode or changes the connection between the public electrode into metal; Or the figure of variation design etc.Perhaps be connected forming matrix between the public electrode so long as utilize public electrode and pixel electrode to form store electricity, meet the scope of the invention by lead-in wire.
The TFT LCD of said structure can be by following method manufacturing:
At first, use magnetically controlled sputter method, preparation one layer thickness exists on glass substrate
Extremely
The grid metallic film.The grid metal material uses the combination of metal or alloy such as molybdenum, aluminium, alumel, molybdenum and tungsten alloy, chromium or copper usually, also can use the combination of above-mentioned different materials film, is molybdenum and alumel double-layer films structure specific to present embodiment.Shown in Fig. 7 A, by exposure technology and chemical etching technology, on certain zone of glass substrate, form the pattern of gate electrode sweep trace 1 and gate electrode 2 and public electrode 13 and shield bars 12 with the gate mask version.Shown in Fig. 7 B, gate electrode 2, public electrode 13 and shield bars 12 have the angle of gradient after identical thickness and the corrosion.
Second goes on foot, and utilizes method consecutive deposition on array base palte of chemical vapor deposition
Arrive
Grid electrode insulating layer 4 film and
Arrive
Active layer 3 films.Grid electrode insulating layer 4 material are silicon nitride normally, also can use monox or silicon oxynitride etc., is silicon nitride specific to present embodiment.The active layer membraneous material is generally amorphous silicon.With the mask of active layer 3 back of exposing amorphous silicon is carried out etching, form silicon island 3.And the insulation course between grid metal and the amorphous silicon plays the effect that stops etching.
The 3rd step, adopt and the grid metal species like the preparation method, the thickness that deposit one deck is similar to the grid metal on array base palte exists
Arrive
Metallic film.As shown in Figure 8, the mask by source-drain electrode forms data scanning line 5 and source electrode 6, drain electrode 7 in certain zone.Shown in Fig. 9 A, source electrode 5 and drain electrode 6 contact with the two ends of active layer 3 respectively.
The 4th step, with and prepare the similar method of grid electrode insulating layer 4 and active layer 3, deposit one layer thickness exists on whole array base palte
Arrive
Passivation layer 8.Its material is silicon nitride normally.Shown in Fig. 9 a, 9b and 9c, this moment public electrode 13, shield bars 12 and cover the grid electrode insulating layer 4 and the passivation layer 8 of same thickness above the gate electrode sweep trace 1.By the mask of passivation layer, utilize exposure and etching technics to form drain electrode passivation layer via hole 9 and the passivation layer via hole of shield bars part and the passivation layer via hole 14 of public electrode partly, shown in Fig. 4, Fig. 5 a, Fig. 5 b, 5c.
At last, exist by CVD (Chemical Vapor Deposition) method deposition thickness on array base palte
Extremely
Between ito thin film.Use the mask of transparent pixels electrode,, form transparent pixels electrode 10 and transparent pixels lead-in wire 15 by above-mentioned identical processing step.And vertical electrical connections of realizing between the public electrodes of the passivation layer via hole of passivation layer via hole 14 by public electrode and shield bars and transparent pixels lead-in wire 15.
The above embodiment that proposes is a kind of implementation method, and other implementation method also can be arranged, and finishes by selecting different materials or combination of materials, as the lead-in wire of the connection between the public electrode is changed to metal lead wire.On the array base palte of public electrode with matrix load and shield bars, the TFT device architecture obviously can have various modifications and variations.And these modifications and variations are also within the scope of the present invention involved.
The TFT LCD array base palte device that adopts said structure and process to make, owing to form memory capacitance with public electrode, light barrier and transparent pixels electrode, improved the area of memory capacitance on the one hand, memory capacitance is charged with public electrode on the other hand, voltage is stable, leaping voltage is diminished, improved flicker and image retention.In addition, connect electric current and current potential between each public electrode of active balance owing to form matrix between the public electrode.Compared with former TFT pixel, shown in Fig. 6 A and Fig. 6 B, the input end of common electrode signal increases, and reduces diverse location place signal difference and keeps balanced more signal distributions.The common signal line of this matrix load improves leaping voltage (Kick-Back Voltage Δ Vp), so also can lower effectively because the product fraction defective that flicker and white line etc. cause.Simultaneously this public electrode structure also can reduce signal lag and cause bad.
It should be noted that at last, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art should can use different materials and equipment to realize it as required, promptly can make amendment or be equal to replacement, and not break away from the spirit and scope of technical solution of the present invention technical scheme of the present invention.
Claims (11)
1, a kind of TFT LCD array base palte device architecture, comprise: the transparency carrier substrate, the gate electrode sweep trace, gate electrode, the grid electrode insulating layer, active layer, the data scanning line, be formed at the film transistor device of gate electrode sweep trace and data scanning line intersection, parallel with data line and be positioned at the shield bars of transparent pixels electrode both sides, the transparent pixels electrode that contacts with the thin film transistor (TFT) drain electrode, passivation layer, it is characterized in that: there is the public electrode parallel with the gate electrode sweep trace transparent pixels electrode edge below.
2, a kind of TFT LCD array base palte device architecture according to claim 1 is characterized in that: described public electrode, shield bars, gate electrode sweep trace and the gate electrode material same section for forming with a photoetching.
3, a kind of TFT LCD array base palte device architecture according to claim 2, it is characterized in that: described public electrode and shield bars are the one connected structure.
4, a kind of TFT LCD array base palte device architecture according to claim 3 is characterized in that: described public electrode, shield bars and transparent pixels electrode exist part to overlap, and constitute memory capacitance with pixel electrode together.
5, a kind of TFT LCD array base palte device architecture according to claim 4 is characterized in that: link to each other by lead-in wire between the shield bars of described public electrode and neighbor.
6, a kind of TFT LCD array base palte device architecture according to claim 5 is characterized in that: what described lead-in wire adopted is the transparent conductive material identical with the transparent pixels electrode.
7, according to the arbitrary described a kind of TFT LCD array base palte device architecture of claim 1 to 6, it is characterized in that: described gate electrode sweep trace is constituted by aluminium, chromium, tungsten, tantalum, titanium, molybdenum, aluminium nickel metal or alloy.
8, according to the arbitrary described a kind of TFT LCD array base palte device architecture of claim 1 to 6, it is characterized in that: described transparent pixels electrode is made up of tin indium oxide, indium zinc oxide or aluminum zinc oxide material.
9, a kind of TFT LCD array base palte device making method is characterized in that, comprises the steps:
Step 1 is used magnetically controlled sputter method, and deposit one deck, two-layer or multiple layer metal film on substrate by mask, exposure and etch process, form gate electrode sweep trace, gate electrode, public electrode and shield bars on certain zone of glass substrate;
Step 2, the method for utilizing chemical vapor deposition are on the substrate of completing steps one, and consecutive deposition grid electrode insulating layer film, amorphous silicon membrane by mask, exposure and etch process, form the silicon island;
Step 3 uses magnetically controlled sputter method on the substrate of completing steps two, and the depositing metal film by mask, exposure and etch process, forms data scanning line and source electrode, drain electrode;
Step 4, the method for utilizing chemical vapor deposition are on the substrate of completing steps three, and deposit one deck passivation layer by mask, exposure and etch process, forms the passivation layer via hole of drain electrode part and the passivation layer via hole of shield bars part simultaneously;
Step 5, the method for utilizing chemical vapor deposition are on the completing steps tetrabasal, and deposit layer of transparent pixel electrode layer by mask, exposure and etch process, forms the transparent pixels electrode, the transparent pixels lead-in wire.
10, a kind of TFT LCD array base palte device making method according to claim 9, it is characterized in that: described step 1 depositing metal film is specially the combination of aluminium, chromium, tungsten, tantalum, titanium, molybdenum, aluminium nickel metal or alloy.
11, a kind of TFT LCD array base palte device making method according to claim 9, it is characterized in that: the deposit pixel electrode layer is specially tin indium oxide, indium zinc oxide or aluminum zinc oxide in the described step 5.
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