CN101051794A - Controller of converter and its driving method - Google Patents

Controller of converter and its driving method Download PDF

Info

Publication number
CN101051794A
CN101051794A CN 200610073776 CN200610073776A CN101051794A CN 101051794 A CN101051794 A CN 101051794A CN 200610073776 CN200610073776 CN 200610073776 CN 200610073776 A CN200610073776 A CN 200610073776A CN 101051794 A CN101051794 A CN 101051794A
Authority
CN
China
Prior art keywords
power tube
circuit
drive circuit
gate drive
delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN 200610073776
Other languages
Chinese (zh)
Other versions
CN100566108C (en
Inventor
顾锦筛
陈延钧
刘遂明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vertiv Corp
Original Assignee
Liebert Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Liebert Corp filed Critical Liebert Corp
Priority to CNB2006100737761A priority Critical patent/CN100566108C/en
Publication of CN101051794A publication Critical patent/CN101051794A/en
Application granted granted Critical
Publication of CN100566108C publication Critical patent/CN100566108C/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Inverter Devices (AREA)

Abstract

The control device includes control circuit, time delay circuit, and drive circuit of gate electrode of power tube, as well as includes a protective circuit. Being connected to previous stage of the time delay circuit, the protective circuit is in use for locking out control signal of previous stage of the time delay circuit. The driving method includes following procedures and arrangements: it is complemental modulation of control logic between first outer power tube and third inner side power tube, and dead zone is left; it is complemental modulation of control logic between second inner power tube and fourth outer side power tube, and dead zone is left; second and third inner side power tubes turn on before first and fourth outer side power tubes turn on; turn off after first and fourth outer side power tubes off. The invention simplifies control logic for driving gate electrode.

Description

A kind of control device of converter and driving method
[technical field]
The present invention relates to the control technology field of converter, relate in particular to a kind of control device and driving method of converter.
[background technology]
Multi-level converter normally adopts the device series connection and in conjunction with suitable control strategy, effectively reduces the voltage withstand class of device, reduces output voltage or current harmonics composition, saves the cost of filter.In view of its particular performances advantage, multi-level converter was born so far before and after the eighties, had obtained application more and more widely in a plurality of fields such as medium voltage frequency converter, UPS, straight converting power sources.
As everyone knows, many devices series system, the control logic relative complex, and its key issue is all pressures problem of series connection device.Solution commonly used at present mainly contains diode neutral point clamp (NPC) method, striding capacitance clamp method etc., especially with diode neutral point clamp method multi-electrical level inverter being most widely used in UPS, frequency converter.
As shown in Figure 1, be the main circuit diagram of the single-phase three-level inverter of diode neutral point clamp type.In circuit, in order effectively to realize the device Pressure and Control, no matter adopt which kind of control logic, should guarantee that all inboard power tube (S2 and S3 among Fig. 1) is open-minded prior to outside power tube (S1 and S4 among Fig. 1), then turn-off in outside power tube.Simultaneously, cause the busbar short-circuit problem, must set rational Dead Time between S1 and the S3 signal, also must set rational Dead Time between S2 and the S4 signal in order to prevent same brachium pontis from the conducting simultaneously of three power tubes occurring.
In public technology, a kind of driving and protection scheme that Fig. 2 and Fig. 3 generally adopt for three-level inverter, wherein, Fig. 2 is a three-level inverter Drive and Control Circuit block diagram, Fig. 3 is the drive signal schematic diagram of three-level inverter power tube.Dead band between S1 and the S3 signal as shown in Figure 3.This scheme typically is characterised in that:
1, the active position of protective circuit is placed on after the delay driving circuit group;
2, the delay driving circuit group realizes S1 and the complementation of S3 signal, S2 and the complementation of S4 signal, and when S1 and S3 high frequency modulated, S2 keeps normal open, and S4 keeps normal off; When S2 and S4 high frequency modulated, S3 keeps normal open, and S1 keeps normal off;
3, power tube gate-drive parameter is corresponding consistent.
This drive scheme can reduce the switching loss of power tube, but can not thoroughly overcome the inequality pressure problem of brachium pontis device, and its reason is as follows:
Because protective circuit signal active position is in the back level of delay driving circuit group; for diode neutral point clamp type three-level inverter; in case the effect of guard signal betides S1 constantly and S2 (or S3 and S4) is the stage (as the A among 4 figure or the B moment) of conducting; and S1 to S4 device parameters can not be in full accord in actual applications; thereby devices switch speed also can not be in full accord; and the delay protection logic is inoperative again; then the phenomenon prior to S2 opens or turn-off in S2 the back can appear in S1; destroyed the condition of " S2 opens then prior to S1 and turn-offs in S1 "; thereby make that the voltage stress that bears between S1 and the S2 (or S3 and S4) is seriously unbalanced; wherein; the voltage stress that inboard power tube bears is far longer than monolateral busbar voltage (E/2); even bear total busbar voltage (E), lost the advantage of three-level converter.
The voltage stress that inboard power tube bears is that the mechanism of total busbar voltage (E) is as follows: with circuit shown in Figure 1 is example; when circuit protection; drive signal is blocked; four device S1 on the main circuit brachium pontis; S2; S3; the gate pole control signal of S4 can be closed simultaneously; this moment S1; S2; S3; S4 all is compelled to turn-off; but because the parameter of these devices can not be in full accord; their turn off process also can not be fully synchronously; shutoff earlier of certain device or back always occurring turn-offs; if the device that turn-offs is S2 earlier; and flow through the sense of current of inductance L f this moment is from left to right; this inductive current must be from D3 so; the D4 afterflow; make the current potential at brachium pontis mid point B place be-E/2 (current potential of supposition bus mid point N is 0V); and still conducting of S1 this moment; the current potential that is to say the collector electrode A place of S2 is E/2; therefore; the off state voltage that S2 bears is exactly E; and other devices S1; S3; the off state voltage that S4 bears is 0 volt, thereby voltage stress (that is: off state voltage) seriously unbalance (that is: imbalance) occurs.
Except block in drive signal can occur under the protection situation in outside the unbalance problem of device voltage stress; the output voltage zero crossing can get muddled because of operating modes such as shock loads; drive control signal S1 and S2 (or S3 and S4) synchro switch also may occur and cause power device voltage stress unbalance; this be because: when output loading changes suddenly; during output voltage sudden change (being above-mentioned disorder); make adjuster saturated; can make S1; S2; S3; S4 all is subjected to the drive signal control of high frequency; and be not the high frequency complementation between the drive signal of S1 and S4; and do not exist intrinsic Dead Time to set between the two yet; the drive waveforms that obtains like this is actually S1 and S2 synchro switch; S3 and S4 synchro switch; the complementary work of S1 and S3 (dead band is arranged); the complementary work of S2 and S4 (dead band is arranged); destroy the control logic of " inboard device of any moment is opened then prior to outside device and turn-offed in outside device ", thereby caused power device voltage stress unbalance.
As shown in Figure 5, be the uneven corrugating figure of the brachium pontis device in the inverter, this oscillogram is tested by oscilloscope, oscilloscope has four drive test amount passages, the Far Left of waveform is along seeing 1,2,3,4 four numeral, the position of these four numerals is represented the reference zero of four drive test amount signals, abscissa express time, 500uS/ lattice respectively.In the ordinate, CH1 ~ CH3 represents voltage swing, and ratio is the 200V/ lattice; CH4 represents size of current, and ratio is the 500A/ lattice.Corresponding relation is: CH1 is the voltage stress that S3 bears, and CH2 is the voltage stress that S2 bears, and CH3 is inverter output voltage Ucf, and CH4 is the current waveform that flows through inversion inductance L f.This waveform is that abscissa is done waveform behind local the amplification.
In order to overcome above-mentioned uneven problem of pressing, some resolution policies are disclosed in the prior art: as shown in Figure 6, increase auxiliary switch S5 and S6 (specifically referring to patent: US6535406), not only need additionally to increase the two-way drive signal, and the logical process of these signals is also relatively complicated, control logic occurs between inboard device S2 and S3 and neutral point clamp device S5 and the S6, and depend on S5 and S6 realizes, in addition, on device is chosen, the specification of S5 and S6 is the same with S4 with S1, and being equivalent to cost has increased about 50%; Or (specifically referring to patent: US6838925), these schemes are not only complicated, and increased cost to adopt complicated control logic circuit.
[summary of the invention]
The technical problem to be solved in the present invention provides diode neutral point clamp type multi-level converter and control circuit thereof, has simplified the gate-drive control logic of power device, has reduced the cost of converter circuit.
The present invention realizes by following technical scheme:
A kind of control device of converter comprises:
Control circuit is used to produce control signal;
Delay circuit is used for described control signal is carried out delay process, and exports to power tube drive circuit;
The power tube gate drive circuit is used to produce the drive signal of outside power tube in each, controls the turn-on and turn-off of outside power tube in each;
Also comprise a protective circuit, described protective circuit is connected on the prime of described delay circuit, is used to block the control signal of delay circuit prime.
Improvement of the present invention is:
Described delay circuit comprises first delay circuit and second delay circuit, described first delay circuit is used for the rising edge time-delay Td1 to outside power tube drive signal, described second delay circuit is used for the rising edge of inboard power tube drive signal and the trailing edge Td2 that all delays time, and time-delay Td1 is greater than time-delay Td2.
A kind of control device of converter comprises:
Control circuit is used to produce control signal;
Delay circuit is used for described control signal is carried out delay process, and exports to power tube drive circuit;
Protective circuit is used to block the front/rear level of described delay circuit drive signal;
The power tube gate drive circuit is used to produce the drive signal of outside power tube in each, controls the turn-on and turn-off of outside power tube in each; Make the speed of opening of described inboard power tube all the time faster than described outside power tube; The turn-off speed of described inboard power tube is slower than described outside power tube all the time.
Improvement of the present invention is:
Described power tube gate drive circuit (5) comprises inboard power tube gate drive circuit and outside power tube gate drive circuit;
Described outside power tube gate drive circuit comprises the 11 resistance, the 21 resistance, the 11 diode, and an end of described the 11 resistance is as the input of outside power tube gate drive circuit, the gate pole of its another termination outside power tube; The negative electrode of input termination the 11 diode of described outside power tube gate drive circuit, the 21 resistance connect the gate pole of outside power tube, and the other end of the 21 resistance links to each other with the anode of the 11 diode;
Described inboard power tube gate drive circuit comprises the 12 resistance, the 22 resistance, the 12 diode, and an end of described the 12 resistance is as the input of inboard power tube gate drive circuit, the gate pole of the inboard power tube of its another termination; The anode of input termination the 12 diode of described inboard power tube gate drive circuit, the 22 resistance connects the gate pole of inboard power tube, and the other end of the 22 resistance links to each other with the negative electrode of the 12 diode.
Improvement of the present invention is: described power tube gate drive circuit comprises first and second resistance, one end of described first resistance is opened the input of signal as power tube, the gate pole of its another termination power tube, one end of described second resistance is as the input of power tube cut-off signals, the gate pole of its another termination power tube.
Improvement of the present invention is: the resistance value of the resistance value of first resistance of described power tube gate drive circuit during as inboard power tube gate drive circuit corresponding resistance during as outside power tube gate drive circuit less than it; The resistance value of the resistance value of second resistance of described power tube gate drive circuit during corresponding resistance during as outside power tube gate drive circuit greater than it as inboard power tube gate drive circuit.
A kind of driving method of converter, control device comprises: control circuit, delay circuit, protective circuit and power tube gate drive circuit, described control device is exported four tunnel control signals, controls first outside power tube, the second inboard power tube, the 3rd inboard power tube and side power tube all round respectively; Comprise the steps:
The control logic of described power tube is, the control logic complementary modulation of first outside power tube and the 3rd inboard power tube, and leave the dead band; The second inboard power tube and is side power tube complementary modulation all round, and leaves the dead band; The second inboard power tube is opened then in first outside power tube prior to first outside power tube and is turn-offed, the 3rd inboard power tube prior to all round the side power tube open then in all round the side power tube turn-off.
Improvement of the present invention is: described delay circuit comprises first delay circuit and second delay circuit;
Described first delay circuit is controlled first outside power tube and the rising edge time-delay Td1 of side power tube gate electrode drive signals all round, and the drive signal after the delay process is controlled first outside power tube and the side power tube all round respectively;
Described second delay circuit is controlled the rising edge and the trailing edge time-delay Td2 of the second inboard power tube and the 3rd inboard power tube gate electrode drive signals, and the drive signal after the delay process is controlled the second inboard power tube and the 3rd inboard power tube respectively;
Control time-delay Td1 is greater than time-delay Td2.
Improvement of the present invention is: when described protective circuit was worked, protective circuit was directly blocked the drive signal of described delay circuit prime.
Improvement of the present invention is: described power tube gate drive circuit comprises inboard power tube gate drive circuit and outside power tube gate drive circuit, and the speed of opening of described inboard power tube gate drive circuit is faster than described outside power tube gate drive circuit; The turn-off speed of described inboard power tube gate drive circuit is slower than described outside power tube gate drive circuit.
Owing to adopted above technical scheme, protective circuit among the present invention is connected on the prime of drive signal delay circuit, avoids destroying because of the protective circuit action driving logical problem of " inboard device S2 and S3 open then in the shutoff of outside device prior to outside device S1 and S4 respectively "; The present invention adopts comparatively simple control method that power device is controlled, avoid adopting complicated control logic, making inboard power tube always open and be later than outside power tube prior to outside power tube turn-offs, avoid blocking and switching logic problem that specific factor such as device dispersiveness causes, make main circuit work safer, more reliable because of drive signal is unusual; Simultaneously, do not need to increase power device in the circuit yet, reduced the cost of circuit.
[description of drawings]
Fig. 1 is the main circuit diagram of the single-phase three-level inverter of diode neutral point clamp type.
Fig. 2 is that three-level inverter drives and the protective circuit block diagram in the prior art.
Fig. 3 is the drive controlling logical schematic of power tube in the circuit block diagram shown in Figure 2.
Fig. 4 is a guard signal effect moment schematic diagram in the circuit block diagram shown in Figure 2.
Fig. 5 is the uneven corrugating figure of the brachium pontis device in the inverter.
Fig. 6 is the main circuit diagram of the three-level inverter of band auxiliary switch.
Fig. 7 is the block diagram of a kind of control device for inverter of the present invention.
Fig. 8 is the brachium pontis power tube switching logic figure of the embodiment of the invention one.
Fig. 9 is the part block diagram of the control device for inverter of the embodiment of the invention one.
Figure 10 (a) and Figure 10 (b) are respectively the outside and the inboard power tube gate drive circuit schematic diagrams of the embodiment of the invention two.
Figure 11 is the brachium pontis power tube switching logic figure of the embodiment of the invention two and embodiment three.
Figure 12 is the brachium pontis power tube gate drive circuit schematic diagram of the embodiment of the invention three.
[embodiment]
Below in conjunction with drawings and Examples the present invention is further set forth:
The block diagram of a kind of control device for inverter of the present invention as shown in Figure 7; be with circuit block diagram (referring to Fig. 2) difference of available technology adopting: 1) position of protective circuit is different; protective circuit of the present invention is connected on the prime of delay circuit, and the protective circuit among Fig. 2 is in the back level of delay circuit.2) delay circuit method difference, delay circuit of the present invention are divided into delay circuit 1 and delay circuit 2, respectively outside power tube drive signal and inboard power tube drive signal are carried out delay process, and that the delay circuit among Fig. 2 has only is a kind of.3) gate drive circuit is different, and gate drive circuit of the present invention is divided into the gate drive circuit of inboard power tube and the gate drive circuit of outside power tube, and the power tube gate drive circuit among Fig. 2 has only a kind of.
In Fig. 7, pwm circuit (being control circuit) produces control signal, and delay circuit is delayed time to this control signal, produces the drive signal of each power tube, and this drive signal is through power tube gate drive circuit driving power pipe, and the control change device is worked; When protective circuit is worked; guard signal directly blocks described control signal (without the control signal of the signal delay circuit of overdriving), and the benefit of doing like this is to avoid destroying because of the protective circuit action driving logical problem of " inboard device S2 and S3 open then in the shutoff of outside device prior to outside device S1 and S4 respectively ".
Embodiment one
Among the present invention, after control signal PWM1, PWM1, PWM2 and PWM2 delay time through delay circuit, corresponding generation drive signal switching logic as shown in Figure 8.That is: S1 and S3 complementary modulation, and leave the dead band; S2 and S4 complementary modulation, and leave the dead band; S2 opens then prior to S1 and turn-offs in S1, and S3 opens then prior to S4 and turn-offs in S4.
In addition, the parameter of power tube gate drive circuit can be set to inconsistent, as long as the speed of opening that guarantees S2 is faster than S1, and turn-off speed is slower than S1, and the speed of opening of S3 is faster than S4, and turn-off speed is slower than S4, just can realize purpose of the present invention.
In the present embodiment, the part block diagram of control device for inverter is referring to Fig. 9.Realize switching logic shown in Figure 8 by circuit block diagram shown in Figure 9, guarantee that inboard power tube is always opened afterwards earlier than outside power tube to close.
Among Fig. 9, control circuit 2 can produce four control signals and be respectively PWM1, PWM2, PWM1 and PWM2, to the rising edge time-delay Td1 of control signal PWM1 and PWM2, the control signal after the time-delay is used to control the turn-on and turn-off of outside power tube to first delay circuit in the delay circuit 3 (31 among the figure and 34) respectively; To the rising edge of PWM2 and PWM1 and the trailing edge Td2 that all delays time, the control signal after the time-delay is used to control the turn-on and turn-off of inboard power tube to second delay circuit (32 among the figure and 35,33 and 36) respectively; Here must guarantee that time-delay Td1 is greater than Td2; Wherein, 31,32,33,34 all is the rising edge delay circuit, and 35,36 then all is the trailing edge delay circuit.
In protective circuit 4; Protect is a guard signal; it controls a K switch 1; and realize the blockade and the defencive function of drive signal in conjunction with DP1~DP4; when the guard signal effect, when K switch 1 was connected, control signal PWM1, PWM2, PWM1 and PWM2 were respectively by DP1~DP4; flow to earth terminal through K switch 1, thereby reach the purpose that the control signal of control circuit 2 is blocked.
The block diagram of the another kind of control device for inverter of the present invention; can in the block diagram of above-mentioned control device for inverter, be out of shape; the position of protective circuit 4 can be placed on the front/rear level of delay circuit; and by change power tube gate drive circuit 5 (change the scheme of drive circuitry parameter, protective circuit the forward and backward level of delay circuit can) realize purpose of the present invention.
Embodiment two
As Figure 10 (a) and Figure 10 (b) is respectively the drive circuit schematic diagram of the outside and inboard power tube in the present embodiment, wherein, outside power tube gate drive circuit comprises the 11 resistance R g11, the 21 resistance R g21, the 11 diode Dg11, the end of described the 11 resistance R g11 is as the input of outside power tube gate drive circuit, the gate pole of its another termination outside power tube; The negative electrode of input termination the 11 diode Dg11 of described outside power tube gate drive circuit, the 21 resistance R g21 connect the gate pole of outside power tube, and the other end of the 21 resistance R g21 links to each other with the anode of the 11 diode Dg11; Inboard power tube gate drive circuit comprises the 12 resistance R g12, the 22 resistance R g22, the 12 diode Dg12, the end of described the 12 resistance R g12 is as the input of inboard power tube gate drive circuit, the gate pole of the inboard power tube of its another termination; The anode of input termination the 12 diode Dg12 of described inboard power tube gate drive circuit, the 22 resistance R g22 connects the gate pole of inboard power tube, and the other end of the 22 resistance R g22 links to each other with the negative electrode of the 12 diode Dg12.
In Figure 10 (a), when the S1_Drv saltus step is high level, the 11 not conducting of diode Dg11, then S1_Drv is added on the gate pole of outside power tube by the 11 resistance R g11; When the S1_Drv saltus step is low level, the 11 diode Dg11 conducting, then S1_Drv is added on the gate pole of outside power tube by the parallel branch of the 11 resistance R g11 and the 21 resistance R g21; And in Figure 10 (b), when the S2_Drv saltus step is low level, the 12 not conducting of diode Dg12, then S2_Drv is added on the gate pole of inboard power tube by the 12 resistance R g12; When the S2_Drv saltus step is high level, the 12 diode Dg12 conducting, then S2_Drv is added on the gate pole of outside power tube by the parallel branch of the 12 resistance R g12 and the 22 resistance R g22; Select suitable driving parameters (resistance value), the driving voltage rate of climb that can realize Figure 10 (a) is slower than Figure 10's (b), the driving voltage decrease speed of Figure 10 (a) is faster than Figure 10's (b), thereby having guaranteed whenever inboard power tube is opened afterwards earlier than outside power tube turn-offs.
Utilize these two circuit shown in Figure 10 (a), 10 (b) can realize as shown in figure 11 drive signal control logic.S1 ' and S2 ' signal are respectively the control signals on S1 and two device gate poles of S2 among Figure 11, correspond to A point and the B point signal of Figure 10 a and Figure 10 b; And S1 among Figure 11 and S2 signal are respectively (because the condition of opening of device is that drive level must be greater than certain threshold values through the actual waveform that turns on and off after device S1 and the S2 shaping, turn-off criterion is that drive level is less than certain threshold values), this embodiment utilizes the rising of drive level and the difference characteristic of descending slope to realize the driving logic of " inboard device S2 and S3 open then in the shutoff of outside device prior to outside device S1 and S4 respectively ".
Embodiment three
Power tube drive circuit as shown in figure 12 can realize that also inboard power tube opens soon, turn-offs slowly than outside power tube, and its drive signal control logic adopts control logic as shown in figure 11.Among Figure 12, power tube gate drive circuit 5 comprises first and second resistance (Rg1, Rg2), the end of the described first resistance R g1 is opened the input of signal as power tube, the gate pole of its another termination power tube, the end of the described second resistance R g2 is as the input of power tube cut-off signals, the gate pole of its another termination power tube; S_Drv_on represents to drive the signal of opening, S_Drv_off represents to drive the signal of shutoff, it is different with the loop that drives cut-off signals that the loop of signal is opened in driving, thereby can be by opening resistance and the different speed that turn on and off that change S1~S4 respectively of closing resistance break, this embodiment is the same with embodiment two in essence.
In the middle of present embodiment, when power tube gate drive circuit 5 during as inboard power tube gate drive circuit, the first resistance R g1 must be less than it as the corresponding resistance in the power tube gate drive circuit of the outside, and the second resistance R g2 must be greater than the corresponding resistance in the power tube drive circuit of the outside.
In sum, the present invention no matter in steady operation or transient changing, can guarantee that single power tube bears half busbar voltage in actual applications, has successfully solved the problem that single power tube in many level topology bears busbar voltage; Especially when high frequency, half high frequency modulated, has very big advantage.
Above embodiment is mainly used in single-phase three-level inverter, and for three-phase tri-level inverter, single-phase multi-electrical level inverter, device such as three-phase multi-electrical level inverter is same to be suitable for, and repeats no more herein.

Claims (10)

1, a kind of control device of converter comprises:
Control circuit (2) is used to produce control signal;
Delay circuit (3) is used for described control signal is carried out delay process, and exports to power tube drive circuit (5);
Power tube gate drive circuit (5) is used to produce the drive signal of outside power tube in each, controls the turn-on and turn-off of outside power tube in each;
It is characterized in that: also comprise a protective circuit (4), described protective circuit (4) is connected on the prime of described delay circuit (3), is used to block the control signal of delay circuit (3) prime.
2, the control device of a kind of converter according to claim 1 is characterized in that:
Described delay circuit (3) comprises first delay circuit and second delay circuit, described first delay circuit is used for the rising edge time-delay Td1 to outside power tube drive signal, described second delay circuit is used for the rising edge of inboard power tube drive signal and the trailing edge Td2 that all delays time, and time-delay Td1 is greater than time-delay Td2.
3, a kind of control device of converter comprises:
Control circuit (2) is used to produce control signal;
Delay circuit (3) is used for described control signal is carried out delay process, and exports to power tube drive circuit (5);
Protective circuit (4) is used to block the front/rear level of described delay circuit (3) drive signal;
It is characterized in that: also comprise power tube gate drive circuit (5), described power tube gate drive circuit (5) is used to produce the drive signal of outside power tube in each, controls the turn-on and turn-off of outside power tube in each; Make the speed of opening of described inboard power tube all the time faster than described outside power tube; The turn-off speed of described inboard power tube is slower than described outside power tube all the time.
4, the control device of a kind of converter according to claim 3 is characterized in that:
Described power tube gate drive circuit (5) comprises inboard power tube gate drive circuit and outside power tube gate drive circuit;
Described outside power tube gate drive circuit comprises the 11 resistance (Rg11), the 21 resistance (Rg21), the 11 diode (Dg11), one end of described the 11 resistance (Rg11) is as the input of outside power tube gate drive circuit, the gate pole of its another termination outside power tube; The negative electrode of input termination the 11 diode (Dg11) of described outside power tube gate drive circuit, the 21 resistance (Rg21) connects the gate pole of outside power tube, and the other end of the 21 resistance (Rg21) links to each other with the anode of the 11 diode (Dg11);
Described inboard power tube gate drive circuit comprises the 12 resistance (Rg12), the 22 resistance (Rg22), the 12 diode (Dg12), one end of described the 12 resistance (Rg12) is as the input of inboard power tube gate drive circuit, the gate pole of the inboard power tube of its another termination; The anode of input termination the 12 diode (Dg12) of described inboard power tube gate drive circuit, the 22 resistance (Rg22) connects the gate pole of inboard power tube, and the other end of the 22 resistance (Rg22) links to each other with the negative electrode of the 12 diode (Dg12).
5, the control device of a kind of converter according to claim 3, it is characterized in that: described power tube gate drive circuit (5) comprises first and second resistance (Rg1, Rg2), one end of described first resistance (Rg1) is opened the input of signal as power tube, the gate pole of its another termination power tube, one end of described second resistance (Rg2) is as the input of power tube cut-off signals, the gate pole of its another termination power tube.
6, the control device of a kind of converter according to claim 5 is characterized in that: the resistance value of the resistance value of first resistance (Rg1) of described power tube gate drive circuit (5) during as inboard power tube gate drive circuit corresponding resistance during as outside power tube gate drive circuit less than it; The resistance value of the resistance value of second resistance (Rg2) of described power tube gate drive circuit (5) during corresponding resistance during as outside power tube gate drive circuit greater than it as inboard power tube gate drive circuit.
7, a kind of driving method of converter, control device comprises: control circuit (2), delay circuit (3), protective circuit (4) and power tube gate drive circuit (5), described control device is exported four tunnel control signals, controls first outside power tube (S1), the second inboard power tube (S2), the 3rd inboard power tube (S3) and side power tube (S4) all round respectively; It is characterized in that, comprise the steps:
The control logic of described power tube is, the control logic complementary modulation of first outside power tube (S1) and the 3rd inboard power tube (S3), and leave the dead band; The second inboard power tube (S2) and is side power tube (S4) complementary modulation all round, and leaves the dead band; The second inboard power tube (S2) is opened then in first outside power tube (S1) prior to first outside power tube (S1) and is turn-offed, the 3rd inboard power tube (S3) prior to all round side power tube (S4) open then in all round side power tube (S4) turn-off.
8, the driving method of a kind of converter according to claim 7, described delay circuit comprise first delay circuit and second delay circuit, it is characterized in that:
Described first delay circuit is controlled first outside power tube (S1) and the rising edge time-delay Td1 of side power tube (S4) gate electrode drive signals all round, and the drive signal after the delay process is controlled first outside power tube (S1) and the side power tube (S4) all round respectively;
Described second delay circuit is controlled the rising edge and the trailing edge time-delay Td2 of the second inboard power tube (S2) and the 3rd inboard power tube (S3) gate electrode drive signals, and the drive signal after the delay process is controlled the second inboard power tube (S2) and the 3rd inboard power tube (S3) respectively;
Control time-delay Td1 is greater than time-delay Td2.
9, the driving method of a kind of converter according to claim 8 is characterized in that: during described protective circuit (4) work, protective circuit (4) is directly blocked the drive signal of described delay circuit (3) prime.
10, the driving method of a kind of converter according to claim 7, described power tube gate drive circuit (5) comprises inboard power tube gate drive circuit and outside power tube gate drive circuit, it is characterized in that: the speed of opening of described inboard power tube gate drive circuit is faster than described outside power tube gate drive circuit; The turn-off speed of described inboard power tube gate drive circuit is slower than described outside power tube gate drive circuit.
CNB2006100737761A 2006-04-04 2006-04-04 A kind of control device of three-level converter and driving method Active CN100566108C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB2006100737761A CN100566108C (en) 2006-04-04 2006-04-04 A kind of control device of three-level converter and driving method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB2006100737761A CN100566108C (en) 2006-04-04 2006-04-04 A kind of control device of three-level converter and driving method

Publications (2)

Publication Number Publication Date
CN101051794A true CN101051794A (en) 2007-10-10
CN100566108C CN100566108C (en) 2009-12-02

Family

ID=38783032

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2006100737761A Active CN100566108C (en) 2006-04-04 2006-04-04 A kind of control device of three-level converter and driving method

Country Status (1)

Country Link
CN (1) CN100566108C (en)

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101425798B (en) * 2007-10-30 2011-09-07 比亚迪股份有限公司 Dynamic current equalizing method and device for parallel IGBT
CN102611342A (en) * 2012-03-13 2012-07-25 华为技术有限公司 Three-level inverter
CN102611343A (en) * 2012-03-13 2012-07-25 华为技术有限公司 Three-level inverter
CN101588124B (en) * 2008-05-23 2012-10-10 力博特公司 Wave-chasing current-limiting control method of diode mid-point clamping multilevel converter
CN103138620A (en) * 2013-02-26 2013-06-05 常熟开关制造有限公司(原常熟开关厂) Control method of invertion device
WO2014044087A1 (en) * 2012-09-19 2014-03-27 华为技术有限公司 Diode neutral point clamped three-level inverter current limiting control method and related circuit thereof
WO2014067271A1 (en) * 2012-10-29 2014-05-08 华为技术有限公司 Three-level inverter and power supply device
CN104270027A (en) * 2014-10-23 2015-01-07 阳光电源股份有限公司 Method and device for generating PWM (Pulse-Width Modulation) pulse of multilevel inverter
CN105186902A (en) * 2015-09-10 2015-12-23 阳光电源股份有限公司 ANPC type three-level inverter, modulation method and electrical equipment
CN105375802A (en) * 2015-11-25 2016-03-02 许继电气股份有限公司 I-type NPC IGBT three-level circuit driving control method and circuit
CN106301045A (en) * 2016-05-24 2017-01-04 杭州飞仕得科技有限公司 A kind of novel I type three level driving circuit being applicable to NPC and ANPC
CN106803724A (en) * 2017-03-07 2017-06-06 株洲中车时代电气股份有限公司 The driver and control method of three level IGBT power models
CN106899222A (en) * 2017-03-28 2017-06-27 深圳科士达科技股份有限公司 A kind of three-level inverter and its driving zero passage method for handover control
CN111049408A (en) * 2020-01-06 2020-04-21 山东华天电气有限公司 I-type three-level driving time sequence protection circuit
CN113517815A (en) * 2021-09-14 2021-10-19 浙江日风电气股份有限公司 Three-level bidirectional direct current converter and control system and control method thereof
CN114362497A (en) * 2022-03-17 2022-04-15 阳光电源股份有限公司 Electronic capacitor, converter and electronic capacitor control method thereof

Cited By (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101425798B (en) * 2007-10-30 2011-09-07 比亚迪股份有限公司 Dynamic current equalizing method and device for parallel IGBT
CN101588124B (en) * 2008-05-23 2012-10-10 力博特公司 Wave-chasing current-limiting control method of diode mid-point clamping multilevel converter
CN102611342A (en) * 2012-03-13 2012-07-25 华为技术有限公司 Three-level inverter
CN102611343A (en) * 2012-03-13 2012-07-25 华为技术有限公司 Three-level inverter
EP2662966B1 (en) * 2012-03-13 2018-09-12 Huawei Technologies Co., Ltd. Three-level inverter
US9531185B2 (en) 2012-09-19 2016-12-27 Huawei Technologies Co., Ltd. Current limiting control method for diode neutral-point-clamped three-level inverter and related circuit
WO2014044087A1 (en) * 2012-09-19 2014-03-27 华为技术有限公司 Diode neutral point clamped three-level inverter current limiting control method and related circuit thereof
WO2014067271A1 (en) * 2012-10-29 2014-05-08 华为技术有限公司 Three-level inverter and power supply device
CN103138620B (en) * 2013-02-26 2015-08-26 常熟开关制造有限公司(原常熟开关厂) A kind of control method of inverter
CN103138620A (en) * 2013-02-26 2013-06-05 常熟开关制造有限公司(原常熟开关厂) Control method of invertion device
CN104270027A (en) * 2014-10-23 2015-01-07 阳光电源股份有限公司 Method and device for generating PWM (Pulse-Width Modulation) pulse of multilevel inverter
CN104270027B (en) * 2014-10-23 2017-06-13 阳光电源股份有限公司 A kind of multi-electrical level inverter pwm pulse generation method and device
CN105186902A (en) * 2015-09-10 2015-12-23 阳光电源股份有限公司 ANPC type three-level inverter, modulation method and electrical equipment
CN105186902B (en) * 2015-09-10 2017-07-28 阳光电源股份有限公司 A kind of ANPC types three-level inverter, modulator approach and electrical equipment
CN105375802A (en) * 2015-11-25 2016-03-02 许继电气股份有限公司 I-type NPC IGBT three-level circuit driving control method and circuit
CN106301045A (en) * 2016-05-24 2017-01-04 杭州飞仕得科技有限公司 A kind of novel I type three level driving circuit being applicable to NPC and ANPC
CN106803724A (en) * 2017-03-07 2017-06-06 株洲中车时代电气股份有限公司 The driver and control method of three level IGBT power models
CN106803724B (en) * 2017-03-07 2019-04-23 株洲中车时代电气股份有限公司 The driver and control method of three level IGBT power modules
CN106899222A (en) * 2017-03-28 2017-06-27 深圳科士达科技股份有限公司 A kind of three-level inverter and its driving zero passage method for handover control
CN106899222B (en) * 2017-03-28 2020-06-09 深圳科士达科技股份有限公司 Three-level inverter and driving zero-crossing switching control method thereof
CN111049408A (en) * 2020-01-06 2020-04-21 山东华天电气有限公司 I-type three-level driving time sequence protection circuit
CN113517815A (en) * 2021-09-14 2021-10-19 浙江日风电气股份有限公司 Three-level bidirectional direct current converter and control system and control method thereof
CN113517815B (en) * 2021-09-14 2021-11-26 浙江日风电气股份有限公司 Three-level bidirectional direct current converter and control system and control method thereof
CN114362497A (en) * 2022-03-17 2022-04-15 阳光电源股份有限公司 Electronic capacitor, converter and electronic capacitor control method thereof
CN114362497B (en) * 2022-03-17 2022-07-12 阳光电源股份有限公司 Electronic capacitor, converter and electronic capacitor control method thereof

Also Published As

Publication number Publication date
CN100566108C (en) 2009-12-02

Similar Documents

Publication Publication Date Title
CN101051794A (en) Controller of converter and its driving method
CN1260887C (en) Grid drive circuit
CN103560728A (en) Motor drive circuit with dead band time delay
CN105356727A (en) Switching tube drive control method for switching power supply and control circuit
CN1897440A (en) Circuit for controlling switch power supply
CN109039061A (en) A kind of more level BOOST devices
CN103166435B (en) Voltage self-adaptive control method based on insulated gate bipolar translator (IGBT) series connection loss optimization
CN1270438C (en) Variable frequency driving device of 3KV-10KV middle-high voltage multi-level three-phase AC motor
CN1588799A (en) Driving protective circuit for inverse resistance type insulated gate bipolar transistor
CN110098598B (en) Reverse-blocking type hybrid submodule with fault blocking capability and fault blocking method thereof
CN109980905A (en) Clutter reduction circuit, driving circuit and the bridge converter of sic filed effect pipe
CN106936298A (en) A kind of semiconductor devices, control method and current transformer
CN104767368B (en) A kind of highly reliable three-level inverter circuit Current limited Control method
CN104702181A (en) H-bridge driving circuit and control method thereof
CN1747273A (en) Safety sealing impulse method of medium-high voltage three-level converter based on IGCT
CN108390547A (en) It is a kind of based on current threshold judge inverse conductivity type IGBT gate poles move back driven saturated method in advance
CN105207510A (en) Three-level module parallel structure and parallel method
CN203352476U (en) Dead zone compensation circuit for inverter
CN104779780B (en) A kind of IGBT series average-voltages circuit and method
CN204810134U (en) DVDT detects and protection device
CN101783582A (en) Single-input dual-output pulse-width modulation signal generating circuit with adjustable dead time
CN105375802A (en) I-type NPC IGBT three-level circuit driving control method and circuit
CN206041784U (en) Trigger pulse modulation circuit of thyristor
CN205004946U (en) IGBT active clamping protection circuit
CN112701893A (en) Series converter based on Si IGBT/SiC MOS hybrid parallel device and fault operation control method thereof

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CP03 Change of name, title or address

Address after: Columbo Road, Ohio, Dearborn 1050

Patentee after: Vitamin Corporation

Address before: ohio

Patentee before: Libot Inc.

CP03 Change of name, title or address