CN101048824B - 用于纳米级电子电路的纳米级锁存器和阻抗编码逻辑电路 - Google Patents
用于纳米级电子电路的纳米级锁存器和阻抗编码逻辑电路 Download PDFInfo
- Publication number
- CN101048824B CN101048824B CN2005800370031A CN200580037003A CN101048824B CN 101048824 B CN101048824 B CN 101048824B CN 2005800370031 A CN2005800370031 A CN 2005800370031A CN 200580037003 A CN200580037003 A CN 200580037003A CN 101048824 B CN101048824 B CN 101048824B
- Authority
- CN
- China
- Prior art keywords
- nanoscale
- latch
- input
- voltage
- logic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/02—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using elements whose operation depends upon chemical change
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/81—Array wherein the array conductors, e.g. word lines, bit lines, are made of nanowires
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S977/00—Nanotechnology
- Y10S977/70—Nanostructure
- Y10S977/788—Of specified organic or carbon-based composition
- Y10S977/789—Of specified organic or carbon-based composition in array format
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/974,660 US7242215B2 (en) | 2004-10-27 | 2004-10-27 | Nanoscale latches and impedance-encoded logic for use in nanoscale state machines, nanoscale pipelines, and in other nanoscale electronic circuits |
US10/974,660 | 2004-10-27 | ||
PCT/US2005/037636 WO2006049881A1 (en) | 2004-10-27 | 2005-10-14 | Nanoscale latches and impedance-encoded logic for use in nanoscale state machines, nanoscale pipelines, and in other nanoscale electronic circuits |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101048824A CN101048824A (zh) | 2007-10-03 |
CN101048824B true CN101048824B (zh) | 2011-09-21 |
Family
ID=35892577
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2005800370031A Active CN101048824B (zh) | 2004-10-27 | 2005-10-14 | 用于纳米级电子电路的纳米级锁存器和阻抗编码逻辑电路 |
Country Status (6)
Country | Link |
---|---|
US (1) | US7242215B2 (ko) |
EP (1) | EP1805767B1 (ko) |
JP (1) | JP4510895B2 (ko) |
KR (1) | KR100929305B1 (ko) |
CN (1) | CN101048824B (ko) |
WO (1) | WO2006049881A1 (ko) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7358614B2 (en) * | 2005-03-08 | 2008-04-15 | Hewlett-Packard Development Company, L.P. | Antisymmetric nanowire crossbars |
US20080093693A1 (en) * | 2006-10-20 | 2008-04-24 | Kamins Theodore I | Nanowire sensor with variant selectively interactive segments |
US7945884B1 (en) * | 2008-04-08 | 2011-05-17 | Force 10 Networks, Inc. | Backplane routing arrangement with decreased crosstalk |
EP2230633A1 (en) * | 2009-03-17 | 2010-09-22 | Commissariat à l'Énergie Atomique et aux Énergies Alternatives | Neural network circuit comprising nanoscale synapses and CMOS neurons |
US8569900B2 (en) | 2009-07-20 | 2013-10-29 | Hewlett-Packard Development Company, L.P. | Nanowire sensor with angled segments that are differently functionalized |
CN115940934B (zh) * | 2023-03-09 | 2023-08-25 | 上海芯联芯智能科技有限公司 | 一种qca电路及qca电路中信号线交叉的方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1305230A (zh) * | 1999-10-21 | 2001-07-25 | 松下电子工业株式会社 | 适用于非易失性存储器的隧道晶体管 |
US20020163831A1 (en) * | 2001-05-07 | 2002-11-07 | Coatue Corporation | Molecular memory cell |
US20040160807A1 (en) * | 2002-08-02 | 2004-08-19 | Unity Semiconductor Corporation | Cross point memory array with memory plugs exhibiting a characteristic hysteresis |
US20040160819A1 (en) * | 2002-08-02 | 2004-08-19 | Unity Semiconductor Corporation | High-density NVRAM |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6518156B1 (en) * | 1999-03-29 | 2003-02-11 | Hewlett-Packard Company | Configurable nanoscale crossbar electronic circuits made by electrochemical reaction |
US6072716A (en) * | 1999-04-14 | 2000-06-06 | Massachusetts Institute Of Technology | Memory structures and methods of making same |
US7301199B2 (en) * | 2000-08-22 | 2007-11-27 | President And Fellows Of Harvard College | Nanoscale wires and related devices |
US6707063B2 (en) * | 2001-03-22 | 2004-03-16 | Hewlett-Packard Development Company, L.P. | Passivation layer for molecular electronic device fabrication |
US6531371B2 (en) * | 2001-06-28 | 2003-03-11 | Sharp Laboratories Of America, Inc. | Electrically programmable resistance cross point memory |
US6586965B2 (en) * | 2001-10-29 | 2003-07-01 | Hewlett Packard Development Company Lp | Molecular crossbar latch |
US8004876B2 (en) * | 2002-08-30 | 2011-08-23 | Hewlett-Packard Development Company, L.P. | Configurable molecular switch array |
DE10324388A1 (de) * | 2003-05-28 | 2004-12-30 | Infineon Technologies Ag | Schaltungselement mit einer ersten Schicht aus einem elektrisch isolierenden Substratmaterial und Verfahren zur Herstellung eines Schaltungselements |
US7291878B2 (en) * | 2003-06-03 | 2007-11-06 | Hitachi Global Storage Technologies Netherlands B.V. | Ultra low-cost solid-state memory |
-
2004
- 2004-10-27 US US10/974,660 patent/US7242215B2/en active Active
-
2005
- 2005-10-14 WO PCT/US2005/037636 patent/WO2006049881A1/en active Application Filing
- 2005-10-14 EP EP05810496A patent/EP1805767B1/en active Active
- 2005-10-14 CN CN2005800370031A patent/CN101048824B/zh active Active
- 2005-10-14 KR KR1020077009540A patent/KR100929305B1/ko active IP Right Grant
- 2005-10-14 JP JP2007538992A patent/JP4510895B2/ja not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1305230A (zh) * | 1999-10-21 | 2001-07-25 | 松下电子工业株式会社 | 适用于非易失性存储器的隧道晶体管 |
US20020163831A1 (en) * | 2001-05-07 | 2002-11-07 | Coatue Corporation | Molecular memory cell |
US20040160807A1 (en) * | 2002-08-02 | 2004-08-19 | Unity Semiconductor Corporation | Cross point memory array with memory plugs exhibiting a characteristic hysteresis |
US20040160819A1 (en) * | 2002-08-02 | 2004-08-19 | Unity Semiconductor Corporation | High-density NVRAM |
Non-Patent Citations (1)
Title |
---|
全文. |
Also Published As
Publication number | Publication date |
---|---|
WO2006049881A1 (en) | 2006-05-11 |
JP4510895B2 (ja) | 2010-07-28 |
EP1805767B1 (en) | 2012-12-05 |
KR100929305B1 (ko) | 2009-11-27 |
CN101048824A (zh) | 2007-10-03 |
KR20070065406A (ko) | 2007-06-22 |
US7242215B2 (en) | 2007-07-10 |
US20060087344A1 (en) | 2006-04-27 |
EP1805767A1 (en) | 2007-07-11 |
JP2008518560A (ja) | 2008-05-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100909331B1 (ko) | 분자 크로스바 래치, 나노와이어 상으로의 로직 값 래칭 방법, 나노스케일 스위치에서 신호 복원 방법 및 나노스케일 스위치에서 신호 논리 값 반전 방법 | |
CN101048824B (zh) | 用于纳米级电子电路的纳米级锁存器和阻抗编码逻辑电路 | |
Snider | Computing with hysteretic resistor crossbars | |
US7310004B2 (en) | Apparatus and method of interconnecting nanoscale programmable logic array clusters | |
EP1745549A1 (en) | Architecture and methods for computing with nanometer scale reconfigurable resistor crossbar switches | |
Singh | Design and performance analysis of a new efficient coplanar quantum-dot cellular automata adder | |
US7855911B2 (en) | Reconfigurable magnetic logic device using spin torque | |
US7274208B2 (en) | Nanoscale wire-based sublithographic programmable logic arrays | |
CN104425002B (zh) | 时钟控制全自旋逻辑电路 | |
CN109817255A (zh) | 权重单元、集成电路和执行乘法及累加运算的方法 | |
Velasquez et al. | Automated synthesis of crossbars for nanoscale computing using formal methods | |
JP4264106B2 (ja) | 被制御入力分子クロスバーラッチ | |
Ziegler et al. | The CMOS/nano interface from a circuits perspective | |
CN104124961A (zh) | 一种基于忆阻器的逻辑非门电路 | |
Velasquez et al. | Fault-tolerant in-memory crossbar computing using quantified constraint solving | |
Pan et al. | SR-WTA: Skyrmion racing winner-takes-all module for spiking neural computing | |
CN101162728A (zh) | 代表“0”与“1”二进制的磁性晶体管线路 | |
Wu et al. | Latency & area measurement and optimization of asynchronous nanowire crossbar system | |
Shahsavari et al. | Unconventional digital computing approach: memristive nanodevice platform | |
Fourie et al. | An RSFQ superconductive programmable gate array | |
CN203504534U (zh) | 一种超多输入编码器 | |
Kuekes et al. | Effect of conductance variability on resistor-logic demultiplexers for nanoelectronics | |
CN114883483A (zh) | 自旋门逻辑器件及扩展自旋多数门逻辑器件 | |
CN110708058A (zh) | 一种基于全自旋逻辑器件的2-4线译码器及其控制方法 | |
Wang et al. | A balanced Memristor-CMOS ternary logic family and its application |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20170113 Address after: American Texas Patentee after: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP Address before: American Texas Patentee before: Hewlett Packard Development Co. |