CN101021721A - Three-bus structure-based intelligent monitoring unit special integrated circuit - Google Patents
Three-bus structure-based intelligent monitoring unit special integrated circuit Download PDFInfo
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Abstract
The invention discloses a three-bus structure-based intelligent monitoring unit special integrated circuit, completing main functions of the intelligent monitoring unit by cooperation of all functional modules. And these modules are implemented by being respectively mapped to hardware and software resources of special integrated circuit, where the hardware modules include data collection module, data processing module and partial protection control modules, and the software modules implemented by microprocessor include communication and man-machine interactive modules; the microprocessor reads and writes data of other parallel modules by internal data, address and control buses of the special integrated circuit; the hardware modules are connected in turn through datastream structure; and the whole performance of the special integrated circuit is improved by related optimization methods. And the special integrated circuit finally passes verification of FPGA-based verifying platform, proving the accuracy of the functions of the whole special integrated circuit.
Description
Technical field
The invention belongs to computer application field; relate to the special IC (ASIC that is used to monitor, protect electrical network and equipment thereof; Application Specific Integrated Circuit), Automation of Electric Systems intelligent monitoring unit special integrated circuit particularly.
Background technology
The microcomputer-based intelligent monitoring unit is applied to electric system; finish the monitoring of the on-the-spot operation of power equipment parameter and state and write down protection and control equipment and controlled device; and realization and communicating by letter of distant place host computer etc., in electric system, play vital role such as control and protection.Because it is higher that it has reliability, response speed is very fast, information is had advantages such as storage, memory, computing and automatic data collection, processing, demonstration, has obtained at present using widely in electric system.
Although for different occasion electric power monitoring and control, the performance requirement difference of its intelligent monitoring unit, form is different, but up to the present, its hardware circuit is still with the core of microprocessor as system, and its performance height has directly determined the quality of properties of product.For over ten years, very big variation has taken place selecting for use of microprocessor in intelligent monitoring unit.Come out from the intelligent apparatus of initial single 8 bit processor structures, the product that to develop into 16 single-chip microcomputers very soon be main flow, in high-end product, developed into again in recent years with 32 single-chip microcomputers with the industrial control computer and the de facto standard of taking as the leading factor with digital signal processor (DSP, Digital SignalProcessing) technology, multiprocessor.
Should see, the intrinsic deficiency of some of microprocessor, some in addition directly influenced further application in the Power System Intelligent field.By microprocessor is that the problem that the main application system that constitutes occurs can be divided into two classes usually: a class is pure technical matters, as the selection of software design flow process, interface device or the rationality problem of interference protection measure application etc., these problems belong to the row that can solve usually.Another kind of then directly relevant with microprocessor itself, belong to more inherent unsurmountable shortcomings.These shortcoming and defect are mainly reflected in the following aspects:
1) efficient is low.Microprocessor and DSP that intelligent monitoring unit adopts adopt queuing type serial command executive mode, thereby the raising of its operating rate and efficient also is subject to this working method, the speed of DSP and microprocessor can not satisfy the requirement that the big data quantity algorithm is handled data, and in order to reach high processing speed, usually need a plurality of processor co-ordinations, increased the complexity of circuit on the one hand, influenced reliability, on the other hand, the coordination of multiprocessor and work allocation and corresponding software development are also complicated, and the space of further improving processing power is limited.
2) resource utilization is low.Because general purpose microprocessor designs at the wide industrial application demand, can run into the inadequate resource that has usually on the microprocessor type selecting, and the situation of the resource redundancy that has.Because the input/output signal of intelligent monitoring unit has diversity, general purpose I/O that adopts microprocessor to provide handles, and needs to increase a lot of peripheral circuits and cooperates, and has increased the use of discrete component, increased the area of hardware circuit, system reliability can reduce.
3) program pointer is subject to disturb.Under strong jamming or certain casual condition, the program pointer of microprocessor may run off normal program circuit, so-called " race flies " state occurs, needs to adopt corresponding software and hardware measure to prevent the generation of fortuitous events such as monitoring unit misoperation in design.
Above problem is that general purpose microprocessor is intrinsic, address these problems the approach that must explore other.Along with the development of microelectric technique, application-specific integrated circuit ASIC all has clearly advantage at aspects such as speed, performance, reliability, volume and confidentiality than universal integrated circuit, is the focus of electronic system design in recent years.Integrated circuit provides a new evolutionary path for the hardware design of intelligent monitoring unit.
The example that special IC is applied to electric system is also arranged both at home and abroad; as use programmable logic device (PLD) to finish the control of data acquisition and the relay protection algorithm of realizing special use; but still based on employing general purpose microprocessor design intelligent monitoring unit, so design surface has great importance to the system-level special IC that the application of Power System Intelligent monitoring unit has independent intellectual property right.
Summary of the invention
The objective of the invention is to, propose a kind of intelligent monitoring unit special integrated circuit, utilize special IC of system-level specialized integrated circuit technique exploitation, replace microprocessor in the past to realize intelligent monitoring unit based on three-bus structure.
In order to realize above-mentioned task, the present invention takes following technical solution:
A kind of based on the three-bus structure intelligent monitoring unit special integrated circuit, it is characterized in that, the inner three-bus structure that adopts of described special IC, be meant data, address and read-write control three buses that interior data buffer of microprocessor and sheet or control register are connected, microprocessor can read the real time data of certain acquisition channel one-period in the real time data buffer zone as required by the mode of addressing, calculate the effective value of certain passage in the buffer zone, the amplitude of certain subharmonic, the result of calculation and the frequency measurement of current power; Microprocessor also is addressed to the protection control register different protection definite values is set; This integrated circuit is mainly finished the parameter of real-time monitoring reflection protected object running status, judges whether acquisition parameter occurs unusually, realizes functions such as communication and man-machine interaction; This integrated circuit mainly comprises:
Data acquisition module, be used to finish the operation of control A/D converter, finish the synchronous acquisition of analog channel, convert it to digital circuit accessible digital signal, and the input of finishing switching value signal and pulsed quantity signal is handled, for data processing module provides real time data;
Data processing module is used to finish the processing such as effective value, power calculation of signal real time data, and utilizes the fast fourier transform Real Time harmonic analysis, record each harmonic amplitude;
The protection control module: the data that are used to provide are finished the defencive function of setting;
The software module of being finished by microprocessor has communication and human-computer interaction module; The flow direction of data in above-mentioned module is that outside real time data enters special IC inside by data acquisition module; Data processing module reads the data that obtain and carries out correlation computations; Protection control is read result of calculation and is finished the protection algorithm.
This special IC adopts cooperative work of software and hardware to finish functions such as measurement, control, protection, communication, and adopts data, address and control three-bus structure in sheet, makes things convenient for internal data to read.And finish checking based on the testing authentication hardware platform of on-site programmable gate array FPGA (Field Programmable Gate Array).Proved the correctness of whole special integrated circuit function.
Description of drawings
Fig. 1 is the intelligent monitoring unit synoptic diagram in the background technology;
Fig. 2 is that the intelligent monitoring unit special integrated circuit internal module is divided in the summary of the invention;
Fig. 3 is an intelligent monitoring unit special integrated circuit internal data flow structural drawing in the summary of the invention;
Fig. 4 is the structured flowchart of intelligent monitoring unit special integrated circuit;
Fig. 5 is the inner three-bus structure figure of intelligent monitoring unit special integrated circuit;
Fig. 6 is the data acquisition module structure principle chart;
Fig. 7 is the model structure figure of typical protection module;
Fig. 8 is the connection and control synoptic diagram of parallel intermodule;
Fig. 9 is the verification platform structural representation of intelligent monitoring unit special integrated circuit;
Figure 10 is the structured flowchart of intelligent monitoring unit special integrated circuit Hardware Verification Platform.
For a more clear understanding of the present invention, comply with the embodiment that technical scheme of the present invention is finished below in conjunction with accompanying drawing and inventor, the present invention is described in further detail.
Embodiment
Intelligent monitoring unit special integrated circuit of the present invention designs according to the general top-down method for designing of system-level special IC.May further comprise the steps:
1) intelligent monitoring unit special integrated circuit overall system design
According to the ASIC Design flow process, at first the monitoring unit special IC is carried out overall design, determine each functional module of system.This integrated circuit is mainly finished three partial functions, comprises the parameter of real-time monitoring reflection protected object running status, as voltage, electric current, frequency etc.; Judge whether acquisition parameter occurs unusually, as occur protecting action according to specific algorithm unusually; Simultaneously, realize functions such as communication and man-machine interaction.
From a structural point, this integrated circuit is made up of data acquisition module, data processing module, protection control module, communication module and human-computer interaction module.
2) intelligent monitoring unit special integrated circuit built-in function mapping
The function division correctly is mapped on the different software and hardware resources, requires the function high, that operand is big to be mapped as an accurate hardware module, have concurrency for real-time; , function that control complicated less demanding for real-time is mapped as the task of a specific process, cooperates microprocessor to be realized by software.
Hardware module adopts the general hardware descriptive language to design a series of modules, adopts the parametrization element design, by reference the scale of parameter change module.Main functional module has: data acquisition module, data processing module, protection control module and interface module.Microprocessor is finished modules such as man-machine interaction, communication.
3) design of the inner three-bus structure of intelligent monitoring unit special integrated circuit
Intelligent monitoring unit special integrated circuit indoor design data, address, control three buses, microprocessor can connect with other parallel module by this bus, according to specific data structure and host-host protocol reading of data, can do further processing, can finish also that functional configuration, keyboard show and function such as communicate by letter.
Microprocessor reading and writing internal data for convenience encapsulate data buffer in the sheet and the register form with data, address, control three buses, constitute the addressable space of special IC inside.
4) design of data flow architecture between the intelligent monitoring unit special integrated circuit internal module
Standard integrated circuit internal data flow structure, method of attachment between the design module and work schedule cooperate, with the collaborative work between each processing unit of data-driven.
5) intelligent monitoring unit special integrated circuit related optimization
The purpose of optimal design is under the condition that realizes identical function, reduces the use of resource, improves the speed of system.The present invention has taked optimized Measures according to the characteristics of intelligent monitoring unit algorithm from aspects such as combinational logic, state machine design, global clock design, resources allocations, makes design all obtain optimization on the utilization of resources and speed ability.
6) design of intelligent monitoring unit special integrated circuit verification platform
Intelligent monitoring unit special integrated circuit all needs the support of platform to checking from design, emulation.This platform designs according to the structure of intelligent electric appliance monitoring unit, as core devices, provides standardized peripheral module with programmable special IC, is used to verify the correctness of design.
Described data acquisition module, data processing module, protection control module are respectively:
Data acquisition module:
This module is mainly finished the operation of control A/D converter, finish the synchronous acquisition of analog channel, convert it to digital circuit accessible digital signal, and finish the input processing of switching value signal and pulsed quantity signal, for data processing module provides real time data;
Data processing module:
This module is finished processing such as the effective value, power calculation of signal real time data, and utilizes fast fourier transform (FFT, Fast Fourier Transform) Real Time harmonic analysis, record each harmonic amplitude;
The protection control module:
The data that this module provides according to data processing module are finished the defencive function of setting.
Data are that outside real time data enters special IC inside by data acquisition module in the flow direction of above-mentioned intermodule; Data processing module reads the data that obtain and carries out correlation computations; Protection control is read result of calculation and is finished the protection algorithm.
The inner three-bus structure of described special IC is meant data, address and read-write control three buses that interior data buffer of microprocessor and sheet or control register are connected.Microprocessor can read the real time data of certain acquisition channel one-period in the real time data buffer zone as required by the mode of addressing, calculate the effective value of certain passage in the buffer zone, the amplitude of certain subharmonic, the result of calculation and the frequency measurement of current power; Microprocessor also is addressed to the protection control register different protection definite values is set.Adopt this method of attachment, the hardware simple and flexible, versatility is good, in case will increase or delete certain data processing or protection module in the sheet, only needs the building mode of this module with addressable space in the sheet is connected on the bus on chip, does not need to revise other module.
The structure of described interior addressable space is meant, the data that microprocessor need be read and write are stored by buffer zone or register, the design auxiliary circuit encapsulates these unit, all there is unique address number each unit, externally possesses data, address and read-write control three bus interface.The buffer zone and the register of design comprise:
The real time data buffer zone writes down the real time data in each sampling channel one-period;
Calculate buffer zone, write down each passage effective value, certain subharmonic amplitude, the result of calculation of current power and the measurement result of frequency;
The protection control register is deposited the protection definite value of protecting algorithm.
Described microprocessor can be that the form with soft nuclear or stone is integrated in the embedded microprocessor in the sheet, also can be at independent microprocessor outside sheet.
Method of attachment between described each hardware module is as follows: three modules connect successively with data flow architecture in the intelligent monitoring unit special integrated circuit, each module concurrent working, on data, interdepend, wherein data flow to next module from a module, therefore adopt a shared buffer zone to store these data between two interconnect modules.
Sequential between described each module cooperates as follows: from the angle of data stream, in order to guarantee the collaborative work of each module, need to satisfy certain requirement in time, the time that is each resume module speed is less than the refresh time that it imports the data of data buffer, to guarantee the response data processing in time of each module, make data flow to next module, to avoid occurring data jamming from a module.The cycle of data acquisition module output sampled data is by the sample frequency decision, so the processing time of data processing module, protection control module is less than the interval time of sampling.When sampling number increases, the time of fft algorithm consumption will increase sharply in the data processing module, tend to cause data jamming above the sampling interval time, and the method for solution is that FFT is calculated in pointwise when low frequency, and high frequency time calculates FFT every some sampled points.
Described special IC can adopt based on general integrated circuit semi-custom designs method such as gate array, standard block or programming device and realize.
Below be the embodiment that the inventor provides:
1, the structure of intelligent monitoring unit special integrated circuit
The monitored object of intelligent monitoring unit is electrical equipments such as power transmission line, transformer, power transmission and distribution isolating switch, contactor; it must can in time detect and handle a large amount of real time datas when system's operate as normal, and can in time judge fault at protected circuit, when consumer breaks down and finish the protection action.Therefore, intelligent monitoring unit should have basic functions such as measurement, protection, control, communication, man-machine interaction, and from function, marking off each functional module and the annexation between them is the key of whole design.Fig. 4 has described the parallel organization of intelligent monitoring unit special integrated circuit.Method according to function mapping realizes modules such as data acquisition, data processing and part protection control in hardware, man-machine interaction and communication function module are realized in by software at microprocessor.
Data acquisition module comprises submodules such as A/D controlling of sampling, frequency measurement and digital frequency multiplication, switching value input buffering, electric degree step-by-step counting.The output of numeral frequency multiplication module is as the sampling trigger pulse of A/D conversion and control module, with the sampling that realizes the periodic signal realization of voltage, electric current is fixedly counted.The data that A/D conversion and control module obtains sampling are delivered in the metadata cache, carry out data processing for data processing module; Deliver to simultaneously in the metadata cache on the brace internal bus, external microprocessor reads the data of sampled point and does further processing or the storage of record ripple.
Data processing module is by effective value and power calculation, and the function sub-modules that FFT frequency analysis etc. are handled voltage and current signal constitutes, and moves under unified data processing controller sequential control.Data processing module is sent The results of data processing into the protection control module, protects judgement, sends into simultaneously in the calculation result data buffer memory to read for external microprocessor and carries out certain processing and demonstration.
The protection control module, simple for algorithm because the diversity of protection algorithm has embodied intelligentized key simultaneously, the protection control that response speed will be sought quickness is realized by hardware.By hard-wired each protection module concurrent working, do not disturb mutually, improved the speed and the reliability of protection control.The definite value that the amplitude that the protection control module is obtained treated real-time first-harmonic or harmonic wave from data processing module is equal to setting compares judgement, determines whether to protect action.
2, the design of three buses in the intelligent monitoring unit special integrated circuit sheet
Microprocessor has been set up the connection of inner each module of special IC with microprocessor by data, address and control line, read the data of addressable space in the sheet that connects with bus, these data comprise: the A/D sampling controller is exported each passage current sampling point data, frequency measurement, data processed result etc.In addition, microprocessor writes corresponding data by the register of interface in device, and the control register of module or the definite value in the setting protection module are set.
Existing implementation, external microprocessor adopts the mode of two-chip computer communication during with the special IC interface, being about to the interior system lock of sheet gets up, constitute an autonomous system, external microprocessor can not directly be visited internal data, and, realize that special IC is with the two-way communication between the microprocessor by self-defining communication protocol.Adopt above-mentioned mode, hardware costs is big, and communication efficiency is low, and it is dumb that microprocessor obtains the mode of special IC internal data.The present invention has realized data, address and read-write control three-bus structure, considers the resource and the application characteristic of intelligent monitoring unit special integrated circuit, adopts the data bus of 8 bit widths, to adapt to more general microprocessor at present.The structural drawing of interface provides 15 pins, the wherein bus of 8 address date time-sharing multiplexs to the outside as shown in Figure 5, the control signal that cooperates other, addressing space expands 8 position datawires in sheet, the most-significant byte address wire, the least-significant byte address wire, the three-bus structure of formation reading and writing internal data.By this bus, microprocessor can be visited the data of inner other parallel module neatly.
3, the design of intelligent monitoring unit special integrated circuit main functional modules
A. data acquisition module
In design in the past, have to propose to use FPGA to realize data acquisition at specific analog to digital converter, determine do not possess dirigibility but mostly these designs are non-synchronous acquisition system and acquisition channel.The design will introduce a kind of data acquisition module of multi-channel synchronous sampling, Fig. 6 is the structural drawing of module, this module is made up of a slice digital to analog converter MAX125 and two MUX MAX4533, the two cooperatively interacts and finishes the data acquisition of maximum 16 passages, and the control register that the user can be provided with in the module is as required revised the ALT-CH alternate channel number.Be 3 μ s the switching time of MAX125, and the highest sampling rate of system can reach more than the 300k so, when analog channel quantity at 6 when following, sampling rate can reach 1024 points weekly.
The pulse signal that digital frequency multiplier is exported the mains frequency integral multiple has in real time been introduced in design, as the trigger pip of A/D converter sampling, realizes the synchronized sampling to power network signal, and finishes the measurement of frequency.
B. data processing module
Data processing in the intelligent monitoring unit mainly is that voltage, current data that real-time sampling obtains are carried out corresponding computing according to the requirement of measurement and defencive function.Data processing module adopts hardware circuit can realize that the processor adopting algorithm routine is beyond one's reach at a high speed, high-accuracy arithmetic, is that intelligent monitoring unit special integrated circuit has high performance main cause.
This module is mainly finished two part algorithms, one is in electrical measurement, the effective value calculating of voltage, electric current and the calculating of power, another adopts the fast Flourier operation core can realize the processing of 16 to 1024 sampled points to the frequency analysis of AC sampling data.
C. protection module
Protection module is because of the difference of actual monitored cell protection object; has different guard methods; therefore when task division; the present invention proposes complexity; special protection module adopts software to realize, and for simply, general; and, adopt hardware to realize with the rapidity that improves the protection action and the task division thought of accuracy to the demanding protection algorithm of responsiveness such as overcurrent protection, moving protection of wink.The core circuit of protection algorithm is that instantaneous value compares with definite value.Relatively export trigger pip as the actuating of relay.Typical overcurrent protection model as shown in Figure 7.
The core of protection module is a comparer; instantaneous value (coming from data processing module) compares with the definite value of setting; if greater than definite value; then start timer; timer adopts a down counter to finish; the time definite value of setting when counting is kept to zero, is sent the protection actuating signal as the initial value of counting.Protection module based on this structure can be provided with different time definite values and realize moving protection of wink, time-delay quick-break, overvoltage, overcurrent protection etc. by certain modification.The instantaneous value of protection module derives from FFT or effective value calculates the respective channel fundamental voltage amplitude or the effective value of output.
D. connection between the module and control
In order to guarantee that each parallel module can collaborative work, need to solve the connection and the control of intermodule.With the example that is connected between data acquisition and the data processing module, data acquisition module provides the real-time sampling data of simulating signal one-period for data processing module, therefore need store these data by a shared two-port RAM, need to set up the mutual of two modules simultaneously, be data acquisition module with DSR after, data processing module just can be handled, therefore data acquisition module comes the process of log-on data processing module by an indicator signal, carries out data processing operation one time.Two parallel modules connect with control mode as shown in Figure 8, whether the controller of data processing module effective by the inquiry indicator signal, determines whether reading of data, starts corresponding treatment progress.
4, intelligent monitoring unit special integrated circuit related optimization
Design is a constraint condition with system resource and speed, from the following aspects system is optimized:
A. the optimization of combinational logic circuit
Using more many inputs combinational logic circuit in design is exactly MUX, attainable hardware description language uses IF-ELSE statement and CASE statement usually, adopt the IF-ELSE statement, input signal appearance order difference in statement has different priority, therefore corresponding circuit is made up of the mode of cascade, circuit has bigger delay, and CASE statement correspondence is the selection logic of balance mode, the circuit of its realization has less delay, therefore as a rule, design adopts the CASE statement to realize selector switch.
Because intermodule adopts data flow architecture, preserve data by register between the module, under the effect of clock, data are through the computing of combinational logic, deliver to the input of next register, after next clock edge arrives, register with the input data latching and be sent to next module, on the path of data stream, the delay of combinational logic has determined the work clock of system, and in order to keep the speed of system clock, design uses pipelining that combinational logic is improved, being about to a big combinational logic Module Division is the experimental process module, add register between each submodule, constitute streamline, be divided into little module after, the corresponding shortening of the time-delay of each module reaches the requirement of keeping system clock.Adopt streamline, can some register resources of corresponding increase.
B. the optimization of state machine
Used finite state machine to come CONTROLLER DESIGN in the intelligent monitoring unit special integrated circuit, as the A/D sampling controller, the controller of data processing module etc.In order to reduce the error rate of state exchange, improve the travelling speed of state machine, design adopts solely hot yard (one hot encoding) to carry out the coding of state machine, the coded system of so-called solely heat sign indicating number is exactly each corresponding state of coding, and increase the design of reset function, and state machine enters the fault-tolerance design under other illegal state situations.
C. the optimization of global clock
Clock signal is a signal of interest in the device, and it is distributed in the entire device, is driving the work of sequential circuit.When design, at first to consider to use global clock, global clock has very strong driving force and very high speed, can guarantee the operate as normal of each module and circuit clock, on sequential, adopt global clock can realize the design of synchronous sequential logic, can avoid the sequential confusion, simplified design.But the clock frequency of actual each module work may be different, mainly are the influences that is subjected to gated clock and outside input clock, for this has done the globalize processing to these two kinds of clocks.
D. the optimization of resources allocation
The optimization of resources allocation is exactly that the algorithm that how will design is mapped on the hardware resource, and reaches optimum Resources Consumption.Multiplexing and the multiplexing method of register of operator has mainly been adopted in design, and so-called operator (operational symbol) is multiplexing distributes to the operator of the same type that some do not conflict with arithmetic element exactly; It is so-called that register is multiplexing exactly nonoverlapping data of several lifetimes is preserved with same register.
5, the design of intelligent monitoring unit special integrated circuit verification platform
Special IC is final finishes the support that all needs verification platform, Fig. 9 has described the verification platform of intelligent monitoring unit special integrated circuit, it mainly comprises various eda tools, IP storehouse, various user's debugging acid and the hardware platform of design needs, can utilize on-site programmable gate array FPGA to finish the hardware verification of special-purpose integration integrated circuits, remedy the deficiency of special IC design process software emulation.
The present invention has designed the Hardware Verification Platform based on FPGA, as shown in figure 10.This platform is made of three parts: first is based on the FPGA programmable asic, the FPGA device is formed a minimum system with the configuration device DLL (dynamic link library), link to each other with the motherboard of specific interface with the peripheral circuit place, second portion is a motherboard, constitute by the series of standards peripheral circuit that provides according to the intelligent monitoring unit application characteristic, third part is the minimum systematic module of a microprocessor, also link to each other with motherboard, so this platform is a knockdown system by specific interface.
Claims (8)
1. one kind based on the three-bus structure intelligent monitoring unit special integrated circuit, it is characterized in that, the inner three-bus structure that adopts of described special IC, the data that microprocessor is connected with interior data buffer of sheet or control register, address and read-write control three buses, microprocessor can read the real time data of certain acquisition channel one-period in the real time data buffer zone as required by the mode of addressing, calculate the effective value of certain passage in the buffer zone, the amplitude of certain subharmonic, the result of calculation and the frequency measurement of current power; Microprocessor also is addressed to the protection control register different protection definite values is set; This integrated circuit is mainly finished the parameter of real-time monitoring reflection protected object running status, judges whether acquisition parameter occurs unusually, realizes functions such as communication and man-machine interaction; The hardware configuration of this integrated circuit mainly comprises:
Data acquisition module, be used to finish the operation of control A/D converter, finish the synchronous acquisition of analog channel, convert it to digital circuit accessible digital signal, and the input of finishing switching value signal and pulsed quantity signal is handled, for data processing module provides real time data;
Data processing module is used to finish the processing such as effective value, power calculation of signal real time data, and utilizes the fast fourier transform Real Time harmonic analysis, record each harmonic amplitude;
The protection control module, the data that are used to provide are finished the defencive function of setting;
The software module of being finished by microprocessor has communication and human-computer interaction module;
The flow direction of data in above-mentioned module is that outside real time data enters special IC inside by data acquisition module; Data processing module reads the data that obtain and carries out correlation computations; Protection control is read result of calculation and is finished the protection algorithm.
2. as claimed in claim 1 based on the three-bus structure intelligent monitoring unit special integrated circuit, it is characterized in that, the structure of described interior addressable space is meant, the data that microprocessor need be read and write are stored by buffer zone or register, the design auxiliary circuit encapsulates these unit, all there is unique address number each unit, externally possesses data, address and read-write control three bus interface;
Wherein buffer zone and register comprise:
The real time data buffer zone writes down the real time data in each sampling channel one-period;
Calculate buffer zone, write down each passage effective value, certain subharmonic amplitude, the result of calculation of current power and the measurement result of frequency;
The protection control register is deposited the protection definite value of protecting algorithm.
3. as claimed in claim 1ly it is characterized in that based on the three-bus structure intelligent monitoring unit special integrated circuit method of attachment between described each module is as follows:
Three modules connect successively with data flow architecture in the intelligent monitoring unit special integrated circuit, each module concurrent working, interdepend on data, wherein data flow to next module from a module, adopt a shared buffer zone to store these data between two interconnect modules.
4. as claimed in claim 1ly it is characterized in that the sequential between described each module cooperates as follows based on the three-bus structure intelligent monitoring unit special integrated circuit:
The time of each resume module speed is less than the refresh time of the data of its input data buffer, to guarantee the response data processing in time of each module, makes data flow to next module from a module, to avoid occurring data jamming;
The processing time of data processing module, protection control module is less than the interval time of sampling;
When sampling number increased, FFT was calculated in pointwise during low frequency, and high frequency time calculates FFT every some sampled points.
5. as claimed in claim 1 based on the three-bus structure intelligent monitoring unit special integrated circuit, it is characterized in that, described microprocessor is that the form with soft nuclear or stone is integrated in the embedded microprocessor in the sheet, or at independent microprocessor outside sheet.
6. as claimed in claim 1 based on the three-bus structure intelligent monitoring unit special integrated circuit, it is characterized in that described data acquisition module comprises submodules such as A/D controlling of sampling, frequency measurement and digital frequency multiplication, switching value input buffering, electric degree step-by-step counting; The output of numeral frequency multiplication module is as the sampling trigger pulse of A/D conversion and control module, with the sampling that realizes the periodic signal realization of voltage, electric current is fixedly counted; The data that A/D conversion and control module obtains sampling are delivered in the metadata cache, carry out data processing for data processing module; Deliver to simultaneously in the metadata cache on the brace internal bus, external microprocessor reads the data of sampled point and does further processing or the storage of record ripple.
7. as claimed in claim 1 based on the three-bus structure intelligent monitoring unit special integrated circuit, it is characterized in that, the function sub-modules that described data processing module is handled voltage and current signal by effective value and power calculation, FFT frequency analysis constitutes, and moves under unified data processing controller sequential control; Data processing module is sent The results of data processing into the protection control module, protects judgement, sends into simultaneously in the calculation result data buffer memory to read for external microprocessor and carries out certain processing and demonstration.
8. as claimed in claim 7 based on the three-bus structure intelligent monitoring unit special integrated circuit; it is characterized in that; the definite value that the amplitude that described protection control module is obtained treated real-time first-harmonic or harmonic wave from data processing module is equal to setting compares judgement, determines whether to protect action.
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102778850A (en) * | 2011-05-10 | 2012-11-14 | 株洲南车时代电气股份有限公司 | Input sampling device and method thereof |
| CN102778851A (en) * | 2011-05-10 | 2012-11-14 | 株洲南车时代电气股份有限公司 | Switching quantity output device and method thereof |
| CN105720563A (en) * | 2014-12-05 | 2016-06-29 | 国家电网公司 | Multi-principle relay protection chip based on FPGA and method |
| CN109491487A (en) * | 2018-11-13 | 2019-03-19 | 中国电子科技集团公司第四十七研究所 | Multifunctional power sequencer and monitor chip |
| CN109643481A (en) * | 2016-08-31 | 2019-04-16 | 罗伯特·博世有限公司 | The motion detector that ASIC is realized |
| CN110114768A (en) * | 2016-10-31 | 2019-08-09 | 美商新思科技有限公司 | Power calculation logic |
| CN111523285A (en) * | 2020-04-26 | 2020-08-11 | 伟宸科技（武汉）有限公司 | Design method of circuit for releasing ultralow frequency waves |
-
2007
- 2007-01-26 CN CN 200710017307 patent/CN101021721A/en active Pending
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102778850A (en) * | 2011-05-10 | 2012-11-14 | 株洲南车时代电气股份有限公司 | Input sampling device and method thereof |
| CN102778851A (en) * | 2011-05-10 | 2012-11-14 | 株洲南车时代电气股份有限公司 | Switching quantity output device and method thereof |
| CN102778850B (en) * | 2011-05-10 | 2014-10-08 | 株洲南车时代电气股份有限公司 | Input sampling device and method thereof |
| CN102778851B (en) * | 2011-05-10 | 2015-04-22 | 株洲南车时代电气股份有限公司 | Switching quantity output device and method thereof |
| CN105720563A (en) * | 2014-12-05 | 2016-06-29 | 国家电网公司 | Multi-principle relay protection chip based on FPGA and method |
| CN105720563B (en) * | 2014-12-05 | 2019-07-19 | 国家电网公司 | A kind of more principle relay protection chips and its method based on FPGA |
| CN109643481A (en) * | 2016-08-31 | 2019-04-16 | 罗伯特·博世有限公司 | The motion detector that ASIC is realized |
| CN110114768A (en) * | 2016-10-31 | 2019-08-09 | 美商新思科技有限公司 | Power calculation logic |
| CN110114768B (en) * | 2016-10-31 | 2023-09-08 | 美商新思科技有限公司 | Power calculation logic |
| CN109491487A (en) * | 2018-11-13 | 2019-03-19 | 中国电子科技集团公司第四十七研究所 | Multifunctional power sequencer and monitor chip |
| CN109491487B (en) * | 2018-11-13 | 2022-07-05 | 中国电子科技集团公司第四十七研究所 | Multifunctional power supply sequencer and monitor chip |
| CN111523285A (en) * | 2020-04-26 | 2020-08-11 | 伟宸科技（武汉）有限公司 | Design method of circuit for releasing ultralow frequency waves |
| CN111523285B (en) * | 2020-04-26 | 2023-04-14 | 伟宸科技（武汉）有限公司 | Design method of circuit for releasing ultralow frequency waves |
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