CN100594463C - 为多个电路、集成电路和节点提供定时信号的方法及设备 - Google Patents
为多个电路、集成电路和节点提供定时信号的方法及设备 Download PDFInfo
- Publication number
- CN100594463C CN100594463C CN200680019385A CN200680019385A CN100594463C CN 100594463 C CN100594463 C CN 100594463C CN 200680019385 A CN200680019385 A CN 200680019385A CN 200680019385 A CN200680019385 A CN 200680019385A CN 100594463 C CN100594463 C CN 100594463C
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- nodes
- node
- timing
- circuits
- signal
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/10—Distribution of clock signals, e.g. skew
- G06F1/105—Distribution of clock signals, e.g. skew in which the distribution is at least partially optical
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/10—Distribution of clock signals, e.g. skew
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Information Transfer Systems (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US68588205P | 2005-06-01 | 2005-06-01 | |
| US60/685,882 | 2005-06-01 | ||
| PCT/DK2006/000290 WO2006128459A1 (en) | 2005-06-01 | 2006-05-26 | A method and an apparatus for providing timing signals to a number of circuits, an integrated circuit and a node |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101198920A CN101198920A (zh) | 2008-06-11 |
| CN100594463C true CN100594463C (zh) | 2010-03-17 |
Family
ID=35266833
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200680019385A Active CN100594463C (zh) | 2005-06-01 | 2006-05-26 | 为多个电路、集成电路和节点提供定时信号的方法及设备 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8112654B2 (https=) |
| EP (1) | EP1891497B1 (https=) |
| JP (1) | JP5086993B2 (https=) |
| CN (1) | CN100594463C (https=) |
| WO (1) | WO2006128459A1 (https=) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1891497B1 (en) | 2005-06-01 | 2017-04-19 | Teklatech A/S | A method and an apparatus for providing timing signals to a number of circuits, an integrated circuit and a node |
| US20080109672A1 (en) * | 2006-11-08 | 2008-05-08 | Sicortex, Inc | Large scale computing system with multi-lane mesochronous data transfers among computer nodes |
| EP2026493A1 (en) * | 2007-08-16 | 2009-02-18 | STMicroelectronics S.r.l. | Method and systems for mesochronous communications in multiple clock domains and corresponding computer program product |
| US7995618B1 (en) * | 2007-10-01 | 2011-08-09 | Teklatech A/S | System and a method of transmitting data from a first device to a second device |
| US8677171B2 (en) | 2008-04-14 | 2014-03-18 | Teklatech A/S | Method for controlling the dynamic power signature of a circuit |
| US8885694B2 (en) * | 2009-09-09 | 2014-11-11 | Texas Instruments Incorporated | Changing an operating performance point |
| FR2968787A1 (fr) * | 2010-12-13 | 2012-06-15 | Commissariat Energie Atomique | Dispositif et procede de compensation de delai de propagation d'un signal |
| GB201200219D0 (en) * | 2012-01-09 | 2012-02-22 | Calder Martin | A clock signal generator for a digital circuit |
| US20150078405A1 (en) * | 2013-09-18 | 2015-03-19 | Alcatel Lucent Canada Inc. | Monitoring clock accuracy in asynchronous traffic environments |
| US10481203B2 (en) * | 2015-04-04 | 2019-11-19 | Nvidia Corporation | Granular dynamic test systems and methods |
| US10444280B2 (en) | 2015-10-27 | 2019-10-15 | Nvidia Corporation | Independent test partition clock coordination across multiple test partitions |
| US12530047B2 (en) | 2022-08-19 | 2026-01-20 | Tesla, Inc. | Track plan to improve clock skew |
| US20260056572A1 (en) * | 2022-08-19 | 2026-02-26 | Tesla, Inc. | Clock distribution with clock offsets |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6594772B1 (en) * | 2000-01-14 | 2003-07-15 | Hewlett-Packard Development Company, L.P. | Clock distribution circuitry to different nodes on integrated circuit with clock coupling circuitry to maintain predetermined phase relation between output and input of adjacent nodes |
Family Cites Families (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2829793A1 (de) | 1978-07-06 | 1980-01-17 | Siemens Ag | Steuersatz fuer einen stromrichter |
| US4514840A (en) | 1982-12-29 | 1985-04-30 | Te Ka De Felten & Guilleaume Fernmeldeanlagen Gmbh | Data transmission systems for full duplex communication |
| FR2565752B1 (fr) * | 1984-06-08 | 1986-09-05 | Radiotechnique Compelec | Circuit d'interface du type esclave fonctionnant avec un bus serie |
| JPH0758458B2 (ja) | 1988-07-21 | 1995-06-21 | 三菱電機株式会社 | データ転送装置及びそれを使用したパイプライン処理装置 |
| US5163068A (en) * | 1991-02-22 | 1992-11-10 | El Amawy Ahmed | Arbitrarily large clock networks with constant skew bound |
| JPH04306917A (ja) * | 1991-04-03 | 1992-10-29 | Mitsubishi Electric Corp | クロック分配装置 |
| US5305277A (en) | 1991-04-24 | 1994-04-19 | International Business Machines Corporation | Data processing apparatus having address decoder supporting wide range of operational frequencies |
| TW198159B (https=) | 1991-05-31 | 1993-01-11 | Philips Gloeicampenfabrieken Nv | |
| US5264739A (en) * | 1991-10-16 | 1993-11-23 | Acraloc Corporation | Two-handed controller for preventing trigger tie-down |
| US5521499A (en) * | 1992-12-23 | 1996-05-28 | Comstream Corporation | Signal controlled phase shifter |
| DE4339303A1 (de) | 1993-11-18 | 1995-05-24 | Bosch Gmbh Robert | Phasenmeßvorrichtung |
| US5463337A (en) * | 1993-11-30 | 1995-10-31 | At&T Corp. | Delay locked loop based clock synthesizer using a dynamically adjustable number of delay elements therein |
| JP2752912B2 (ja) | 1995-02-10 | 1998-05-18 | 福島日本電気株式会社 | バースト信号検出回路 |
| US5748642A (en) * | 1995-09-25 | 1998-05-05 | Credence Systems Corporation | Parallel processing integrated circuit tester |
| US5808486A (en) * | 1997-04-28 | 1998-09-15 | Ag Communication Systems Corporation | Glitch free clock enable circuit |
| JP3111936B2 (ja) | 1997-09-10 | 2000-11-27 | 日本電気株式会社 | 同期回路 |
| US6747997B1 (en) | 2000-06-13 | 2004-06-08 | Intel Corporation | Network channel receiver architecture |
| US6346828B1 (en) | 2000-06-30 | 2002-02-12 | Intel Corporation | Method and apparatus for pulsed clock tri-state control |
| US7571359B2 (en) * | 2000-07-31 | 2009-08-04 | Massachusetts Institute Of Technology | Clock distribution circuits and methods of operating same that use multiple clock circuits connected by phase detector circuits to generate and synchronize local clock signals |
| US7856543B2 (en) | 2001-02-14 | 2010-12-21 | Rambus Inc. | Data processing architectures for packet handling wherein batches of data packets of unpredictable size are distributed across processing elements arranged in a SIMD array operable to process different respective packet protocols at once while executing a single common instruction stream |
| IL157508A0 (en) * | 2001-02-24 | 2004-03-28 | Ibm | Global interrupt and barrier networks |
| US6593793B1 (en) | 2002-01-11 | 2003-07-15 | Intel Corporation | Electronic package with integrated clock distribution structure |
| US6943610B2 (en) * | 2002-04-19 | 2005-09-13 | Intel Corporation | Clock distribution network using feedback for skew compensation and jitter filtering |
| US7239669B2 (en) | 2002-04-30 | 2007-07-03 | Fulcrum Microsystems, Inc. | Asynchronous system-on-a-chip interconnect |
| JP3867653B2 (ja) * | 2002-10-22 | 2007-01-10 | 日本電気株式会社 | 半導体集積回路 |
| US6911854B2 (en) | 2003-07-30 | 2005-06-28 | Sun Microsystems, Inc. | Clock skew tolerant clocking scheme |
| EP1891497B1 (en) | 2005-06-01 | 2017-04-19 | Teklatech A/S | A method and an apparatus for providing timing signals to a number of circuits, an integrated circuit and a node |
| US7403055B2 (en) | 2005-08-31 | 2008-07-22 | Infineon Technologies Ag | Duty cycle detector with first and second oscillating signals |
| US7724100B2 (en) | 2007-01-31 | 2010-05-25 | Infineon Technologies Austria Ag | Oscillator structure |
-
2006
- 2006-05-26 EP EP06722960.9A patent/EP1891497B1/en active Active
- 2006-05-26 US US11/921,309 patent/US8112654B2/en active Active
- 2006-05-26 JP JP2008513927A patent/JP5086993B2/ja active Active
- 2006-05-26 CN CN200680019385A patent/CN100594463C/zh active Active
- 2006-05-26 WO PCT/DK2006/000290 patent/WO2006128459A1/en not_active Ceased
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6594772B1 (en) * | 2000-01-14 | 2003-07-15 | Hewlett-Packard Development Company, L.P. | Clock distribution circuitry to different nodes on integrated circuit with clock coupling circuitry to maintain predetermined phase relation between output and input of adjacent nodes |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101198920A (zh) | 2008-06-11 |
| JP2008543188A (ja) | 2008-11-27 |
| EP1891497B1 (en) | 2017-04-19 |
| US8112654B2 (en) | 2012-02-07 |
| JP5086993B2 (ja) | 2012-11-28 |
| WO2006128459A1 (en) | 2006-12-07 |
| EP1891497A1 (en) | 2008-02-27 |
| US20080276116A1 (en) | 2008-11-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20190212 Address after: American California Patentee after: Cinnosi Company Address before: Danish spirits Patentee before: Teklatech APS |