CN100576518C - A kind of glued membrane and use the chip encapsulating manufacturing procedure of this glued membrane - Google Patents
A kind of glued membrane and use the chip encapsulating manufacturing procedure of this glued membrane Download PDFInfo
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- CN100576518C CN100576518C CN200610165692A CN200610165692A CN100576518C CN 100576518 C CN100576518 C CN 100576518C CN 200610165692 A CN200610165692 A CN 200610165692A CN 200610165692 A CN200610165692 A CN 200610165692A CN 100576518 C CN100576518 C CN 100576518C
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
- H01L2224/2743—Manufacturing methods by blanket deposition of the material of the layer connector in solid form
- H01L2224/27436—Lamination of a preform, e.g. foil, sheet or layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
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Abstract
A kind of glued membrane comprises removable base material, resin bed and plural circular arc elastomer.This resin bed is the semi-solid preparation resin, and it is the semi-molten state of tool stickiness more than first temperature, and it is not have the solid-state of stickiness below second temperature, and this resin bed is glutinous to be located on this base material; These circular arc elastomers are disposed in this resin bed.The present invention provides a kind of chip encapsulating manufacturing procedure that uses this glued membrane in addition.
Description
Technical field
The present invention relates to a kind of glued membrane, particularly relate to employed glued membrane in a kind of chip encapsulating manufacturing procedure.
Background technology
In the packaging structure of the chip stack of usefulness, as shown in Figure 1, this packaging structure comprises substrate 10, lower floor's chip 20, illusory chip (dummy die) 30 and upper strata chip 40.This lower floor's chip 20 is to be fixed on this substrate 10 by viscose 22, and the both sides of the edge of the upper surface of this lower floor's chip 20 are provided with a plurality of aluminium connection pads 24, and it is a plurality of connection pads 12 that are electrically connected at this substrate 10 by a plurality of first bonding wires 26.This illusory chip 30 is to be fixed on this lower floor's chip 20 by viscose 32, and defines the required space of this first bonding wire 26, the height that for example about 5mils (1mil=25.4 micron) is above.This upper strata chip 40 is to be fixed on this illusory chip 30 by viscose 42, and the upper surface 48 of this upper strata chip 40 is provided with a plurality of aluminium connection pads 44, it is these a plurality of connection pads 12 that are electrically connected at this substrate 10 by a plurality of second bonding wires 46, and two chips the 20, the 40th like this are stacked on this substrate 10.Yet the cost of this packaging structure processing procedure time higher and encapsulation is longer.Moreover the coefficient of expansion of this illusory chip and this viscose is not match, and therefore the structural stress of the combination interface of this illusory chip and this viscose can increase after sealing is handled, and then produces the yield that chip splits (die crack) and reduces encapsulation.The yield of this encapsulation generally is about between 30% and 40%.
In the packaging structure of another kind of chip stack, as shown in Figure 2, this packaging structure comprises substrate 110, first chip 120, non-conductive adhesive 130, second chip 140 and a plurality of fulcrum ball 132.This first chip 120 has relative upper surface and lower surface, and this lower surface is to be fixed on this substrate 110.This non-conductive adhesive 130 is to be disposed on the upper surface of this first chip 120.This second chip 140 has relative upper surface and lower surface, wherein this lower surface is to be fixed on the upper surface of this first chip 120 by this non-conductive adhesive 130, this plural number fulcrum ball 132 is to be disposed in this non-conductive adhesive 130, and supports this second chip 140.Though this kind packaging structure by the area that sticks together that increases non-conductive adhesive and chip chamber, is concentrated with the structural stress that decreases in after sealing is handled, thereby can be avoided chip to split, and utilize plural fulcrum ball to define the required space of bonding wire.Yet, this non-conductive adhesive 130 needs coating when sticking brilliant (die attach) each time, not only increase the processing procedure time of encapsulation, and because non-conductive adhesive 130 is liquid, thereby the gel quantity of each coating is wayward, still causes this second chip 140 phenomenon that tilts to occur easily when sticking together.
In addition, the encapsulation procedure of the chip stack that another kind is known, (encapsulation procedure of the unidimensional storehouse of multicore sheet) as Taiwan patent I240392 number, it is to form the semi-solid preparation resin at the back side of wafer, again this wafer is cut into a plurality of first chips, with the first chip gluing that wherein has the semi-solid preparation resin active surface to the substrate or second chip, a plurality of bonding wires are to electrically connect this first chip and this substrate; When first chip binds the storehouse of second chip, be melted by heating and wrap attached these bonding wires at this semi-solid preparation resins of two chip chambers, but make the how unidimensional chip of storehouse in package thickness.Though utilizing this semi-solid preparation resin can avoid being coated with when sticking crystalline substance to shorten the processing procedure time at every turn, but because this semi-solid preparation resin forms molten state after heating, when glutinous brilliant stress is excessive, have the problem of the height that can't keep this first chip and this substrate or second chip chamber, and make this first chip touch bonding wire thereby reduction process rate.
For these reasons, it still is necessary further to improve the packaging structure of said chip storehouse really, to solve the problem in the above-mentioned known technology.
Summary of the invention
One of the object of the invention provides a kind of glued membrane and uses the chip encapsulating manufacturing procedure of this glued membrane, and it can increase the area that sticks together of glued membrane and chip chamber, concentrates with the stress that reduces after sealing is handled, and has the effect of avoiding chip to split.
Another purpose of the present invention provides a kind of glued membrane and uses the chip encapsulating manufacturing procedure of this glued membrane, and it is to support a chip, in order to define the required space of bonding wire or assembly by the plural circular arc elastomer of configuration in a glued membrane.
Still a further object of the present invention provides a kind of glued membrane and uses the chip encapsulating manufacturing procedure of this glued membrane, and it is by sticking a glued membrane on wafer, and avoids each glutinous coating viscose when brilliant again, makes to shorten the processing procedure time.
Still a further object of the present invention provides a kind of glued membrane and uses the chip encapsulating manufacturing procedure of this glued membrane, because glued membrane has fixed volume and height, thereby can avoid highly uppity problem when glutinous crystalline substance, makes to increase process rate.
For reaching above-mentioned purpose, glued membrane of the present invention mainly comprises removable base material, resin bed and plural circular arc elastomer.This resin bed is the semi-solid preparation resin, and it is the semi-molten state of tool stickiness more than first temperature, and it is not have the solid-state of stickiness below second temperature, and this resin bed is glutinous to be located on this base material; These circular arc elastomers are disposed in this resin bed.
The present invention provides a kind of chip encapsulating manufacturing procedure in addition, it utilizes glued membrane as the chip adhesion material, this glued membrane is formed by semi-solid preparation resin layers base material, and in this resin bed, dispose plural circular arc elastomer, this chip encapsulating manufacturing procedure comprises the following step: semiconductor crystal wafer is provided, it has the active surface and the back side, is formed with a plurality of connection pads within this active surface; Form the back side of this glued membrane at this wafer; Cut this wafer to form plural chip, wherein, stick at the back side of these chips this glued membrane; Remove the base material of the glued membrane of first chip back in these chips; And the resin bed that will be positioned at this first chip back is glutinous is located on the supporting body; Therefore, make between this first chip and this supporting body by these circular arc elastomers and define a pre-set space.
Description of drawings
Fig. 1 is the packaging structure of the chip stack used always;
Fig. 2 is the packaging structure of another chip stack commonly used;
Fig. 3 a is the schematic diagram of the glued membrane of first embodiment of the invention;
Fig. 3 b is the schematic diagram of the glued membrane of second embodiment of the invention;
Fig. 3 c figure is the schematic diagram of the glued membrane of third embodiment of the invention;
Fig. 4 is the flow chart of chip encapsulating manufacturing procedure that utilizes the glued membrane of the embodiment of the invention;
Fig. 5 a-5f is the schematic cross-section of chip encapsulating manufacturing procedure that utilizes the glued membrane of the embodiment of the invention, and wherein this supporting body is a substrate;
Fig. 6 a-6b is another schematic cross-section of chip encapsulating manufacturing procedure that utilizes the glued membrane of the embodiment of the invention, and wherein this supporting body is a chip;
The reference numeral explanation
10 substrates, 12 connection pads
20 lower floor's chips, 22 viscoses
24 aluminium connection pads, 26 first bonding wires
30 illusory chip 40 upper strata chips
42 viscoses, 44 aluminium connection pads
46 second bonding wires, 48 upper surfaces
110 substrates, 120 first chips
130 non-conductive adhesives, 132 fulcrum balls
140 second chips 3,3 ', 3 " glued membranes
32 base materials, 34 resin beds
36 circular arc elastomers, 361 small size spherosomes
362 large scale spherosomes, 363 spheroids
42 wafer 42a active surfaces
The 42b back side 421 connection pads
422 first chips, 44 wafer carrying platforms
52 supporting bodies, 522 assemblies
524 first bonding wires, 526 second bonding wires
60 adhesive body UV ultraviolet lights
90 grinding wafer instruments, 92 cutter
94 choose and placing device 201-207 step
Embodiment
For allow above and other objects of the present invention, feature and advantage can be more obvious, the embodiment of the invention cited below particularly, and cooperate institute's accompanying drawing is described in detail below.
Shown in Fig. 3 a, disclose the glued membrane (film) 3 of first embodiment of the invention, it comprises removable base material 32, resin bed 34 and plural circular arc elastomer 36 and is disposed in this resin bed 34.This glued membrane 3 is to be used for semiconductor chip package procedure, as the adhesive material of chip.The embodiment of this base material 32 can be BT substrate (BT substrate) or adhesive tape (tape); When it was the BT substrate, it can utilize epoxy resin (epoxy) to combine with this resin bed 34; When it is adhesive tape, can be ultraviolet irradiation adhesive tape (UV tape) or blue adhesive tape (blue tape), and have pliability.Combination is mixed with the resin bed 34 of this circular arc elastomer 36 on this base material 32.In order to be applicable to the encapsulation procedure of chip, this base material 32 must can bear the high temperature of 85 degree Celsius at least.
A kind of embodiment of this resin bed 34 can be the semi-solid preparation resin, the resin that mixes by epoxy resin (epoxyresin) and phenol resin (phenol resin) for example, it preferable when normal temperature (for example Celsius 45 degree following) be solid-state and do not have a stickiness, and when high temperature, be semi-molten state when (for example Celsius 85 spend more than) and have stickiness; It is made that this circular arc elastomer 36 is preferably heat-resisting material, rubber for example, it comprises the spherosome of two kinds of different-diameters, it is respectively small size spherosome 361 and large scale spherosome 362, this small size spherosome 361 is in order to this large scale spherosome 362 of interval, and its number is preferably less than 20% of whole circular arc elastomer numbers; This large scale spherosome 362 is in order in the encapsulation procedure of semiconductor chip, defines the height of bonding wire or passive component, thereby its diameter is preferably and is at least 3 to 8mils.In the present embodiment, the thickness of this resin bed 34 must be greater than the diameter of this large scale spherosome 362, and be preferably greater than 4 to 10 microns (micro meter), so that be heated and when forming semi-molten state, allow these circular arc elastomers 36 in this resin bed 34, to arrange uniformly again when this resin bed 34.This resin bed 34 is preferably with non-conducting material made with these circular arc elastomers 36.
Shown in Fig. 3 b, disclose the glued membrane 3 of second embodiment of the invention ', mandatory declaration be in the present embodiment, the assembly identical with first embodiment is with identical symbolic representation.The difference of the present embodiment and first embodiment is, this circular arc elastomer 36 is except that comprising small size spherosome 361 and large scale spherosome 362, other comprises plural spheroid 363, its major axis is preferably the diameter that is equal to this large scale spherosome 362, the detailed description of its function will be described in following paragraph, the thickness of this resin bed 34 must be greater than the diameter of this large scale spherosome 362, and is preferably greater than 4 to 10 microns (micro meter).In the present embodiment, it is made that these these circular arc elastomers 36 are similarly heat-resisting material, and for example rubber, and this resin bed 34 and these circular arc elastomers 36 are made with non-conducting material equally.
Shown in Fig. 3 c, disclose the glued membrane 3 of third embodiment of the invention ", in the present embodiment, the assembly identical with first embodiment is with identical symbolic representation.The difference of present embodiment and first and second embodiment is, this circular arc elastomer 36 is to be unidimensional spherosome (for example large scale spherosome 362 of first and second embodiment), it is used for chip encapsulating manufacturing procedure equally, define the height of bonding wire or passive component, thereby its diameter is preferably and is at least 3 to 8mils.In present embodiment, the thickness of this resin bed 34 equally must be greater than the diameter of this circular arc elastomer 36, and is preferably greater than 4 to 10 microns.It is made that these circular arc elastomers 36 of present embodiment are preferably heat-resisting material, and for example rubber, and this resin bed 34 and these circular arc elastomers 36 are made with non-conducting material.
Shown in Fig. 4, Fig. 5 a to 5f and Fig. 6 a to 6b, announcement utilizes this glued membrane 3,3 of various embodiments of the present invention ' or 3 " at the flow chart and the schematic diagram thereof of chip encapsulating manufacturing procedure; wherein; be the glued membrane 3,3 that utilizes various embodiments of the present invention ' or 3 " as the chip adhesive material, this chip encapsulating manufacturing procedure comprises the following step: the semiconductor wafer is provided, it has the active surface and the back side, is formed with plural connection pad (step 201) on this active surface; Form glued membrane at the back side of this wafer (step 202); Cut this wafer, to form plural chip, wherein stick at the back side of these chips this glued membrane (step 203); Remove the base material (step 204) of the glued membrane of first chip back in this chip; To be positioned at that the resin bed of this first chip back is glutinous to be located at (step 205) on the supporting body, and therefore, make between this first chip and this supporting body by these circular arc elastomers to define pre-set space; Electrically connect this chip and supporting body (step 206); And seal (step 207) with adhesive body.In addition, mandatory declaration is that in the explanation of following each figure, identical inter-module is to represent with identical label.
Shown in Fig. 4 and Fig. 5 a, in chip encapsulating manufacturing procedure of the present invention, the first step is for providing semiconductor crystal wafer (wafer) 42, and it has active surface 42a and back side 42b, has plural connection pad 421 (step 201) on this active surface 42a.The active surface 42a of this wafer 42 is placed on the wafer carrying platform 44, and utilizes grinding wafer instrument 90 to grind the back side 42b of this wafer 42, be ground to predetermined thickness with the thickness with this wafer, this predetermined thickness is normally more than the 1mil.
Shown in Fig. 4 and Fig. 5 b, after this wafer 42 is ground to above-mentioned predetermined thickness, follow this glued membrane 3 ' glutinous back side (step 202) that is located at this wafer 42 with various embodiments of the present invention." the encapsulation procedure that is carried out similarly, narration no longer in detail in this article that must be noted that in the explanation of Fig. 5 a to 5f, is this mould material 3 ' describe with second embodiment of the invention, and uses the mould material 3 or 3 of other embodiment of the present invention.As previously mentioned, since this glued membrane 3 ' when normal temperature (below 45 degree Celsius), be solid-state, must place it in curing oven (curing oven) is heated to high temperature (for example Celsius 85 degree more than) time and just presents molten state and have stickiness, thereby desire is with this glued membrane 3 ' when being attached on this wafer 42, must be earlier through heat treated, but for avoiding this glued membrane 3 ' overreact, in this heating process, only heat the very short time, its time length depends on the time that makes this glued membrane 3 ' present semi-molten state and can be attached on this wafer 42, for example 2 seconds.
Shown in Figure 4 and 5 c, then cut this wafer 42 with cutter 92 (dicing blade), to form plural chip, and suppose that one of them chip is first chip 422, thereby the back side of these chips (comprising this first chip 422) all stick this glued membrane 3 is arranged ', and the active surface of each chip all has plural connection pad 421 (step 203).Wherein, the embodiment of these chips can be memory chip, microprocessor, logic chip or the radio frequency chip etc. of DRAM (Dynamic Random Access Memory) (DRAM), static random access memory (SRAM), flash memory (Flash), double data storage (DDR) or Rambus internal memory etc.
Shown in Figure 4 and 5 d, before this first chip 422 is arranged on bearing part, must be earlier with this glued membrane 3 ' base material 32 remove (step 204); If this base material 32 is the UV-irradiation adhesive tape, then must will can removes behind this base material 32 irradiating ultraviolet light UV, but, then can directly remove if this base material 32 is blue adhesive tape (blue tape) or BT substrate.Then utilize automation to choose and placing device 94 is placed on predetermined supporting body 52 with this first chip 422.
Shown in Fig. 5 e, then with this first chip 422 via this glued membrane 3 ' be arranged on the supporting body 52 (step 205), in various embodiments of the present invention, this supporting body 52 can be substrate, lead frame or chip (second chip), and when the resin bed 34 of desiring to make these first chip, 422 back sides is attached on this supporting body 52, also necessary short time heating through high temperature for example is heated to more than 85 degree Celsius and through 2 seconds, then this first chip 422 can stick on this supporting body 52 in advance.When this supporting body 52 is substrate, the glued membrane 3 of preferable use second embodiment of the invention ' as the adhesion material of this first chip 422, that is these circular arc elastomers comprise plural small size spherosome 361, large scale spherosome 362 and spheroid 363, these large scale spherosomes 362 and spheroid 363 are behind these small size spherosome 361 intervals, when resin bed 34 is desired to be attached on this supporting body 52, because this resin bed 34 is through adding thermosetting half melting attitude, 363 of these large scale spherosomes 362 and spheroids can move freely therein to avoid the assembly 522 on this supporting body 52 easily, passive component for example, and can define the required height of these assemblies 522 by this large scale spherosome 362, when if this spheroid 363 just is positioned at the top of these assemblies 522, because these spheroid 363 surfaces are circular-arc, it also can be by rotation direction, shown in Fig. 5 e, and make being arranged on this supporting body 52 that this first chip 422 can level.Therefore, even the stress when glutinous brilliant is excessive, also can keep glutinous brilliant evenness via these large scale spherosomes 362.Then just can utilize plural first bonding wire 524 to electrically connect connection pad 421 and this supporting body 52 (step 206) of this first chip 422.
Shown in Fig. 5 f, at last again with adhesive body 60 this first chip 422 of sealing and this first bonding wires 524, and place one period long period of heating in the curing oven (not shown), above and the time remaining of 85 degree for example Celsius 120 seconds, stick in advance this moment at the resin bed 34 of this supporting body 52 through complete reaction then after these steps, so that this supporting body 52 binds fully with resin bed 34, and finish chip encapsulating manufacturing procedure of the present invention (step 207).
Shown in Fig. 6 a, when this supporting body 52 is chip (second chip), usually be provided with plural second bonding wire 526 on this second chip and it is arranged on substrate or the lead frame, can select to use the adhesion material of the glued membrane 3 of first embodiment of the invention this moment as this first chip 422, that is these circular arc elastomers comprise plural small size spherosome 361 and large scale spherosome 362, these large scale spherosomes 362 are behind these small size spherosome 361 intervals, when resin bed 34 is desired to be attached on this supporting body 52, because this resin bed 34 is through adding thermosetting half melting attitude, 362 of these large scale spherosomes can move therein avoiding second bonding wire 526 on this supporting body 52 easily, and can define the required height of this second bonding wire 526 by this large scale spherosome 362.Therefore, even the stress when glutinous brilliant is excessive, also can keep glutinous brilliant evenness via these large scale spherosomes 362.Then just can utilize plural first bonding wire 524 to electrically connect connection pad 421 and this substrate or the lead frame (step 206) of this first chip 422.In addition, when this supporting body 52 is chip, still can use the glued membrane 3 of second embodiment of the invention ' and the 3rd embodiment glued membrane 3 " as the adhesion material of this first chip 422.
Shown in Fig. 6 b, at last equally with adhesive body 60 these first chips 422 of sealing, first bonding wire 524, supporting body 52 and second bonding wire 526, and be placed on (demonstration) one period long period of heating in the curing oven, above and the time remaining of 85 degree for example Celsius 120 seconds, stick in advance this moment at the resin bed 34 of this supporting body 52 through complete reaction then after these steps, so that this supporting body 52 binds fully with resin bed 34, and finish chip encapsulating manufacturing procedure of the present invention (step 207).
As implied above, have the problem that chip splits and the processing procedure time is long with the packaging structure of chip stack because of shown in Figure 1, and structure shown in Figure 2 is wayward because of the gel quantity with viscose, so can cause the glutinous problem that occurs inclination when brilliant.The packaging structure of using chip stack compared to Fig. 1 and Fig. 2, the glued membrane of various embodiments of the present invention (shown in Fig. 3 a-3c) is by the plural circular arc elastomer of configuration in these glued membranes, and supporting chip, can be in order to defining the required space of bonding wire or assembly, and can shorten the processing procedure time of encapsulation.
Though the present invention discloses with aforementioned preferred embodiment, yet it is not in order to limiting the present invention, anyly is familiar with the present technique personnel, without departing from the spirit and scope of the present invention, should do various changes and modification.Therefore protection scope of the present invention should with accompanying Claim the person of being defined be as the criterion.
Claims (37)
1. glued membrane comprises:
Removable base material;
Resin bed, glutinous being located on this base material, this resin bed is the semi-solid preparation resin, is the semi-molten state of tool stickiness more than first temperature, and this resin bed is not have the solid-state of stickiness below second temperature; And
Plural number circular arc elastomer is configured in this resin bed.
2. glued membrane according to claim 1, wherein, this base material is the BT substrate.
3. glued membrane according to claim 1, wherein, this base material has pliability.
4. glued membrane according to claim 1, wherein, this base material is ultraviolet irradiation adhesive tape or blue adhesive tape.
5. glued membrane according to claim 1, wherein, this first temperature is 85 degree Celsius.
6. glued membrane according to claim 1, wherein, this second temperature is 45 degree Celsius.
7. glued membrane according to claim 1, wherein, this circular arc elastomer comprises the spherosome of two kinds of different-diameters, and it is respectively large scale spherosome and small size spherosome.
8. glued membrane according to claim 7, wherein, this small size spherosome is in order to this large scale spherosome of interval.
9. glued membrane according to claim 7, wherein, this resin bed defines a thickness, and the thickness of this resin bed is greater than the diameter of this large scale spherosome.
10. glued membrane according to claim 9, wherein the thickness of this resin bed is greater than 4 to 10 microns of the diameters of this large scale spherosome.
11. glued membrane according to claim 7, wherein, the number of this small size spherosome is less than 20% of whole circular arc elastomer numbers.
12. glued membrane according to claim 1, wherein, this circular arc elastomer comprises the spherosome and the plural spheroid of two kinds of different-diameters, and the spherosome of this different-diameter is respectively large scale spherosome and small size spherosome.
13. glued membrane according to claim 12, wherein, the long axis length of these spheroids equals the diameter of this large scale spherosome.
14. glued membrane according to claim 13, wherein, this resin bed defines a thickness, and wherein the thickness of this resin bed is greater than the diameter of this large scale spherosome.
15. glued membrane according to claim 14, wherein, the thickness of this resin bed is greater than 4 to 10 microns of the diameters of this large scale spherosome.
16. glued membrane according to claim 12, wherein, this small size spherosome is in order to this large scale spherosome of interval and this spheroid.
17. glued membrane according to claim 12, wherein, the number of this small size spherosome is less than 20% of whole circular arc elastomer numbers.
18. glued membrane according to claim 1, wherein, this circular arc elastomer is that heat-resisting material is made.
19. glued membrane according to claim 18, wherein, this circular arc elastomer is that rubber is made.
20. glued membrane according to claim 1, wherein, this circular arc elastomer and resin bed are non-conducting material.
21. glued membrane according to claim 1, wherein, this base material can bear 85 degree Celsius temperatures at least.
22. glued membrane according to claim 1, wherein, this circular arc elastomer is the spherosome of same size.
23. glued membrane according to claim 22, wherein, this resin bed defines a thickness, and wherein the thickness of this resin bed is greater than 4 to 10 microns of the diameters of this spherosome.
24. chip encapsulating manufacturing procedure, it utilizes glued membrane as the chip adhesion material, this glued membrane is formed by the resin layers base material, this resin bed is the semi-solid preparation resin, it more than first temperature semi-molten state of tool stickiness, in addition be not have the solid-state of stickiness below second temperature, and dispose plural circular arc elastomer in this resin bed, this chip encapsulating manufacturing procedure comprises following steps:
Semiconductor crystal wafer is provided, has the active surface and the back side, be formed with a plurality of connection pads within this active surface;
Form the back side of this glued membrane at this wafer;
Cut this wafer and form plural chip, wherein stick at the back side of these chips this glued membrane;
Remove the base material of the glued membrane of first chip back in these chips; And
To be positioned at glutinous being located on the supporting body of resin bed of this first chip back;
Therefore, make between this first chip and this supporting body by these circular arc elastomers and define pre-set space.
25. chip encapsulating manufacturing procedure according to claim 24, wherein, in the step of semiconductor crystal wafer was provided, this semiconductor crystal wafer was milled to predetermined thickness in advance.
26. chip encapsulating manufacturing procedure according to claim 24, wherein, in the base material step of the glued membrane of removing these chip backs, if this glued membrane is the UV-irradiation adhesive tape, then remove this base material and comprise the following step in addition before: irradiating ultraviolet light is in this base material.
27. chip encapsulating manufacturing procedure according to claim 24 wherein, is forming this glued membrane in the back side of this wafer step, other comprises the following steps: to heat this more than glued membrane to the first temperature, so that the glutinous back side of being located at this wafer of this glued membrane.
28. chip encapsulating manufacturing procedure according to claim 24, wherein, this supporting body is substrate, lead frame or second chip.
29. chip encapsulating manufacturing procedure according to claim 24 wherein, was established this first chip before the supporting body step glutinous, other comprises the following step:
Heat this more than glued membrane to the first temperature.
30. according to claim 27 or 29 described chip encapsulating manufacturing procedures, wherein, this first temperature is 85 degree Celsius.
31. chip encapsulating manufacturing procedure according to claim 29, wherein, be 2 seconds this heating time.
32. chip encapsulating manufacturing procedure according to claim 24, wherein, this circular arc elastomer comprises the spherosome of two kinds of different-diameters, and it is respectively large scale spherosome and small size spherosome.
33. chip encapsulating manufacturing procedure according to claim 32, wherein, in the glutinous step of being located on the supporting body of the resin bed that will be arranged in this first chip back, this supporting body is that second chip and this second chip are provided with plural second connection pad and second bonding wire, this supporting body is arranged on the substrate, this large scale spherosome has a preset diameters, to define the required space of this second bonding wire.
34. chip encapsulating manufacturing procedure according to claim 33, wherein, other comprises the following step:
Electrically connect this first chip and this substrate with plural first bonding wire; And
Seal this first chip, first bonding wire, second chip and second bonding wire with adhesive body.
35. chip encapsulating manufacturing procedure according to claim 24, wherein, this circular arc elastomer comprises the spherosome and the plural spheroid of two kinds of different-diameters, the spherosome of this different-diameter is respectively large scale spherosome and small size spherosome, and the long axis length of these spheroids equals the diameter of this large scale spherosome.
36. chip encapsulating manufacturing procedure according to claim 35, wherein, in the glutinous step of being located on the supporting body of the resin bed that will be arranged in this first chip back, this supporting body is that substrate and this substrate are provided with a plurality of passive components, this large scale spherosome has a preset diameters, in order to define the required space of these passive components.
37. chip encapsulating manufacturing procedure according to claim 36, wherein, other comprises the following step:
Electrically connect this chip and this substrate with plural first bonding wire; And
Seal this first chip and this first bonding wire with adhesive body.
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| CN200610165692A CN100576518C (en) | 2006-12-12 | 2006-12-12 | A kind of glued membrane and use the chip encapsulating manufacturing procedure of this glued membrane |
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| CN200610165692A CN100576518C (en) | 2006-12-12 | 2006-12-12 | A kind of glued membrane and use the chip encapsulating manufacturing procedure of this glued membrane |
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| CN100576518C true CN100576518C (en) | 2009-12-30 |
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| CN103167649B (en) * | 2011-12-10 | 2015-10-28 | 江阴市霖肯科技有限公司 | The sealing technology of Far infrared electric heating air conditioner euthermic chip |
| CN104387601B (en) * | 2014-11-06 | 2017-02-08 | 东莞市德聚胶接技术有限公司 | UV (ultraviolet) epoxy resin instillation forming method and application thereof |
| CN111422819B (en) * | 2020-03-30 | 2023-05-30 | 歌尔微电子股份有限公司 | Sensor packaging structure, packaging method thereof and electronic equipment |
| CN112635412A (en) * | 2020-12-21 | 2021-04-09 | 苏州日月新半导体有限公司 | Semiconductor structure and method for manufacturing semiconductor structure |
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