CN100555220C - Multicomputer system and collocation method thereof - Google Patents
Multicomputer system and collocation method thereof Download PDFInfo
- Publication number
- CN100555220C CN100555220C CNB2006101320093A CN200610132009A CN100555220C CN 100555220 C CN100555220 C CN 100555220C CN B2006101320093 A CNB2006101320093 A CN B2006101320093A CN 200610132009 A CN200610132009 A CN 200610132009A CN 100555220 C CN100555220 C CN 100555220C
- Authority
- CN
- China
- Prior art keywords
- computer system
- connector
- output
- basic input
- level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Multi Processors (AREA)
Abstract
The invention provides a kind of multicomputer system and collocation method thereof, wherein multicomputer system includes: one first computer system has one first connector and one first basic input/output; One second computer system has one second connector and one second basic input/output that can be connected with this first connector; One switch is connected to the first pin position of this first connector, sets an operator scheme of this multicomputer system in order to selectivity; And a high complexity programmable logic element, it is serially connected with between this switch and this first basic input/output, according to the level decision operator scheme that this switch transmitted.The present invention is applicable to that a plurality of computer systems of configuration carry out joint operation, can connect each computer system and utilize switch to carry out the operator scheme of independent operation separately or joint operation to select each computer system system.
Description
Technical field
The present invention is about a kind of collocation method of computer system, and the collocation method of a plurality of computer system independent operations or joint operation is controlled and set to particularly a kind of alternative.
Background technology
Progress along with the information guiding society of high development, the growth of the data processing amount of data processing equipments such as computer system has the trend of quick increase, and it is more complicated and highly advanced that the content of data processing has become, and therefore, computer system needs more powerful data-handling capacity.
But, in recent years, the speed of the demand that strengthens data-handling capacity has been surpassed the speed of highly improving processor performance, because the exploitation high-performance processor needs more time, so be difficult to realize the high performance improvement of processor in the short time.Traditionally, as single CPU (central processing unit) (CPU; CentralProcessing Unit) and so on the motherboard of processor can't satisfy the application of computer system now.For this reason, and a kind of multiprocessor computer system appears, so that improve whole data-handling capacity.Multiprocessor computer system, comprise a plurality of interconnected processors, one item number can be divided into a plurality of tasks according to work of treatment, can be divided the work to handle by the individual processor in this computer system, can improve the data-handling capacity of traditional single processor significantly.Current, the known computer system that two processors and four processors are arranged, even the present trend that more has towards the multiprocessor computer system development of eight processors or 16 processors.
The collocation method of known multiprocessor computer system is to utilize the processor extended mode, that is, be provided with on the motherboard of at least one processor (CPU Board), another circuit board with at least one processor is arranged in an expansion slot of this motherboard, thereby make this motherboard be expanded into the computer system of multiprocessor, wherein, the circuit board of this expansion must be arranged in this motherboard and can operate, but and be not be one the cover independent operation system, hence one can see that, though can realize the operating function of multiprocessor computer system when this motherboard combines with this circuit board, but when this circuit board is not arranged in this motherboard, this circuit board can't be brought into play its effect, and far and away, this type of collocation method can not make full use of hardware resource.At this point, if but desire allows this circuit board also be the system of an independent operation when not being arranged in this motherboard, replace the known circuit board that only has processor with another motherboard, and be connected with existing motherboard, but two motherboards are all the computer system of independent operation, that is, but independent operation all when the two computers system does not connect, yet, make the problem of its multiprocessor computer system that becomes joint operation for the required solution of one of ordinary skill in the art but how to connect the two computers system.
Summary of the invention
The purpose of this invention is to provide a kind of multicomputer system and collocation method thereof, this collocation method is applied to two independently on the computer system, and alternative control is also set a plurality of computer system independent operations or joint operation, with effective utilization overall system resources.
For achieving the above object, the invention provides a kind of multicomputer system, include: one first computer system has one first connector and one first basic input/output, wherein this first connector has one first pin position, and the level of this first pin position is second level; One second computer system, have one second connector and one second basic input/output that can be connected with this first connector, wherein this second connector has a crus secunda position, the level of this crus secunda position is first level, when this first connector is connected with this second connector, this first pin position and this crus secunda position electrically connect, and make this first pin position and the level of this crus secunda position become this identical first level; One switch is connected to this first pin position of this first connector, sets an operator scheme of this multicomputer system in order to selectivity; An and high complexity programmable logic element (Complex Programmable Logic Device; CPLD), it is serially connected with between this switch and this first basic input/output, according to the level decision operator scheme that this switch transmitted; Wherein, when selected this operator scheme is that this multicomputer system is when carrying out joint operation, make this high complexity programmable logic element and switch conduction, and this first connector is connected with this second connector, make the level state of this first pin position become described first level, this second basic input/output that is arranged at this second computer system is closed thereby make this high complexity programmable logic element send a signal is arranged at this first computer system with notice this first basic input/output.
Aforesaid multicomputer system, wherein the user can be by setting application program (the ROM-Based Setup Utility based on ROM (read-only memory); RBSU) carry out this first basic input/output (Basic Input/Output System; BIOS) set with the ownership of this second basic input/output.
Aforesaid multicomputer system, wherein if the user has ownership by this this second basic input/output of setting application setting based on ROM (read-only memory), then this second basic input/output is closed this first basic input/output.
The present invention also provides a kind of collocation method of multicomputer system, but this multicomputer system comprises one first computer system and one second computer system of independent operation, this first computer system and this second computer system can utilize one first connector and one second connector to be connected to each other respectively, and the step that this method comprises has: utilize a switch selectivity to set an operator scheme of this multicomputer system; When selected this operator scheme is this first computer system and this second computer system when carrying out joint operation, then this switch and a high complexity programmable logic element conducting; Utilize this high complexity programmable logic element to judge that this switch is connected to the level state of one first pin position of this first connector; Level state when this first pin position is one first level, this first computer system and this second computer system are carried out joint operation, and this high complexity programmable logic element transmits one first basic input/output of a signal to this first computer system; And one second basic input/output of this second computer system is closed by this first basic input/output.
The collocation method of aforesaid multicomputer system, wherein when this first connector is not connected with this second connector, the level state of one crus secunda position of this second connector is one first level, and the level state of one first pin position of this first connector is one second level.
The collocation method of aforesaid multicomputer system, wherein when this first connector was connected with this second connector, the level state of this first pin position of this first connector was this first level by this second level conversion.
The collocation method of aforesaid multicomputer system, wherein this operator scheme is carried out joint operation for this first computer system and this second computer system, if the level state of this first pin position of this first connector is this second level, this first computer system and this second computer system are still carried out independent operation.
The collocation method of aforesaid multicomputer system, wherein the user can set by the ownership that carries out this first basic input/output and this second basic input/output based on the setting application program of ROM (read-only memory).
The collocation method of aforesaid multicomputer system, wherein if the user has ownership by this this second basic input/output of setting application setting based on ROM (read-only memory), then this second basic input/output is closed this first basic input/output.
The present invention is applicable to that disposing a plurality of computer systems carries out joint operation, can connect each computer system and utilize switch to carry out the operator scheme of independent operation separately or joint operation to select each computer system system, if select joint operation, the control of " basic input/output setting " ownership is set in the time of then can carrying out joint operation.
Description of drawings
Fig. 1 is a multicomputer system connection diagram of the present invention;
Fig. 2 is the level state synoptic diagram of the pin position of first connector and second connector;
Fig. 3 is the configuration flow figure of computer system of the present invention.
Wherein, description of reference numerals is as follows:
10 first computer systems, 11 second computer systems
101a～101b first processor 102 switches
103 high complexity programmable logic element 104 first basic input/outputs
105 first connectors, 106 first pin positions
111a～111b second processor 114 second basic input/outputs
115 second connectors, 116 crus secunda positions
Step S1 links together first computer system and second computer system by connecting first connector and second connector
It is short-circuit condition or open-circuit condition that step S2 selects the switch of first computer system
Step S3 is if switch is an open-circuit condition, and first computer system and second computer system still are the system of two independent operations
Step S4 judges that then the first pin position of first connector that is connected with switch is high level or low level if switch is a short-circuit condition
Step S5 is if the first pin position is a high level, and then first computer system and second computer system still are the system of two independent operations
Step S6 is if the first pin position is a low level, and then first computer system and second computer system will be carried out joint operation, and high complexity programmable logic element sends a signal to first basic input/output of first computer system
Step S7 first basic input/output is closed second basic input/output of second computer system
Embodiment
Please refer to Fig. 1, be multicomputer system connection diagram of the present invention, as shown in the figure, first computer system 10 includes electronic components such as at least one first processor 101a～101b, switch 102, high complexity programmable logic element 103, first basic input/output 104 and first connector 105, makes it become the system of an independent operation but each electronic component constitutes first computer system 10.The annexation of each electronic component is: first processor 101a～101b is connected with first connector 105, switch 102 connects the first pin position 106 of first connector 105, high complexity programmable logic element 103 is connected with first basic input/output 104, and first basic input/output 104 is connected with first connector 105.
In addition, the electronic components such as second connector 115 that second computer system 11 includes at least one second processor 111a～111b, second basic input/output 114 and has crus secunda position 116, similarly, but second computer system 11 also is the system of an independent operation.The annexation of each electronic component is: second processor 111a～111b is connected with second connector 115, and second connector 115 also is connected with second basic input/output 114.
Please refer to Fig. 2, it is the level state synoptic diagram of the pin position of first connector 105 and second connector 115, as shown in the figure, the longitudinal axis is denoted as voltage, transverse axis is denoted as the time, one specific embodiment according to the present invention is judged with first connector 105 and the level state of the pin position of second connector 115 that first connector 105 has or not with second connector 115 and is connected.
When first connector 105 is not connected with second connector 115 (when first computer system 10 is not connected with second computer system 11), the level state of the crus secunda position 116 of second connector 115 is first level, as low level or zero level, and the level state of the first pin position 106 of first connector 105 is second level, as high level or positive voltage (in an infinite example, this moment, first level also can be high level or positive voltage, and the second relative level then is low level or zero level).At this moment, even the user selects first computer system 10 and second computer system 11 to carry out the operator scheme of joint operation, and switch 102 is switched to short circuit (ON) state, high complexity programmable logic element 103 is second level with switch 102 for the level state that the conducting state decidable goes out the first pin position 106 of first connector 105, because the level state of the crus secunda position 116 of second connector 115 is first level, therefore, it represents that first computer system 10 and second computer system 11 do not link together, thereby makes first computer system 10 and second computer system 11 still be operator scheme independently separately.
In addition, when first connector 105 is connected with second connector 115 (when first computer system 10 is connected with second computer system 11), the level state of the first pin position 106 of first connector 105 is first level, as low level or zero level, at this moment, if user's desire selects first computer system 10 and second computer system 11 to carry out the operator scheme of joint operation, then switch 102 is switched to short circuit (ON) state, high complexity programmable logic element 103 is a conducting state with switch 102, and, high complexity programmable logic element 103 is determined the level state (i.e. first level) of the first pin position 106 of first connector 105,103 of high complexity programmable logic elements issue a signal transmitted to first basic input/output 104, after first basic input/output 104 receives this signal, promptly second basic input/output 114 is closed.In an infinite example, when first computer system 10 and second computer system 11 are carried out joint operation, start master control by first basic input/output, 104 executive systems, that is, the action that first basic input/output 104 can be closed second basic input/output 114.Yet, the user also can by based on the setting application program of ROM (read-only memory) to carry out the conversion that basic input/output starts ownership, in an infinite example, if the user sets second basic input/output 114 and has ownership, then after first basic input/output 104 receives signal, first basic input/output 104 is promptly notified second basic input/output 114, so that first basic input/output 104 is closed.On the other hand, when switch 102 is open circuit (OFF) state, high complexity programmable logic element 103 is a not on-state with 102 on switch, at this moment, though first computer system 10 is connected with second computer system 11, high complexity programmable logic element 103 but can't be judged the level state of the first pin position 106 of first connector 105, and therefore, first computer system 10 and second computer system 11 still are operator scheme independently separately.
The present invention discloses a kind of collocation method of multicomputer system, it is applied on above-mentioned first computer system 10 and second computer system 11, and be applicable to that this multicomputer system begins preoperative operation, please refer to Fig. 3, be the configuration flow figure of computer system of the present invention, each steps flow chart that this process flow diagram display application first computer system 10 of the present invention and second computer system 11 are configured.At the beginning, the user is by connecting first connector and second connector with first computer system and second computer system are linked together (step S1); The user can utilize switch 102 to select the operator scheme of this multicomputer system, operator scheme comprises that first computer system 10 and second computer system 11 carry out joint operation and independent operation separately, if operator scheme is a joint operation, then need switch 102 is switched to short circuit (ON) state, if operator scheme is an independent operation, then need switch 102 is switched to open circuit (OFF) state (step S2); If user's select operating mode is that first computer system 10 and second computer system 11 are carried out independent operation, then switch 102 is switched to open circuit (OFF) state, first computer system 10 and second computer system 11 still are the system (step S3) of two independent operations; If user's select operating mode is that first computer system 10 and second computer system 11 are carried out joint operation, then switch 102 is switched to short circuit (ON) state, this moment switch 102 and high complexity programmable logic element 103 conductings, this high complexity programmable logic element 103 judges that the level state of the first pin position 106 is first level or second level (step S4); If the level state of the first pin position 106 is second level, then first computer system 10 and second computer system 11 still are the system (step S5) of two independent operations; If the level state of the first pin position 106 is first level/low level, first computer system 10 and second computer system 11 will be carried out joint operation, at this moment, high complexity programmable logic element 103 sends a signal to first basic input/output 104 (step S6) of first computer system 10; At last, second basic input/output 114 of 104 pairs second computer systems 11 of first basic input/output is closed (step S7).
As method disclosed by the invention, when the two computers system connects, the two computers system configuration can be become single computer system, or still be system independently separately.If be configured to single computer system, i.e. associating originally each electronic component of two computers system then makes the single computer system after the configuration have more multiprocessor with the enhancement data processing efficiency than first computer system 10 or second computer system 11 to carry out the operation of single computer system.
Though embodiment of the present invention openly as above, so it is not in order to restriction the present invention.Without departing from the spirit and scope of the present invention, when can a little change and the modification done.Therefore protection scope of the present invention is as the criterion when looking the scope that accompanying Claim defines.
Claims (8)
1. multicomputer system includes:
One first computer system has one first connector and one first basic input/output, and wherein this first connector has one first pin position, and the level of this first pin position is second level;
One second computer system, have one second connector and one second basic input/output that can be connected with this first connector, wherein this second connector has a crus secunda position, the level of this crus secunda position is first level, when this first connector is connected with this second connector, this first pin position and this crus secunda position electrically connect, and make this first pin position and the level of this crus secunda position become this identical first level;
One switch is connected to this first pin position of this first connector, in order to select an operator scheme of this multicomputer system; And
One high complexity programmable logic element, it is serially connected with between this switch and this first basic input/output, according to the level decision operator scheme that this switch transmitted;
Wherein, when selected this operator scheme is that this multicomputer system is when carrying out joint operation, make this high complexity programmable logic element and switch conduction, and this first connector is connected with this second connector, make the level state of this first pin position become described first level, make this high complexity programmable logic element send a signal is arranged at this first computer system with notice this first basic input/output this second basic input/output that is arranged at this second computer system is closed.
2. multicomputer system as claimed in claim 1, wherein the user can set by the ownership that carries out this first basic input/output and this second basic input/output based on the setting application program of a ROM (read-only memory).
3. multicomputer system as claimed in claim 2, wherein if the user has ownership by this this second basic input/output of setting application setting based on ROM (read-only memory), then this second basic input/output is closed this first basic input/output.
4. the collocation method of a multicomputer system, but this multicomputer system comprises one first computer system and one second computer system of independent operation, this first computer system and this second computer system can utilize one first connector and one second connector to be connected to each other respectively, wherein when this first connector is not connected with this second connector, the level state of one crus secunda position of this second connector is one first level, and the level state of one first pin position of this first connector is one second level, and the step that this method comprises has:
Utilize a switch to select an operator scheme of this multicomputer system;
When selected this operator scheme is this first computer system and this second computer system when carrying out joint operation, then this switch and a high complexity programmable logic element conducting;
Utilize this high complexity programmable logic element to judge that this switch is connected to the level state of one first pin position of this first connector;
Level state when this first pin position is this first level, this first computer system and this second computer system are carried out joint operation, and this high complexity programmable logic element transmits one first basic input/output of a signal to this first computer system; And
By this first basic input/output one second basic input/output of this second computer system is closed.
5. the collocation method of multicomputer system as claimed in claim 4, wherein when this first connector was connected with this second connector, the level state of this first pin position of this first connector was this first level by this second level conversion.
6. the collocation method of multicomputer system as claimed in claim 4, wherein this operator scheme is carried out joint operation for this first computer system and this second computer system, if the level state of this first pin position of this first connector is this second level, this first computer system and this second computer system are still carried out independent operation.
7. the collocation method of multicomputer system as claimed in claim 4, wherein the user can set by the ownership that carries out this first basic input/output and this second basic input/output based on the setting application program of ROM (read-only memory).
8. the collocation method of multicomputer system as claimed in claim 7, wherein if the user has ownership by this this second basic input/output of setting application setting based on ROM (read-only memory), then this second basic input/output is closed this first basic input/output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101320093A CN100555220C (en) | 2006-10-19 | 2006-10-19 | Multicomputer system and collocation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101320093A CN100555220C (en) | 2006-10-19 | 2006-10-19 | Multicomputer system and collocation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101165653A CN101165653A (en) | 2008-04-23 |
| CN100555220C true CN100555220C (en) | 2009-10-28 |
Family
ID=39334362
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2006101320093A Expired - Fee Related CN100555220C (en) | 2006-10-19 | 2006-10-19 | Multicomputer system and collocation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100555220C (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101291251B (en) | 2008-05-09 | 2011-04-06 | 国网信息通信有限公司 | Synchronized control method and system for multicomputer |
-
2006
- 2006-10-19 CN CNB2006101320093A patent/CN100555220C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN101165653A (en) | 2008-04-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8756360B1 (en) | PCI-E compatible chassis having multi-host capability | |
| CN105279133A (en) | VPX parallel DSP signal processing board card based on SoC online reconstruction | |
| CN101901206A (en) | Combinable computer devices | |
| CN102446154B (en) | Server system and method for sharing baseboard management controller | |
| CN110377296B (en) | System and method for supporting Flash burning of server main control board | |
| US20070032100A1 (en) | Replaceable input/output interface for circuit board | |
| CN109240953A (en) | A kind of method, pinboard and the system of adaptive switching hard disk | |
| EP2079003A1 (en) | Computer system and power-saving method thereof | |
| CN100464323C (en) | Reconfigurable processor and semiconductor device | |
| CN100555220C (en) | Multicomputer system and collocation method thereof | |
| CN102841634A (en) | Server mainboard | |
| US20080172442A1 (en) | Multi-computer system and configuration method therefor | |
| CN115629926B (en) | Control system, method and device based on joint test working group interface | |
| CN101582037A (en) | Method for sharing a basic input-output system as well as cutter point server and computer thereof | |
| CN200986699Y (en) | Starting-up switch circuit for multi-processor | |
| CN112306940B (en) | Method and device for controlling signal transmission in circuit and electronic equipment | |
| CN100447714C (en) | Online switching interfaces of peripheral devices in multitask mode computer | |
| CN114020669A (en) | I2C link system and server based on CPLD | |
| CN113392052A (en) | BIOS system, method and computer readable storage medium based on four-way server | |
| CN107256070B (en) | Power panel supporting multi-node power supply of server and power switching circuit | |
| CN111857310A (en) | Power supply system and method for components | |
| US20090019268A1 (en) | Processor | |
| CN100435125C (en) | Automatic regulating method and system for bus width | |
| CN106371965B (en) | The monitoring system and method for universal serial bus between a kind of hypervelocity piece | |
| CN210428435U (en) | Wireless control multichannel SWD debugger based on zigbee |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: STATE GRID SHANGHAI ELECTRIC POWER COMPANY Free format text: FORMER OWNER: YINGYEDA CO., LTD., TAIWAN Effective date: 20140922 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| C53 | Correction of patent for invention or patent application | ||
| CB03 | Change of inventor or designer information |
Inventor after: Ji Qing Inventor after: Ding Qin Inventor after: Hu Zhiwei Inventor after: Zhang Yingqiu Inventor after: Wang Sen Inventor after: Huang Lu Inventor after: Chen Rongsheng Inventor after: Wei Zhicheng Inventor before: Chen Rongsheng Inventor before: Wei Zhicheng |
|
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: TAIWAN, CHINA TO: 200002 HUANGPU, SHANGHAI Free format text: CORRECT: INVENTOR; FROM: CHEN RONGSHENG WEI ZHICHENG TO: QU QING DING HU ZHIWEI ZHANG YINGQIU WANG SEN HUANG LU CHEN RONGSHENG WEI ZHICHENG |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20140922 Address after: 200002 Nanjing East Road, Shanghai, No. 181, No. Patentee after: State Grid Shanghai Municipal Electric Power Company Address before: Taipei City, Taiwan, China Patentee before: Inventec Corporation |
|
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20091028 Termination date: 20141019 |
|
| EXPY | Termination of patent right or utility model |