CN100499097C - High-frequency integrated circuit packaging construction for improving connectivity of embedded projection and manufacturing method thereof - Google Patents
High-frequency integrated circuit packaging construction for improving connectivity of embedded projection and manufacturing method thereof Download PDFInfo
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Abstract
The present invention relates to a high frequency IC packaging which can improve combination of embedded protrusions and its processing method. The high frequency IC packaging mainly includes a substrate with even numbers of container holes for protrusion, a wafer with even numbers of protrusions, a sealing colloid and even numbers of external terminals. One inner pad is set on one side of surface of each container hole, and each pad is formed with a net structure or a soft solder layer. The wafer is set the substrate, and these protrusions are set in the corresponding container holes. The sealing colloid partly covers the substrate surface to seal the net structures of the inner pads. The said suspended net structures make it easy to combine the wafer protrusions under low temperature, reduce the complexity of the process, and have effects of short electric conductive path, and preventing disturbance between lines and thin of packaging.
Description
Technical field
(Chip-On-Board, COB) packaging structure particularly relate to a kind of high-frequency integrated circuit encapsulation structure and manufacture method thereof of promoting connectivity of embedded projection with simplifying on the plate of processing procedure chip type to the present invention relates to a kind of thinning.
Background technology
In the IC circuit packing structure of big argument inhibition and generation, the particularly encapsulation of memory chip, the advanced encapsulation technology that continues to pursue is to wish to encapsulate with the processing procedure of simplifying more high frequency, arithmetic speed integrated circuit (IC) wafer faster.Be to adopt chip type (Chip-On-Board on the plate at second generation high-speed synchronous Dynamic Random Access Memory (DDR II) and more advanced memory chip at present, COB) encapsulation (or can be described as BOC or window BGA etc.), wafer directly is attached on the substrate, the bonding wire (bondingwire) that forms with routing passes through the slotted eye of substrate to electrically connect wafer and substrate, connecting soldered ball again below substrate engages for outer surface, compared to thin-type small-size encapsulation (TSOP) encapsulating products that adopted lead frame in the past, need be by the outer pin of adhesive body side extension, so shorter conductivity path is arranged.
Seeing also shown in Figure 1ly, is the schematic cross-section of wafer (COB) type IC circuit packing structure on a kind of existing known plate.Wafer (COB) type IC circuit packing structure 100 on the existing known plate mainly comprises a substrate 110, a wafer 120, a plurality of bonding wire 140, an adhesive body 150 and a plurality of soldered ball 160.
Please cooperate and consult shown in Figure 2ly, be the making process block diagram of chip type IC circuit packing structure on the existing known plate.Explanation simultaneously now has the manufacturing process of wafer (COB) IC circuit packing structure 100 on the known plate now.In the step 11 of " substrate is provided ", this substrate 110 has a first surface 111, a second surface 112 and a long and narrow slotted eye 113 that can supply bonding wire 140 to pass through, and this substrate 110 is to be hard printed circuit board usually.
Then, in the step 12 of " sticking brilliant ", utilize the sticking crystal layer 130 of a glued membrane type active surface 121 of this wafer 120 to be pasted on this first surface 111 of this substrate 110, wherein this active surface 121 of this wafer 120 is to be formed with a plurality of weld pads 122, and this long and narrow slotted eye 113 manifests those all weld pads 122.
Afterwards, in the step 13 of " routing electric connection ", utilizing the routing technology to make those bonding wires 140 is to electrically connect those weld pads 122 of this wafer 120 and the interior connection pad of the line layer 114 of this substrate 110 by this long and narrow slotted eye 113.
Afterwards, in " sealing " step 14, form this adhesive body 150, to seal this wafer 120 and those bonding wires 140 with compression molding techniques.
At last, in " planting ball " step 15, those soldered balls 160 be engaged in this substrate 110 this line layer 114 a plurality of ball pads and this second surface 112 of this substrate 110 is set.
Cutting single from after this packaging structure 100 of making, but for the outer surface joint (SurfaceMount Technology, SMT) to an external printed circuit board, for example motherboard, communication board or memory body module group substrates.
Yet the length of those bonding wires 140 is unfavorable for high-frequency transmission, and fabrication steps is more.In addition, wish encapsulating products thinning more, lightweight and the encapsulation of suitable high frequency.
This shows that above-mentioned existing integrated circuits packaging structure and manufacture method thereof obviously still have inconvenience and defective, and demand urgently further being improved in product structure, manufacture method and use.In order to solve the problem of above-mentioned existence, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, but do not see always that for a long time suitable design finished by development, and common product and method do not have appropriate structure and method to address the above problem, and this obviously is the problem that the anxious desire of relevant dealer solves.Therefore how to found a kind of high-frequency integrated circuit encapsulation structure and manufacture method thereof of new enhancement connectivity of embedded projection, real one of the current important research and development problem that belongs to, also becoming the current industry utmost point needs improved target.
Because the defective that above-mentioned existing integrated circuits packaging structure and manufacture method thereof exist, the inventor is based on being engaged in this type of product design manufacturing abundant for many years practical experience and professional knowledge, and the utilization of cooperation scientific principle, actively studied innovation, in the hope of founding a kind of high-frequency integrated circuit encapsulation structure and manufacture method thereof of new enhancement connectivity of embedded projection, can improve general existing integrated circuits packaging structure and manufacture method thereof, make it have more practicality.Through constantly research, design, and after studying sample and improvement repeatedly, create the present invention who has practical value finally.
Summary of the invention
Main purpose of the present invention is, overcome the defective that existing integrated circuits packaging structure and manufacture method thereof exist, and provide a kind of new high-frequency integrated circuit encapsulation structure and manufacture method thereof, technical problem to be solved is it can be reached reduce process complexity and increase volume production speed, and have electrical conducting path short, prevent the effect of breasting the tape and encapsulating thinning, thereby be suitable for practicality more.
Another object of the present invention is to, overcome the defective that the existing integrated circuits packaging structure exists, and provide a kind of new high-frequency integrated circuit encapsulation structure, technical problem to be solved is to make its network structure that utilizes interior connection pad be suspended on an end of projection containing hole, and can be beneficial to the bump bond of wafer, thereby be suitable for practicality more.
A further object of the present invention is, overcome the defective that the existing integrated circuits packaging structure exists, and a kind of new high-frequency integrated circuit encapsulation structure, technical problem to be solved are provided is to make its effect that can reach embedded projection low temperature bond, thereby is suitable for practicality more.
The object of the invention to solve the technical problems realizes by the following technical solutions.A kind of high-frequency integrated circuit encapsulation structure according to the present invention's proposition, it comprises: a substrate, it has a first surface, a second surface and plurality of bump containing hole, wherein each projection containing hole is provided with connection pad at an end of second surface, and connection pad is formed with a network structure in each; One wafer, it has an active surface and a plurality of projection on this active surface, and this wafer is arranged on this first surface of this substrate, and those projections are to be placed in the corresponding projection containing hole; One adhesive body, its part are formed at this second surface of this substrate, to seal the network structure of connection pad in those; And a plurality of external terminals, it is arranged at this second surface of this substrate.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein said in those connection pads have a ring frame and a plurality ofly extend to netting twine position in those projection containing holes by this ring frame, and network structure of connection pads is for unsettled in those.
Aforesaid high-frequency integrated circuit encapsulation structure, it includes a welding substance in addition, to engage those projections and the network structure of connection pad in those.
Aforesaid high-frequency integrated circuit encapsulation structure, this second surface of wherein said substrate is formed with a line layer and a welding resisting layer, and this line layer includes connection pad and a plurality of outer connection pad in those, local this line layer that covers of this welding resisting layer.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein said those external terminals comprise soldered ball, and it is arranged on those outer connection pads of this line layer.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein said substrate are to be an individual layer pliability circuit substrate.
The object of the invention to solve the technical problems also realizes by the following technical solutions.The manufacture method of a kind of high-frequency integrated circuit encapsulation structure that proposes according to the present invention, it may further comprise the steps: a substrate is provided, it has a first surface, a second surface and plurality of bump containing hole, wherein each projection containing hole is provided with connection pad at an end of second surface, and connection pad is formed with a network structure in each; One wafer is set on this first surface of this substrate, this wafer has an active surface and a plurality of projection on this active surface, and those projections are to be placed in the corresponding projection containing hole; The local adhesive body that forms is in this second surface of this substrate, to seal the network structure of connection pad in those; And a plurality of external terminals this second surface in this substrate is set.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
The manufacture method of aforesaid high-frequency integrated circuit encapsulation structure is wherein being carried out the step that is provided with of aforementioned wafer, is in conjunction with this active surface of this wafer and this first surface of this substrate by a sticking crystal layer.
The manufacture method of aforesaid high-frequency integrated circuit encapsulation structure, wherein sticking brilliant simultaneously or before, a welding substance be for fusion to electrically connect those projections and the network structure of connection pad in those.
The manufacture method of aforesaid high-frequency integrated circuit encapsulation structure, this second surface of wherein said substrate are to be formed with a line layer, and connecting connection pad and a plurality of outer connection pad in those, and those external terminals comprise soldered ball, to be arranged on those outer connection pads.
The object of the invention to solve the technical problems also realizes in addition by the following technical solutions.A kind of high-frequency integrated circuit encapsulation structure according to the present invention's proposition, it comprises: a substrate, it has a first surface, a second surface and plurality of bump containing hole, and wherein the bottom of each projection containing hole is provided with connection pad in, and the surface of connection pad is formed with a soft soldering layer in those; One wafer, it has an active surface and a plurality of projection on this active surface; And a sticking eutectic substance, it is in conjunction with this active surface of this wafer and this first surface of this substrate, and those projections are to be placed in those projection containing holes of correspondence, and electrically connects those projections and connection pad in those by this soft soldering layer.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
Connection pad is to be unsettled metal gasket in the aforesaid high-frequency integrated circuit encapsulation structure, wherein said those, and has the position that extends in those projection containing holes.
Aforesaid high-frequency integrated circuit encapsulation structure, this second surface of wherein said substrate is formed with a line layer and a welding resisting layer, and this line layer includes connection pad and a plurality of outer connection pad in those, local this line layer that covers of this welding resisting layer.
Aforesaid high-frequency integrated circuit encapsulation structure, it includes a plurality of soldered balls in addition, and it is arranged on a plurality of outer connection pad of this line layer and is positioned at this second surface of this substrate.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein said substrate are to be an individual layer pliability circuit substrate.
Aforesaid high-frequency integrated circuit encapsulation structure, it includes one first adhesive body in addition, and it is formed at this second surface of this substrate, to seal this soft soldering layer and connection pad in those.
Aforesaid high-frequency integrated circuit encapsulation structure, other includes one second adhesive body, and it is formed at this first surface of this substrate.
The object of the invention to solve the technical problems realizes in addition more by the following technical solutions.The manufacture method of a kind of high-frequency integrated circuit encapsulation structure that proposes according to the present invention, it comprises the steps: to provide a substrate, it has a first surface, a second surface and plurality of bump containing hole, wherein the bottom of each projection containing hole is provided with connection pad in, and the surface of connection pad is formed with a soft soldering layer in those; One wafer is provided, and it has an active surface and a plurality of projection on this active surface; And carry out one and glue brilliant step, by a sticking eutectic substance is in conjunction with this active surface of this wafer and this first surface of this substrate, and those projections are to be placed in those corresponding projection containing holes, sticking brilliant simultaneously or before, this soft soldering layer is that fusion is to electrically connect those projections and connection pad in those.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
The manufacture method of aforesaid high-frequency integrated circuit encapsulation structure, it is after aforementioned sticking brilliant step, and other includes a sealing step, is to form one first adhesive body in this second surface of this substrate, to seal this soft soldering layer.
The manufacture method of aforesaid high-frequency integrated circuit encapsulation structure, wherein said those interior connection pads are to be unsettled metal gasket, and have the position that extends in those projection containing holes.
The manufacture method of aforesaid high-frequency integrated circuit encapsulation structure, this second surface of wherein said substrate is formed with a line layer, it includes connection pad and a plurality of outer connection pad in those, and after aforementioned sticking brilliant step, other includes and plants the ball step, and it is provided with a plurality of soldered balls outside this line layer a plurality of on the connection pad and be positioned at this second surface of this substrate.
The present invention compared with prior art has tangible advantage and beneficial effect.Existing combination technology scheme is described as follows.By above technical scheme as can be known, according to a kind of high-frequency integrated circuit encapsulation structure of the present invention, mainly comprise a substrate, a wafer, an adhesive body and a plurality of external terminal.This substrate has a first surface, a second surface and plurality of bump containing hole, and wherein each projection containing hole is provided with connection pad at an end of second surface, and connection pad is formed with a network structure in each.This wafer has an active surface and a plurality of projection on this active surface, and this wafer is arranged on this first surface of this substrate, and those projections are to be placed in the corresponding projection containing hole.This adhesive body is this second surface that the part is formed at this substrate, to seal the network structure of connection pad in those.Those external terminals are arranged at this second surface of this substrate.The present invention has disclosed the manufacture method of aforesaid high-frequency integrated circuit encapsulation structure in addition, and it can be provided with at a wafer and electrically connect this wafer and this substrate in the step simultaneously, can simplify fabrication steps, and can guarantee the slim outward appearance that projection is embedded into.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein connection pads have a ring frame and a plurality ofly extend to netting twine position in those projection containing holes by this ring frame in those.
Aforesaid high-frequency integrated circuit encapsulation structure, other comprises a sticking crystal layer, and it is in conjunction with this active surface of this wafer and this first surface of this substrate.
Aforesaid high-frequency integrated circuit encapsulation structure, other includes a welding substance, to engage those projections and the network structure of connection pad in those.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein network structure of connection pad is for unsettled in those.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein this second surface of this substrate is formed with a line layer, and it includes connection pad and a plurality of outer connection pad in those.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein this second surface of this substrate is formed with a welding resisting layer, covers this line layer with the part.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein those external terminals comprise soldered ball, and it is to be arranged on those outer connection pads of this line layer.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein this substrate is to be an individual layer pliability circuit substrate.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein this wafer is to be a Dynamic Random Access Memory wafer.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein in those network structure shape of connection pads be selected from that centre convergence is netted, square grid shape and concentric circles are netted one of them.
Change according to embodiments of the invention, other has disclosed a kind of high-frequency integrated circuit encapsulation structure, mainly comprises a substrate, a wafer and a sticking eutectic substance.This substrate has a first surface, a second surface and plurality of bump containing hole, and wherein the bottom of each projection containing hole is provided with connection pad in, and the surface of connection pad is formed with a soft soldering layer in those.This wafer has an active surface and a plurality of projection on this active surface.Should sticking eutectic substance be, and those projections be to be placed in those projection containing holes of correspondence, and electrically connect those projections and connection pad in those by this soft soldering layer in conjunction with this active surface of this wafer and this first surface of this substrate.The present invention has disclosed the manufacture method of chip type packaging structure on the aforesaid plate in addition, and it can electrically connect this wafer and this substrate simultaneously in a sticking brilliant step, can simplify fabrication steps, and guarantee the slim outward appearance that projection is embedded into.
The object of the invention to solve the technical problems also can be applied to the following technical measures to achieve further.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein connection pad is for annular and has the position that extends in those projection containing holes in those.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein connection pad is to be unsettled metal gasket in those.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein this second surface of this substrate is formed with a line layer, and it includes connection pad and a plurality of outer connection pad in those.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein this second surface of this substrate is formed with a welding resisting layer, covers this line layer with the part.
Aforesaid high-frequency integrated circuit encapsulation structure, other includes a plurality of soldered balls, and it is this second surface that is arranged on a plurality of outer connection pad of this line layer and is positioned at this substrate.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein this substrate is to be an individual layer pliability circuit substrate.
Aforesaid high-frequency integrated circuit encapsulation structure, other includes one first adhesive body, and it is this second surface that is formed at this substrate, to seal this soft soldering layer and connection pad in those.
Aforesaid high-frequency integrated circuit encapsulation structure, other includes one second adhesive body, and it is this first surface that is formed at this substrate.
Aforesaid high-frequency integrated circuit encapsulation structure, wherein this wafer is to be a Dynamic Random Access Memory wafer.
By technique scheme, high-frequency integrated circuit encapsulation structure and manufacture method thereof that the present invention promotes connectivity of embedded projection have following advantage at least:
1, high-frequency integrated circuit encapsulation structure of the present invention and manufacture method thereof can reach and reduce process complexity and increase volume production speed, and have electrical conducting path short, prevent the effect of breasting the tape and encapsulating thinning, thereby be suitable for practicality more.
2, high-frequency integrated circuit encapsulation structure of the present invention is suspended on an end of projection containing hole by the network structure that utilizes interior connection pad, and can helps the bump bond of wafer, thereby is suitable for practicality more.
3, high-frequency integrated circuit encapsulation structure of the present invention can reach the effect of embedded projection low temperature bond, thereby is suitable for practicality more.
In sum, the present invention is relevant a kind of high-frequency integrated circuit encapsulation structure and manufacture method thereof of promoting connectivity of embedded projection.The high-frequency integrated circuit encapsulation structure that this promotes connectivity of embedded projection mainly comprises wafer, an adhesive body and a plurality of external terminal that a substrate, with plurality of bump containing hole is provided with plurality of bump.Wherein each projection containing hole therein an end on a surface be provided with connection pad in, and connection pad is formed with a network structure or a soft soldering layer in each.This wafer is to be arranged on this substrate, and those projections are to be placed in the corresponding projection containing hole.This adhesive body is the local surface that covers this substrate, to seal the network structure of connection pad in those.Said suspended net structures can be easy to the projection of low temperature joint wafer, and can reduce process complexity, and have electrical conducting path short, prevent the effect of breasting the tape and encapsulating thinning.The present invention has above-mentioned plurality of advantages and practical value, no matter it all has bigger improvement on product structure, manufacture method or function, be a significant progress in technology, and produced handy and practical effect, and has the outstanding effect of enhancement than existing integrated circuits packaging structure and manufacture method thereof, thereby being suitable for practicality more, and having the extensive value of industry, really is a new and innovative, progressive, practical new design.
Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of specification, and for above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, below especially exemplified by preferred embodiment, and conjunction with figs., be described in detail as follows.
Description of drawings
Fig. 1 is the schematic cross-section that has wafer (COB) type IC circuit packing structure on the known plate now.
Fig. 2 is the making process block diagram that has chip type IC circuit packing structure on the known plate now.
Fig. 3 is according to first specific embodiment of the present invention, a kind of schematic cross-section of high-frequency integrated circuit encapsulation structure.
Fig. 4 is according to first specific embodiment of the present invention, connection pad schematic diagram in the substrate of this packaging structure.
Fig. 5 is according to first specific embodiment of the present invention, the making process block diagram of this packaging structure.
Fig. 6 is according to first specific embodiment of the present invention, makes the schematic cross-section of this packaging structure in sticking brilliant step.
Fig. 7 is according to second specific embodiment of the present invention, the schematic cross-section of another kind of high-frequency integrated circuit encapsulation structure.
Fig. 8 is according to second specific embodiment of the present invention, connection pad schematic diagram in the substrate of this packaging structure.
Fig. 9 is according to the 3rd specific embodiment of the present invention, a kind of schematic cross-section of promoting the high-frequency integrated circuit encapsulation structure of connectivity of embedded projection.
Figure 10 is according to the 3rd specific embodiment of the present invention, connection pad schematic diagram in the substrate of this packaging structure.
Figure 11 is according to the 4th specific embodiment of the present invention, the another kind of schematic cross-section of promoting the high-frequency integrated circuit encapsulation structure of connectivity of embedded projection.
Figure 12 A is according to the 4th specific embodiment of the present invention, connection pad schematic diagram in the substrate of this packaging structure.
Figure 12 B is according to the 4th specific embodiment of the present invention, another variation schematic diagram of connection pad in the substrate of this packaging structure.
11: substrate 12 is provided: glutinous brilliant
13: routing electrically connects 14: sealing
15: plant ball 21: provide substrate
22: sticking brilliant engagement protrusion 23 simultaneously: sealing
24: plant ball 100:COB IC circuit packing structure
110: substrate 111: first surface
112: second surface 113: long and narrow slotted eye
114: line layer 120: wafer
121: active surface 122: weld pad
130: sticking crystal layer 140: bonding wire
150: adhesive body 160: external terminal
200: chip type packaging structure 210 on the plate: substrate
211: first surface 212: second surface
213: projection containing hole 214: interior connection pad
214A: interior extending part 215: outer connection pad
216: circuit 217: welding resisting layer
220: soft soldering layer 230: wafer
231: active surface 232: weld pad
233: projection 240: sticking eutectic substance
252: the second adhesive bodies of 251: the first adhesive bodies
260: soldered ball 300: chip type packaging structure on the plate
310: substrate 311: first surface
312: second surface 313: the projection containing hole
314: interior connection pad 314A: tie-rod
315: outer connection pad 316: welding resisting layer
320: soft soldering layer 330: wafer
331: active surface 332: weld pad
333: projection 340: sticking eutectic substance
350: adhesive body 360: soldered ball
400: high-frequency integrated circuit encapsulation structure 410: substrate
411: first surface 412: second surface
413: projection containing hole 414: interior connection pad
414A: ring frame 414B: netting twine position
415: outer connection pad 416: circuit
417: welding resisting layer 420: wafer
421: active surface 422: weld pad
423: projection 430: adhesive body
440: external terminal 450: sticking crystal layer
510: substrate 511: first surface
512: second surface 513: the projection containing hole
514: interior connection pad 514A: netting twine position
515: outer connection pad 520: wafer
521: active surface 522: weld pad
523: projection 530: adhesive body
540: 550: the second adhesive bodies of external terminal
560: welding substance
Embodiment
Reach technological means and the effect thereof that predetermined goal of the invention is taked in order further to set forth the present invention, below in conjunction with accompanying drawing and preferred embodiment, high-frequency integrated circuit encapsulation structure and its embodiment of manufacture method, structure, manufacture method, step, feature and the effect thereof of the enhancement connectivity of embedded projection that foundation the present invention is proposed, describe in detail as after.
Seeing also shown in Figure 3ly, is according to first specific embodiment of the present invention, a kind of schematic cross-section of high-frequency integrated circuit encapsulation structure.In first specific embodiment of the present invention, this high-frequency integrated circuit encapsulation structure 200 mainly comprises substrate 210, a projection wafer 230 and that is formed with soft soldering layer 220 and glues eutectic substance 240.
This substrate 210 has a first surface 211, a second surface 212 and plurality of bump containing hole 213.In the present embodiment, this second surface 212 of this substrate 210 is to be formed with a line layer 216, it includes a plurality of interior connection pads 214 and a plurality of outer connection pads 215, and wherein position of connection pads 214 is to be located at corresponding projection containing hole 213 in the bottom towards this second surface 212 in those.In addition, the surface of connection pad 214 is formed with a soft soldering layer 220 in those, and for example fusing points such as tin, tin lead, lead-free tin cream are at the following welding compound of 400 degree Celsius, and the formation method of this soft soldering layer 220 then can adopt plating or printing technology to implement according to this.In addition, can be formed with a welding resisting layer 217, cover this line layer 216, but appear the wherein part of connection pads 214 in those and wherein a part of (as shown in Figure 3) of those outer connection pads 215 at least with the part at this second surface 212 of this substrate 210.Preferably, this substrate 210 is for an individual layer pliability circuit substrate, helps encapsulating thinning and lightweight.
This wafer 230 has an active surface 231 and a plurality of projection 233 on this active surface 231.And those projections 233 are the integrated circuit components (figure does not draw) that electrically are connected to these wafer 230 inside, as the external electrode tip of this wafer 230.In the present embodiment, this wafer 230 can be a Dynamic Random Access Memory wafer 230, surpasses the high frequency memory chip 230 of 400MHz as second generation high-speed synchronous Dynamic Random Access Memory (DDR II), third generation high-speed synchronous Dynamic Random Access Memory (DDR III), novel high speed memory body structure (Rambus) equifrequent.In addition, those projections 233 can be the tie lines projection 233 (stud bump) that routing forms, directly be engaged in a plurality of weld pads 232 (can be central welding pad or peripheral weld pad) of this wafer 230, and the line tail truncated end of those tie lines projections 233 is can be close toward those corresponding interior connection pads 214, and the soft soldering that is beneficial to this soft soldering layer 220 engages.
Should glue eutectic substance 240, be in conjunction with this active surface 231 of this wafer 230 and this first surface 211 of this substrate 210.Should sticking eutectic substance 240 can be selected from wherein one of multistage curing glue, polyimides (PI) viscosity glued membrane, epoxy viscose.Wherein, preferably, this sticking eutectic substance 240 is to be multistage curing glue: can be printed on the first surface 211 of this substrate 210 with liquid state earlier; After prebake conditions, become B rank adhesive-layer (B-stage adhesive); But viscosity is in conjunction with this active surface 231 of this wafer 230 under hot pressing.And those projections 233 are to be placed in those corresponding projection containing holes 213, and electrically connect those projections 233 and connection pad 214 in those by this soft soldering layer 220.Because this soft soldering layer 220 utilizes the heating-up temperature when gluing crystalline substance can reach fusion, finishes the electric connection between this wafer 230 and this substrate 210,, and has the convenience that processing procedure is simplified so the routing that can omit in the past electrically connects step.In addition, those projections 233 can be embedded in those projection containing holes 213 and be directly welded in this line layer 216 (interior connection pad 214) of this substrate 210, wafer 230 type packaging structures 200 are had than minimal thickness, more lightweight and shorter electrical conducting path, be specially adapted to the application of low-cost a large amount of package high frequency memory chips 230.
Please consult shown in Figure 3ly again, on aforesaid plate, can include one first adhesive body 251, one second adhesive body 252 and a plurality of soldered ball 260 in the wafer 230 type packaging structures 200 in addition.This first adhesive body 251 is to put this second surface 212 that glue is formed at this substrate 210, to seal this soft soldering layer 220.This second adhesive body 252 is these first surfaces 211 that are formed at this substrate 210, and it is gone into to these sticking eutectic substance 240 generation hydrolysis to prevent the water gas cut around this wafer 230; In different embodiment, when this sticking eutectic substance 240 has water proofing property, then can not need to form this second adhesive body 252.Those soldered balls 260 are these second surfaces 212 that are arranged on those outer connection pads 215 of this line layer 216 and are positioned at this substrate 210, for to outer engagement; In different embodiment, can utilize tin cream, Metal Ball, metal bolt or anisotropy conducting film (ACF) conducting resinl to replace those soldered balls 260.
Seeing also shown in Figure 4ly, is according to first specific embodiment of the present invention, connection pad schematic diagram in the substrate of this packaging structure.Preferably, connection pads 214 in those, be for annular and in each connection pad 214 have extending part 214A in, it is to extend in those corresponding projection containing holes 213, is beneficial at its surperficial soft soldering layer 220 at sticking moistening those projections 233 that is engaged to when brilliant.In the present embodiment, interior extending part 214A of connection pad 214 is for interior ring-type in those, that is to say, perforate of connection pad 214 is the apertures less than those projection containing holes 213 in those.
Seeing also shown in Figure 5ly, is according to first specific embodiment of the present invention, the making process block diagram of this packaging structure.About the manufacture method of wafer 230 type packaging structures 200 on the aforesaid plate, its manufacturing process mainly comprises: " substrate is provided " step 21, " sticking crystalline substance welds simultaneously " step 22, " sealing " step 23 and " planting ball " step 24.
Please cooperate and consult Fig. 3 and shown in Figure 6, Fig. 6 is according to first specific embodiment of the present invention, makes the schematic cross-section of this packaging structure in sticking brilliant step.In " substrate is provided " step 21, this substrate 210 is provided, this soft soldering layer 220 has been pre-formed on this substrate 210, in the present embodiment, in " sticking crystalline substance welds simultaneously " step 22, shown in Figure 6 again, should sticking eutectic substance 240 be these first surfaces 211 that are formed at this substrate 210, and this wafer 230 of hot pressing makes these active surface 231 crimping of this wafer 230 should glue eutectic substance 240, and those projections 233 is embedded in those projection containing holes 213 to this substrate 210.Utilize sticking brilliant pressure and heating-up temperature, should glue eutectic substance 240 energy viscosity in conjunction with this wafer 230 and this substrate 210, simultaneously, this soft soldering layer 220 are fusions with electrically connect those projections 233 with those in connection pad 214, so can save existing known routing electric connection step.In the present embodiment, the material of this soft soldering layer 220 is to be that tin (Sn), the material of those projections 233 are is gold (Au), can be issued to Jin-Xi eutectic by the cryogenic temperature when sticking crystalline substance, electrically engages good.In addition, in " sealing " step 23, form this first adhesive body 251 and second adhesive body 252 in the gluing mode.And in " planting ball " step 24, those soldered balls 260 are set.
Preferably, in " sticking crystalline substance welds simultaneously " step 22, the temperature that heats this wafer 230 is to be higher than the temperature that heats this substrate 210, make this soft soldering layer 220 energy fast moving and moistening in those projections 233 of higher temperatures, and then be filled in those projection containing holes 213, reduce the projecting height that this soft soldering layer 220 protrudes in this second surface 212 of this substrate 210, make that this adhesive body 251 can be a small amount of and at this soft soldering layer 220 of lower height lower seal.
Seeing also shown in Figure 7ly, is according to second specific embodiment of the present invention, the schematic cross-section of another kind of high-frequency integrated circuit encapsulation structure.The another kind of high-frequency integrated circuit encapsulation structure 300 that discloses in the present invention's second specific embodiment mainly comprises substrate 310, a projection wafer 330 and that is formed with soft soldering layer 320 in advance and glues eutectic substance 340.
This substrate 310 has a first surface 311, a second surface 312 and plurality of bump containing hole 313, and wherein the bottom of each projection containing hole 313 is provided with connection pad 314 in, and the surface of connection pad 314 is formed with this soft soldering layer 320 in those.And connection pad 314 is the somes that can be a line layer of this substrate 310 in those, and this line layer is formed in these second surface 312 places of this substrate 310 and can includes a plurality of outer connection pads 315 in addition, and with a welding resisting layer 316 local these line layers that cover.
This wafer 330 has an active surface 331 and a plurality of projection 333 on the weld pad 332 of this active surface 331, and in the present embodiment, those projections 333 are the golden projections that form and be column for electroplating.
Should glue eutectic substance 340, be in conjunction with this active surface 331 of this wafer 330 and the first surface 311 of this substrate 310, and those projections 333 are to be placed in those corresponding projection containing holes 313, in the present embodiment, should can be a underfill (underfill material) or non-conductive colloid (Non-Conductive Paste by sticking eutectic substance 340, NCP), can be simultaneously or afterwards, just slaking is with this wafer 330 of adhering in the formation of this soft soldering layer 320.And by this soft soldering layer 320 electrically connect those projections 333 with those in connection pad 314.
In the more specifically framework of present embodiment, wafer 330 type packaging structures 300 can include an adhesive body 350 and a plurality of soldered balls 360 in addition on this plate, this adhesive body 350 is to form with gluing or compression molding techniques, to seal this soft soldering layer 320 and connection pad 314 in those, and those soldered balls 360 are to be arranged at those outer connection pads 315, and are positioned at this second surface 312 of this substrate 310.
Preferably, seeing also shown in Figure 8ly, is according to second specific embodiment of the present invention, connection pad schematic diagram in the substrate of this packaging structure.Connection pad 314 is to be unsettled metal gasket in those, and it is to be suspended on those projection containing hole 313 places, can utilize a plurality of tie-rod 314A to be connected to the line layer of this substrate 310.Therefore, the soft soldering layer 320 on connection pad 314 surfaces can moisteningly smoothly be soldered to those projections 333 in those.And the space of connection pad 314 peripheries will help the discharge of escaping gas when sticking brilliant in those, and help this adhesive body 350 and fill up those projection containing holes 313, to seal connection pad 314 in those.
Seeing also shown in Figure 9ly, is according to the 3rd specific embodiment of the present invention, a kind of schematic cross-section of promoting the high-frequency integrated circuit encapsulation structure of connectivity of embedded projection.This high-frequency integrated circuit encapsulation structure 400 of the present invention's the 3rd specific embodiment mainly comprises a substrate 410, a wafer 420, an adhesive body 430 and a plurality of external terminal 440.
This substrate 410 has a first surface 411, a second surface 412 and plurality of bump containing hole 413, and those projection containing holes 413 are to run through this first surface 411 and second surface 412.Each projection containing hole 413 is provided with connection pad 414 at an end of second surface 412, and connection pad 414 is formed with a network structure in each, so that connection pad 414 becomes more flexible and ductility in those, can promote the joint capacity of projection.For example, as shown in figure 10, be according to the 3rd specific embodiment of the present invention, connection pad schematic diagram in the substrate of this packaging structure.Connection pad 414 in this each has a ring frame 414A and a plurality ofly extends to netting twine position 414B in those projection containing holes 413 by this ring frame 414A, to constitute the above-mentioned network structure that is suspended on those projection containing hole 413 1 ends.Shape such as those network structures can be that centre convergence is netted, square grid shape and concentric circles are netted.In the present embodiment, as shown in Figure 10, those network structures are netted for centre convergence, and the low temperature that is beneficial to the wafer projection engages.Preferably, this substrate 410 is for an individual layer pliability circuit substrate, helps encapsulating thinning and lightweight.In the present embodiment, this second surface 412 of this substrate 410 is to be formed with a line layer, the circuit 416 that it includes those interior connection pad 414, a plurality of outer connection pads 415 and connects those interior connection pads 414 and those outer connection pads 415.In addition, this second surface 412 of this substrate 410 can be formed with a welding resisting layer 417, covers the circuit 416 of this line layer with the part.
This wafer 420 has an active surface 421 and a plurality of weld pad 422 on this active surface 421.Plurality of bump 423 is arranged on those weld pads 422.In the present embodiment, this wafer 420 is to be a Dynamic Random Access Memory wafer, surpasses the high frequency memory chip of 400MHz as novel high speed memory body structure (Rambus), high-speed synchronous Dynamic Random Access Memory (DDR II), third generation high-speed synchronous Dynamic Random Access Memory (DDR III) equifrequent.This wafer 420 is to be arranged on this first surface 411 of this substrate 410, and those projections 423 are to be placed in the corresponding projection containing hole 413.In the present embodiment, this high-frequency integrated circuit encapsulation structure 400 can comprise a sticking crystal layer 450 in addition, and it is in conjunction with this active surface 421 of this wafer 420 and this first surface 411 of this substrate 410.
This adhesive body 430 is these second surfaces 412 that the part is formed at this substrate 410, to seal the network structure of connection pad 414 in those.Wherein this adhesive body 430 is these second surfaces 412 that utilisation point glue technology is formed at this substrate 410, to seal connection pad 414 in those.
In addition, one second adhesive body 460 can be formed at this first surface 411 of this substrate 410, and it is gone into to these sticking crystal layer 450 generation hydrolysis to prevent the water gas cut around this wafer 420; In different embodiment, when this sticking crystal layer 440 has water proofing property, then can not need to form this second adhesive body 460.
Those external terminals 440 are these second surfaces 412 that are arranged at this substrate 410, for to outer engagement.In the present embodiment, those external terminals 440 comprise soldered ball (solder ball), and it is arranged on those outer connection pads 415, for to outer engagement.In different embodiment, can utilize tin cream, Metal Ball, metal bolt or anisotropy conducting film (ACF) conducting resinl displacement soldered ball to form those external terminals 440.
By those unsettled network structures, help those projections 423 414 generation low-temperature bondings of connection pad in those or elasticity are electrically contacted.Utilize the heating-up temperature when gluing crystalline substance can make those projections 423 in the projection containing hole 413 of this substrate 410, form metal bonding even, as gold-gold bonding or Jin-Xi bonding, reach the electric connection between this wafer 420 and this substrate 410, the routing that can omit in the past electrically connects step, and has the convenience that processing procedure is simplified.Preferably, this substrate 410 is for an individual layer pliability circuit substrate, helps encapsulating thinning and lightweight.
Should sticking crystal layer 450, be to can be selected from wherein one of multistage curing glue, polyimides (PI) viscosity glued membrane, epoxy viscose.Preferably, this sticking crystal layer 450 is to be multistage curing glue: can be printed on the first surface 411 of this substrate 410 with liquid state earlier; After prebake conditions, become B rank adhesive-layer; But viscosity is in conjunction with this active surface 421 of this wafer 420 under hot pressing.And, those projections 423 are to be placed in those corresponding projection containing holes 413, in addition, those projections 423 can be embedded into the network structure that also directly is engaged in connection pad 414 in those in those projection containing holes 413, this high-frequency integrated circuit encapsulation structure 400 is had than minimal thickness, more lightweight and shorter electrical conducting path, be specially adapted to the application of low-cost a large amount of package high frequency memory chips 420.
Seeing also shown in Figure 5ly, is the making process block diagram according to this packaging structure of the present invention.About aforesaid high-frequency integrated circuit encapsulation structure 400, its manufacturing process mainly comprises: " substrate is provided " step 21, " sticking brilliant engagement protrusion simultaneously " step 22, " sealing " step 23 and " planting ball " step 24.This substrate 410 has a first surface 411, a second surface 412 and plurality of bump containing hole 413, and wherein each projection containing hole 413 is provided with connection pad 414 at an end of second surface, and connection pad 414 is formed with a network structure in each.Preferably, this substrate 410 is to can be an individual layer pliability circuit substrate.In " sticking brilliant engagement protrusion simultaneously " step 22, please cooperate consult shown in Figure 9, should sticking crystal layer 450 be these first surfaces 411 that are formed at this substrate 410, and this wafer 420 of hot pressing is to this substrate 410, make these active surface 421 crimping of this wafer 420 should glue crystal layer 450, and those projections 423 are embedded in those projection containing holes 413.Utilize sticking brilliant pressure and heating-up temperature, should glue crystal layer 450 energy viscosity in conjunction with this wafer 420 and this substrate 410, simultaneously, be subjected to sticking brilliant temperature and pressure, connection pad 414 can be in 231 internal strains of projection containing hole in those, make those projections 423 and the netting twine position 414B of those interior connection pads 414 form metal bonding or electrical Elastic Contact, electrically connect step so can save existing known routing.In addition, in " sealing " step 23, form this adhesive body 430 and this second adhesive body 460 in the gluing mode.And in " planting ball " step 24, those external terminals 440 are set outside those on connection pad 415.
Seeing also shown in Figure 11ly, is according to the 4th specific embodiment of the present invention, the another kind of schematic cross-section of promoting the high-frequency integrated circuit encapsulation structure of connectivity of embedded projection.The another kind of high-frequency integrated circuit encapsulation structure 500 that the present invention's the 4th specific embodiment discloses mainly comprises a substrate 510, a wafer 520, an adhesive body 530 and a plurality of external terminal 540.
This substrate 510 has a first surface 511, a second surface 512 and plurality of bump containing hole 513, and those projection containing holes 513 are to run through this first surface 511 and second surface 512.Each projection containing hole 513 is provided with connection pad 514 at an end of this second surface 512, and connection pad 514 is formed with a network structure 514A (shown in Figure 12 A) in each.Shape such as those network structures can be that centre convergence is netted, square grid shape and concentric circles are netted.Shown in Figure 12 A, be according to the present invention's the 4th specific embodiment, connection pad schematic diagram in the substrate of this packaging structure.In one embodiment, network structure 514A of connection pad 514 is square grid shape in those; Shown in Figure 12 B, be according to the present invention's the 4th specific embodiment, another variation schematic diagram of connection pad in the substrate of this packaging structure.In another embodiment, connection pad 514 is to have the netted network structure 514B of concentric circles in those, and the low-temperature bonding or the elasticity that are beneficial to the wafer projection electrically contact.This second surface 512 of this substrate 510 is to be formed with a line layer, the circuit that it includes those interior connection pad 514, a plurality of outer connection pads 515 and connects those interior connection pads 514 and those outer connection pads 515.In addition, the surface of connection pad 514 forms and to be provided with a welding substance 560 in those, with engage those projections 523 with those in the network structure 514A of connection pad 514.And this welding substance 560 is to can be a kind of tin-lead solder or lead-free solder, and its formation method then can adopt substrate to electroplate or printing technology is implemented according to this.
This wafer 520 has an active surface 521 and a plurality of weld pad 522 on this active surface 521.Plurality of bump 523 is arranged on those weld pads 522, can be tie lines projection (stud bump) or plated bumps that routing forms.In the present embodiment, this wafer 520 is to be arranged on the first surface 511 of this substrate 510, and those projections 523 are to be placed in the corresponding projection containing hole 513.Those projections 523 are to be engaged to connection pad 514 in those by this welding substance 560.
This adhesive body 530 is these second surfaces 512 that the part is formed at this substrate 510, to seal the network structure 514A of connection pad 514 in those.
In addition, one second adhesive body 550 is these first surfaces 511 that are formed at this substrate 510, to increase the associativity of this substrate 510 and this wafer 520.
Those external terminals 540 are the second surfaces 512 that are arranged at this substrate 510, for to outer engagement.Those external terminals 540 as soldered ball, are to be arranged on those outer connection pads 515, for to outer engagement.
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the method that can utilize above-mentioned announcement and technology contents are made a little change or be modified to the equivalent embodiment of equivalent variations, in every case be the content that does not break away from technical solution of the present invention, according to technical spirit of the present invention to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solution of the present invention.
Claims (21)
1, a kind of high-frequency integrated circuit encapsulation structure is characterized in that it comprises:
One substrate, it has a first surface, a second surface and plurality of bump containing hole, and wherein each projection containing hole is provided with connection pad at an end of second surface, and connection pad is formed with a network structure in each;
One wafer, it has an active surface and a plurality of projection on this active surface, and this wafer is arranged on this first surface of this substrate, and those projections are to be placed in the corresponding projection containing hole;
One adhesive body, its part are formed at this second surface of this substrate, to seal the network structure of connection pad in those; And
A plurality of external terminals, it is arranged at this second surface of this substrate.
2, high-frequency integrated circuit encapsulation structure according to claim 1, it is characterized in that wherein said in those connection pads have a ring frame and a plurality ofly extend to netting twine position in those projection containing holes by this ring frame, and network structure of connection pads is for unsettled in those.
3, high-frequency integrated circuit encapsulation structure according to claim 1 is characterized in that it includes a welding substance in addition, to engage those projections and the network structure of connection pad in those.
4, high-frequency integrated circuit encapsulation structure according to claim 1, this second surface that it is characterized in that wherein said substrate is formed with a line layer and a welding resisting layer, this line layer includes connection pad and a plurality of outer connection pad in those, local this line layer that covers of this welding resisting layer.
5, high-frequency integrated circuit encapsulation structure according to claim 4 is characterized in that wherein said those external terminals comprise soldered ball, and it is arranged on those outer connection pads of this line layer.
6, high-frequency integrated circuit encapsulation structure according to claim 1 is characterized in that wherein said substrate is to be an individual layer pliability circuit substrate.
7, a kind of manufacture method of high-frequency integrated circuit encapsulation structure is characterized in that it may further comprise the steps:
One substrate is provided, and it is to have a first surface, a second surface and plurality of bump containing hole, and wherein each projection containing hole is provided with connection pad at an end of second surface, and connection pad is formed with a network structure in each;
One wafer is set on this first surface of this substrate, this wafer has an active surface and a plurality of projection on this active surface, and those projections are to be placed in the corresponding projection containing hole;
The local adhesive body that forms is in this second surface of this substrate, to seal the network structure of connection pad in those; And
A plurality of external terminals this second surface in this substrate is set.
8, the manufacture method of high-frequency integrated circuit encapsulation structure according to claim 7 is characterized in that the step that is provided with of aforementioned wafer is in conjunction with this active surface of this wafer and this first surface of this substrate by a sticking crystal layer.
9, the manufacture method of high-frequency integrated circuit encapsulation structure according to claim 8, it is characterized in that wherein sticking simultaneously brilliant or before, a welding substance be for fusion to electrically connect those projections and the network structure of connection pad in those.
10, the manufacture method of high-frequency integrated circuit encapsulation structure according to claim 7, this second surface that it is characterized in that wherein said substrate is to be formed with a line layer, to connect connection pad and a plurality of outer connection pad in those, and those external terminals comprise soldered ball, to be arranged on those outer connection pads.
11, a kind of high-frequency integrated circuit encapsulation structure is characterized in that it comprises:
One substrate, it has a first surface, a second surface and plurality of bump containing hole, and wherein the bottom of each projection containing hole is provided with connection pad in, and the surface of connection pad is formed with a soft soldering layer in those;
One wafer, it has an active surface and a plurality of projection on this active surface; And
One sticking eutectic substance, it is in conjunction with this active surface of this wafer and this first surface of this substrate, and those projections are to be placed in those projection containing holes of correspondence, and electrically connects those projections and connection pad in those by this soft soldering layer.
12, high-frequency integrated circuit encapsulation structure according to claim 11 is characterized in that wherein said those interior connection pads are to be unsettled metal gasket, and has the position that extends in those projection containing holes.
13, high-frequency integrated circuit encapsulation structure according to claim 11, this second surface that it is characterized in that wherein said substrate is formed with a line layer and a welding resisting layer, this line layer includes connection pad and a plurality of outer connection pad in those, local this line layer that covers of this welding resisting layer.
14, high-frequency integrated circuit encapsulation structure according to claim 13 is characterized in that it includes a plurality of soldered balls in addition, and it is arranged on a plurality of outer connection pad of this line layer and is positioned at this second surface of this substrate.
15, high-frequency integrated circuit encapsulation structure according to claim 11 is characterized in that wherein said substrate is to be an individual layer pliability circuit substrate.
16, high-frequency integrated circuit encapsulation structure according to claim 11 is characterized in that it includes one first adhesive body in addition, and it is formed at this second surface of this substrate, to seal this soft soldering layer and connection pad in those.
17, high-frequency integrated circuit encapsulation structure according to claim 16 is characterized in that it includes one second adhesive body in addition, and it is formed at this first surface of this substrate.
18, a kind of manufacture method of high-frequency integrated circuit encapsulation structure is characterized in that it may further comprise the steps:
One substrate is provided, and it is to have a first surface, a second surface and plurality of bump containing hole, and wherein the bottom of each projection containing hole is provided with connection pad in, and the surface of connection pad is formed with a soft soldering layer in those;
One wafer is provided, and it has an active surface and a plurality of projection on this active surface; And
Carry out a sticking brilliant step, by a sticking eutectic substance is in conjunction with this active surface of this wafer and this first surface of this substrate, and those projections are to be placed in those corresponding projection containing holes, sticking simultaneously brilliant or before, this soft soldering layer is that fusion is to electrically connect those projections and connection pad in those.
19, the manufacture method of high-frequency integrated circuit encapsulation structure according to claim 18 is characterized in that other includes a sealing step after aforementioned sticking brilliant step, is to form one first adhesive body in this second surface of this substrate, to seal this soft soldering layer.
20, the manufacture method of high-frequency integrated circuit encapsulation structure according to claim 18 is characterized in that wherein said those interior connection pads are to be unsettled metal gasket, and has the position that extends in those projection containing holes.
21, the manufacture method of high-frequency integrated circuit encapsulation structure according to claim 18, this second surface that it is characterized in that wherein said substrate is formed with a line layer, it includes connection pad and a plurality of outer connection pad in those, and after aforementioned sticking brilliant step, other includes and plants the ball step, and it is provided with a plurality of soldered balls outside this line layer a plurality of on the connection pad and be positioned at this second surface of this substrate.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006101112781A CN100499097C (en) | 2006-08-21 | 2006-08-21 | High-frequency integrated circuit packaging construction for improving connectivity of embedded projection and manufacturing method thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CNB2006101112781A CN100499097C (en) | 2006-08-21 | 2006-08-21 | High-frequency integrated circuit packaging construction for improving connectivity of embedded projection and manufacturing method thereof |
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| CN101131977A CN101131977A (en) | 2008-02-27 |
| CN100499097C true CN100499097C (en) | 2009-06-10 |
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