CN100490125C - Method for making base-board of liquid crystal display - Google Patents
Method for making base-board of liquid crystal display Download PDFInfo
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- CN100490125C CN100490125C CNB2006100850105A CN200610085010A CN100490125C CN 100490125 C CN100490125 C CN 100490125C CN B2006100850105 A CNB2006100850105 A CN B2006100850105A CN 200610085010 A CN200610085010 A CN 200610085010A CN 100490125 C CN100490125 C CN 100490125C
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- Thin Film Transistor (AREA)
Abstract
This invention discloses a method for manufacturing a base plate of a LCD used in improving the etched tilt angles of a semiconductor layer and an insulation layer, which utilizes an etching gas containing FS compound to etch the insulation layer to form a fine etched tilted angle and the semiconductor layer can have a side etched result to increase the coverage of the ladder to the latter process, which can process film transistors in many layers of structures containing a block layer, a semiconductor layer and an insulation layer without peeling off the layers.
Description
Technical field
The invention relates to a kind of manufacture method of thin-film transistor, refer to a kind of manufacture method that is applicable to base-board of liquid crystal display especially.
Background technology
Thin Film Transistor-LCD mainly is made of thin-film transistor array base-plate, colorful optical filter array substrate and liquid crystal layer, and wherein thin-film transistor array base-plate is a plurality of dot structures that the pixel electrode by the thin-film transistor of a plurality of arrayed and corresponding configuration with each thin-film transistor is constituted.Known normal employing six roads or five road light shield processing procedures are made thin-film transistor array base-plate, and make flow process and generally be definition gate, active area, source electrode and elements such as drain electrode, connection gasket open region and pixel region in regular turn. because manufacturing process is tediously long and complicated, cost costliness not only, and cause problems such as processing procedure defective easily, therefore how to reduce light shield road number and become the important topic that thin-film transistor array base-plate is made development with simplification processing procedure number.
The manufacture method of the thin-film transistor array base-plate of at present existing many minimizing light shield numbers and simplification processing procedure wherein utilizes film layer processing procedure to integrate mode, with originally needing the rete of twice light shield processing procedure, is incorporated into finishing in the light shield processing procedure.Because this kind method need not changed the light shield design specification, only need to adjust the making flow process of film, therefore become thin-film transistor array base-plate and reduced one of important method of light shield number and gold-tinted processing procedure.
See also shown in Figure 1, Fig. 1 is the thin-film transistor schematic diagram that the known people of having utilizes four road light shield processing procedure mades, the pattern of the main definition gate layer 11 earlier of its manufacture method and insulating barrier 12 and semiconductor layer 13, then deposit transparent conductive layer 15, deposition drain electrode and source layer 16 more at last.
The method with the electrically conducting transparent of known twice light shield processing procedure layer by layer and drain electrode be incorporated into light shield with source layer and finish, though can reach the purpose that reduces the light shield number, but the then property problem of transparency conducting layer and upper and lower rete still waits to solve, for example: excessive and the phenomenon that the generation film is peeled off of oxidation-reduction potential difference between transparency conducting layer and upper metal layers or the lower floor's semiconductor layer.
Cause between transparency conducting layer and rete the then not good problem of property in order to solve above-mentioned four road light shields, the existing barrier layer that is formed between semiconductor layer and the transparency conducting layer that utilizes, make semiconductor layer and transparency conducting layer that good Ohmic contact be arranged, to improve then property and the electrical problem between thin layer.
See also shown in Figure 2, Fig. 2 (a) to Fig. 2 (e) be the first metal layer (gate) 21, insulating barrier 22, semiconductor layer 23, ohmic contact layer 24 of well-known definitions thin-film transistor and the schematic flow sheet of barrier layer 25.Shown in Fig. 2 a, at first form the first metal layer (gate) 21 of a patterning in substrate 2 surfaces, then pile up insulating barrier 22, semiconductor layer 23, ohmic contact layer 24 and barrier layer 25 in regular turn, so that the sandwich construction just like Fig. 2 (b) to be provided.
Then, shown in Fig. 2 (c), etching barrier layer 25, ohmic contact layer 24, with semiconductor layer 23, with definition transistor switch district.When the etching semiconductor layer pattern, owing to behind upper strata barrier layer 25 patterns, can form an etching barrier layer, and influence the etching oblique angle of lower floor's ohmic contact layer 24 and semiconductor layer 23, causing semiconductor layer to form one near 90 ° etching oblique angle, is shown in Fig. 2 (d).
Though the multi-layer film structure shown in Fig. 2 (d) can improve the then property problem between rete, multi-layer film structure but causes the film height fall to produce the excessive problem in etching oblique angle greatly simultaneously.When desiring to carry out the deposition of follow-up transparency conducting layer 26 and source electrode and drain electrode layer (figure does not show), the excessive result in insulating barrier etching oblique angle will cause the rete broken string or defective such as collapse, and be shown in Fig. 2 (e).
The key of thin-film transistor array base-plate qualification rate promptly is the angle of inclination of control film, and known much in the processing procedure permissible range by the defined film of etching processing procedure angle of inclination.Have at present to adopt and adjust the angle of inclination that the etching process parameter forms with control, for example in wet etching, use special etching liquid or in dry etching, utilize special gas and process conditions to reach, but the improved process for making of wet etching or dry etching still can't satisfy good etching oblique angle simultaneously, reduces cost of manufacture, simplify demands such as processing procedure and a large amount of productions at present.
Summary of the invention
The manufacture method that the purpose of this invention is to provide a kind of base-board of liquid crystal display, not only can make insulating barrier form a good angle of inclination, to improve the step coverage of follow-up each rete, and can simplify fabrication steps to reduce the processing procedure degree of difficulty, also can reach the double effects that improves production capacity and qualification rate.
The present invention provides a kind of manufacture method of improving the Thin Film Transistor-LCD at semiconductor layer and insulating barrier etching inclination angle with substrate, except can insulating barrier being formed the good etching oblique angle by the dry etching mode, also can make multilayer thin film patterns such as barrier layer, semiconductor layer and insulating barrier, wherein barrier layer can be promoted the then property and electrically between rete, and the insulating barrier with good etching oblique angle can be avoided subsequent thin film processing procedure generation defective.Moreover the present invention can remove the complete etching of the insulating barrier of base-board of liquid crystal display transparent area, not only can improve the light transmittance of substrate, and can make semiconductor layer and insulating layer pattern form good etching inclination angle.
The invention provides a kind of manufacture method of base-board of liquid crystal display, its step that comprises has: a substrate (a) is provided; (b) form the first metal layer of a patterning in substrate surface; (c) form one first insulating barrier and semi-conductor layer in regular turn continuously in substrate surface and the first metal layer surface, and utilize a light shield, to form a plurality of transistor switches island district to the semiconductor layer patterning; (d) utilize contain fluorine sulphur compound and auxiliary etch gas etching gas with etching first insulating barrier, and make first insulating barrier form one first inclination angle and this semiconductor layer had the side direction etching effect, make this semiconductor layer form one second inclination angle; (e) form a transparency conducting layer and one second metal level in regular turn continuously in surface, district, transistor switch island and substrate surface; And (f) in each a transistor switch island district formation one source pole and a drain electrode, wherein source electrode respectively comprises second metal level with drain electrode, and does not connect each other.The formed inclination angle of the present invention's first insulating barrier is between 10 ° to 70 °, and preferable can be between 10 ° to 60 °.
Thus, the insulating barrier of thin-film transistor of the present invention can have a good etching inclination angle, can improve the step coverage of successive process, reaches electrically with the tack that promotes between rete, and can avoid the hole of each interlayer of thin-film transistor to generate.The manufacture method of base-board of liquid crystal display of the present invention also can be integrated each rete processing procedure to reduce the light shield number except forming a semiconductor layer and the insulating barrier with good etching oblique angle, simplifies processing procedure and the purpose that reduces cost of manufacture and reach.
Thin Film Transistor-LCD of the present invention mainly utilizes the rete processing procedure of film to integrate mode with the manufacture method of substrate, traditional six roads or five road light shield processing procedures are reduced to four road light shield processing procedures, after wherein defining gate layer and insulating barrier and semiconductor layer pattern earlier, then the deposit transparent conductive layer deposits drain electrode and source layer at last again.Traditional transparency conducting layer and drain electrode and source layer need the processing procedure of twice light shield to finish, owing to the present invention is incorporated into both with the light shield processing procedure, so can reach the purpose that reduces light shield.Moreover the insulating barrier of substrate transparent area of the present invention etching fully removes, so the light transmittance of substrate transparent area improves relatively.
In order to increase the then property and electrically between transparency conducting layer and upper and lower rete, the semiconductor layer of transparency conducting layer and its lower floor's active area for example, and avoid film to peel off and cause the electrical not good situation of transistor.Prepared film transistor arrangement of the present invention can more comprise a barrier layer, it is positioned between semiconductor layer and transparency conducting layer, contact (ohmic contact) so can make semiconductor layer and transparency conducting layer form the good Ohmic formula, and help the tack of subsequent thin film layer to reach electrically.
Therefore, the present invention also provides a kind of manufacture method of base-board of liquid crystal display, and its step that comprises has: a substrate (a) is provided; (b) form the first metal layer of a patterning in substrate surface; (c) form one first insulating barrier, semi-conductor layer and a barrier layer in regular turn continuously in substrate surface and the first metal layer surface, and utilize a light shield, to form a plurality of transistor switches island district to barrier layer and semiconductor layer patternization; (d) utilize contain fluorine sulphur compound and auxiliary etch gas etching gas with etching first insulating barrier, and make first insulating barrier form an inclination angle and this semiconductor layer had the side direction etching effect, make this semiconductor layer form one second inclination angle; (e) form a transparency conducting layer and one second metal level in regular turn continuously in surface, district, transistor switch island and substrate surface; And (f) in each a transistor switch island district formation one source pole and a drain electrode, wherein source electrode respectively comprises second metal level with drain electrode, and does not connect each other.The formed inclination angle of the present invention's first insulating barrier is between 10 ° to 70 °, and preferable can be between 10 ° to 60 °.
Because Thin Film Transistor-LCD of the present invention can be improved as known insulating barrier near 90 ° of etching oblique angles at 10 ° to 60 ° etching oblique angle with the manufacture method of substrate, so help the step coverage of follow-up each section film.Even when having multi-layer film structure such as barrier layer, semiconductor layer, insulating barrier when the thin-film transistor of the present invention preparation, defective phenomenon such as still can not take place that film is peeled off, breaks, collapsed.So the thin-film transistor of the present invention's preparation can have the excellent electrical property quality.
The thin-film transistor that forms for the protective substrate surface is not influenced by environmental oxidation or successive process, and the manufacture method of base-board of liquid crystal display of the present invention can more comprise a step (g), and second insulating barrier that forms a patterning is in surface, district, transistor switch island.
In manufacture method of the present invention, the fluorine content of sulphur compounds of the etching gas that step (d) is used is unrestricted, and the preferable fluorine sulphur compound that comprises 40% above content is so that first insulating barrier and semiconductor layer have the side direction etching effect.And step of the present invention (d) etching gas can comprise the fluorine sulphur compound of any kind of, preferablely can be sulphur hexafluoride (Sulfur hexafluoride), sulfur tetrafluoride (Sulfur tetrafluoride), sulfur pentafluoride (Sulfurpentafluoride) or its combination, and the better etching gas of sulphur hexafluoride to use as the side direction etching that can be.
In addition, in order to control factors such as etching speed or ambient pressure to cooperate the process requirement of etching, the etching gas that the present invention uses also can more comprise at least one auxiliary etch gas: the fluorine atom speed of dissociating is adjusted gas, for example O
2Neutral passivity gas, for example Ar, He, N
2Fluorine is an etching gas, for example CF
4, CHF
3, C
2F
6Or chlorine is etching gas, for example Cl
2, BCl
2, HCl.
Moreover the present invention has side direction etching etching gas mixes auxiliary etch gas with other flow-rate ratio can adjust its ratio according to process requirement, preferable can be between 1:1 to 100:1 scope, to increase all degree together of insulating barrier etching result.So, the mixing auxiliary etch gas that the present invention uses can in order to the etching inclination angle of control insulating barrier with and the etching result.In manufacture method of the present invention, step of the present invention (c) formed transistor switch island district can comprise the first metal layer, uses with the gate as transistor switch island district.And step of the present invention (c) forms after the semiconductor layer, can more form an ohmic contact layer in semiconductor layer surface, makes the last layer elements of semiconductor layer and thin-film transistor form good Ohmic contact, to promote the electrical quality of thin-film transistor.Wherein, the material of ohmic contact layer of the present invention can be the ohmic contact layer material that known thin-film transistor is suitable for, the preferable N that can be
+Amorphous silicon material.
In addition, in step of the present invention (d), the etching processing procedure of first insulating barrier can be the dry plasma etching, and first insulating barrier of step (d) institute etching can be transistor switch island district first insulating barrier in addition.So in the etching processing procedure of insulating barrier of the present invention, the present invention can remove the complete etching of the insulating barrier of substrate transparent area, significantly to promote the light transmission of Thin Film Transistor-LCD with substrate.
Moreover in the etching process of step of the present invention (d) first insulating barrier, the semiconductor layer that original etching is finished can have the side direction etching effect, and forms an inclination angle, and this inclination angle can be between 10 ° to 70 °, preferable can be between 10 ° to 60 °.So the employed etching gas of step of the present invention (d) can have the effect of side direction etching to the semiconductor layer and first insulating barrier, and this etching gas is rough identical with the etching speed of first insulating barrier for semiconductor layer.By this, the manufacture method of base-board of liquid crystal display of the present invention can provide semiconductor layer and the good etching inclination angle of insulating barrier, to help the stability of follow-up thin film deposition process.
In the inventive method, behind step (d) etching processing procedure, this insulating barrier etching oblique angle and this semiconductor layer all have a side direction etching effect, and the ratio at both etching inclinations angle is unrestricted, preferable can be between 0.3 to 1.5.
Step of the present invention (f) forms in the process of an one source pole and a drain electrode in each transistor switch island district, and second metal level beyond the district of removable transistor switch island is to form the source electrode and the drain pattern in transistor switch island district.Certainly, visual process requirement and keep second metal level of part beyond the district of transistor switch island is with as other purposes such as the lead of thin-film transistor array base-plate or cooperate successive process condition demand.
The step that the present invention forms barrier layer, semiconductor layer or insulating barrier can be and is known in the processing procedure that forms barrier layer, semiconductor layer or insulating barrier on the substrate, the preferable physical vapour deposition (PVD) that utilizes, for example physical vapour deposition (PVD) of ionized metal plasma (IMP-PVD); Chemical vapour deposition (CVD), for example plasma auxiliary chemical vapor deposition and thermal chemical vapor deposition; Evaporation, for example metal evaporation; Sputter, for example long sputter and the collimated sputtering of throwing; Or electroplate, for example the electroless-plating of wet process, have electricity to electroplate.
The employed barrier layer materials of the invention described above is unrestricted, preferable can be one be selected from the carborundum that mixes by silica, silicon nitride, aluminium oxide, tantalum oxide, titanium nitride, tin indium oxide, carborundum, nitrogen and oxygen, molybdenum, chromium, titanium, nickel, tungsten, ruthenium, cobalt, phosphorus, with and the material formed of combination, and goodly can be one and be selected from the material of being formed by the nitride and the combination thereof of molybdenum, chromium, titanium, nickel, tungsten, tantalum, ruthenium, cobalt, aforementioned metal.The present invention can select for use dry type or wet etching mode to carry out the barrier layer etching, and after finishing barrier layer and semiconductor layer etching, carries out the etching processing procedure of insulating barrier again in the dry etching mode, to improve the etching oblique angle of semiconductor layer and insulating barrier.
In addition, the plane display substrate that base-board of liquid crystal display manufacture method of the present invention is suitable for is unrestricted, a preferable silicon substrate, a glass substrate or the plastic base of can be, the better plane display substrate that is applicable to the active matrix drive type that can be, for example can as but be not limited thereto: aluminium borosilicate glass or its combination of unadulterated silex glass, phosphorus doping glass, boron-phosphorus doping glass, soda-lime glass, borosilicate glass, borosilicic acid sodium salt glass, alkali-metal borosilicate glass, aluminium silicate salt glass, aluminium borosilicate glass, alkaline-earth metal.
In the thin-film transistor of made of the present invention, but the material that insulating barrier of the present invention was suitable for can be any insulating material, preferablely can be organic material, inorganic or its combination, goodly can be silica, silicon nitride, silicon hydroxide or its combination.Wherein, the second mentioned insulating barrier of the present invention can be the sandwich construction of a protective layer, a flatness layer or its combination.
In the thin-film transistor of made of the present invention, the employed material of the first metal layer of the present invention is unrestricted, preferablely can be aluminium, tungsten, chromium, copper, titanium, titanium nitride (TiNx), aluminium alloy, evanohm, molybdenum or its combination, use with gate as thin-film transistor.And the employed material of the present invention's second metal level is unrestricted, preferablely can be aluminium, tungsten, chromium, copper, titanium, titanium nitride, aluminium alloy, evanohm, molybdenum or its combination, uses with drain electrode with the source electrode as thin-film transistor.Wherein, the first metal layer and second metal level can be the single or multiple lift structure.
In addition, semiconductor layer material of the present invention is unrestricted, preferable amorphous silicon material or the polycrystalline silicon material of can be.In the thin-film transistor structure that the present invention makes, semiconductor layer structure is unrestricted, the preferable sandwich construction that can be, and this sandwich construction can comprise a low deposition speed silicon layer and a high deposition velocity silicon layer.Thus, the thickness that semiconductor layer obtained and the electrical quality of sandwich construction of the present invention, the problem that can avoid subsequent etching processing procedure generation volume production to control.
So the manufacture method of base-board of liquid crystal display of the present invention also is applicable to the multilayer functional film structure of semiconductor layer/insulating barrier applicable to the making of the semiconductor layer/insulation layer structure of conventional thin film transistor.
The inventive method mainly is to utilize an etching gas etching insulating barrier that contains the fluorine sulphur compound; make insulating barrier form good etching inclination angle; and make semiconductor layer that the effect of one side direction etching be arranged; to improve the step coverage of successive process; so follow-up rete such as transparency conducting layer, source electrode and drain electrode, protective layer and the element of carrying out can avoid the film number of plies too much to cause problems such as film breaks, collapses when making.So, the present invention not only can promote the performance of thin-film transistor and the stability of processing procedure, also can reduce cost of manufacture by the simplification of light shield and processing procedure.
Description of drawings
Fig. 1 is the schematic diagram of the thin-film transistor of known employing four road light shield processing procedures.
Fig. 2 is the flow chart of insulating barrier, semiconductor layer, barrier layer and the transparency conducting layer of known making thin-film transistor.
Fig. 3 is the making flow chart of the Thin Film Transistor-LCD of a preferred embodiment of the present invention with substrate.
Description of reference numerals:
1,2,3 substrates, 11,21,31 the first metal layers
12,22,32 first insulating barriers, 13,23,33 semiconductor layers
14,24,34 ohmic contact layers, 15,26,36 transparency conducting layers
16,37 second metal levels, 25,35 barrier layers
38 second insulating barrier A transistor switch island district
B auxiliary capacitor district
Embodiment
Embodiment one
To (h), it is the making flow chart of the base-board of liquid crystal display of the present invention's one preferred embodiment to see also among Fig. 3 (a), and the Thin Film Transistor-LCD substrate that present embodiment is made is employing four road light shield processing procedures.
Shown in Fig. 3 (a), a transparent glass substrate 3 at first is provided, form the first metal layers 31 in substrate 3 surface, and carry out the first road gold-tinted and etching processing procedure to finish the gate layer pattern.Wherein, this routine the first metal layer 31 is to be made of evanohm and molybdenum, and its structure can be single or multiple lift structure (figure does not show).
Then, shown in Fig. 3 (b), deposit an insulating barrier 32, semi-conductor layer 33, an ohmic contact layer 34, with a barrier layer 35, to cover the first metal layer 31; Wherein this insulating barrier 32 is the silicon monoxide material, and this semiconductor layer 33 is an amorphous silicon (α-Si, an amorphous silicon) material, and this ohmic contact layer 34 is a N
+Amorphous silicon material, and this barrier layer 35 is a Mo.This routine ohmic contact layer 34 mainly makes and connects semiconductor layer 33 and topmost thin film transistor unit layer formation good Ohmic contact, to promote the electrical and usefulness of thin-film transistor.
Subsequently, with shown in Fig. 3 (d), carry out the second road gold-tinted and etching processing procedure as Fig. 3 (c) to define transistor switch island district A and auxiliary capacitor district B in substrate 3 surfaces.And the also visual demand of the manufacture method of base-board of liquid crystal display of the present invention defines terminal region in substrate surface.
In present embodiment second road gold-tinted and etching processing procedure, shown in Fig. 3 (c), at first, barrier layer 35 can utilize dry type or wet etching processing procedure to etch barrier layer 35 patterns, and this example is a traditional wet etching processing procedure.Then, utilize conventional dry etching processing procedure, promptly form just like the board structure shown in Fig. 3 (c) to finish the etching processing procedure of ohmic contact layer 34 and semiconductor layer 33.
Shown in Fig. 3 (d), this example is to adopt one to contain sulphur hexafluoride (SF
6) etching gas proceed the etching processing procedure of insulating barrier 32.When present embodiment is finished insulating barrier 32 patterns with dry etching after, can form an insulating barrier 32 with about 40 ° of etching inclinations angle (first inclination angle).Wherein, ohmic contact layer 34, semiconductor layer 33 that original etching is shaped have the effect of a side direction etching, and form about 55 a ° etching inclination angle (second inclination angle).Therefore, semiconductor layer 33 can form a step structure with insulating barrier 32, so that a good inclination angle to be provided, promptly helps the tack of subsequent film.
In this example, use SF
6The gas of side direction etching effect, the ratio that can make insulating barrier etching oblique angle and semiconductor layer etching oblique angle is between 0.7～1.5.Particularly, the ratio at this routine insulating barrier etching oblique angle and semiconductor layer etching oblique angle is about 0.7.
When this example is carried out insulating barrier 32 etchings, can wherein be the insulating barrier that comprises the substrate transparent area, to improve the light transmittance of substrate transparent area with not being subjected to the complete etching of insulating barrier of photoresistance pattern protection.
Because present embodiment insulating barrier 32 also adopts the dry etching processing procedure, therefore this example can with ohmic contact layer 34, semiconductor layer 33 with the etching process design of insulating barrier 32 in same board, reaching the purpose of saving cost of manufacture, and can avoid the multiple tracks technology conversion and cause the defective of processing procedure.
In the etching processing procedure of this routine insulating barrier 32, SF
6The flow of etching gas, etching high frequency power wattage (RFpower) or etching gas pressure all can influence insulating barrier etching oblique angle, for example: the every increase of etching gas flow 100sccm (sccm=standard cubic centimeter per, per minute cubic centimeter quantity), then the etching oblique angle of insulating barrier can reduce by 0.5 ° to 10 °.Therefore, the etching processing procedure of this routine insulating barrier 32 can be adjusted process parameter, to reach best etching process conditions.
Shown in Fig. 3 (e), the transistor switch island district A that deposition forms with covered substrate 3 surfaces just like the transparency conducting layer 36 of indium zinc oxide, tin indium oxide or tin indium oxide zinc and just like second metal level 37 of molybdenum material with auxiliary capacitor district B, reach substrate 3 surfaces.
Shown in Fig. 3 (f), carry out the 3rd road gold-tinted and etching processing procedure to form an one source pole and a drain electrode, to make complete transistor switch island district A structure and auxiliary capacitor district B structure in transistor switch island district A.Wherein, 33 of present embodiment transparent electrode layer 36 and lower floor's semiconductor layers have one deck barrier layer 35, with following layer, so can avoid the double-layer films different in kind and peel off or the loose contact phenomenon, so that the thin-film transistor of good electrical quality to be provided as two interlayers.
Exempt problems such as environmental oxidation for protective transistor switch island district A; shown in Fig. 3 (g) and Fig. 3 (h); deposit one second insulating barrier 38 and carry out the 4th road gold-tinted and etching processing procedure, forming second insulating barrier 38 of an one patterned, and remove second metal level 37 of substrate transparent area.Wherein, this second insulating barrier 38 can be the sandwich construction of a protective layer, a flatness layer or its combination, and this example second insulating barrier 38 is protective layers of a silicon nitride material.
The made Thin Film Transistor-LCD of present embodiment only utilizes four road light shield processing procedures with the reduction cost of manufacture with substrate, and the complete etching of the insulating barrier of substrate transparent area, can significantly promote the light transmittance of substrate.
Embodiment two
The present embodiment Thin Film Transistor-LCD is same as embodiment one described four road light shield processing procedures with the manufacture method with substrate, except semiconductor layer is sandwich construction and insulating barrier etching condition are adjusted to some extent, roughly all similar in appearance to the content shown in the embodiment one.
The semiconductor layer of present embodiment mainly is made of sandwich construction, wherein this semiconductor layer includes low deposition rate silicon layer and high deposition rate silicon layer, to form the multi-layer film structure of the first metal layer/first insulating barrier/low deposition rate silicon layer/high deposition rate silicon layer/ohmic contact layer/barrier layer in substrate surface.
In this example, the high deposition rate silicon layer helps to reduce the sedimentation time of semiconductor layer, and can increase the make efficiency of substrate.In addition, the high deposition rate silicon layer can increase semiconductor layer thickness, also can be used as the etching terminal layer, to avoid in the etching processing procedure forming element that defective is caused and interelement short circuit phenomenon such as hole because of overetch.
Moreover in the etching processing procedure of insulating barrier, the etching gas that present embodiment uses is except containing the sulphur hexafluoride (SF that can make semiconductor layer side direction etching
6) outside, also comprising the fluorine atom speed of dissociating, to adjust gas, neutral passivity gas, fluorine be that etching gas or chlorine are etching gas, to form an etching gas that mixes.
The etching gas that this example is mixed not only has the improvement effect for insulating barrier etching oblique angle, and for the result of etching, for example: etch rate reaches all degree together, and different control actions is also arranged.In this example, the flow-rate ratio that can make the sulphur hexafluoride etching gas of semiconductor layer side direction etching mix etching gas with other is about 10:1, to obtain preferable control of etching oblique angle and etching result.Certainly, the present invention has side direction etching etching gas mixes etching gas with other flow-rate ratio can adjust its ratio according to process requirement, preferable can be between 1:1 to 100:1 scope, to increase all degree together of insulating barrier etching result.So the etching oblique angle of this routine insulating barrier can be improved as 10 ° to 55 ° scopes, and controlled 0.3 to 1.1 the scope that is formed on of the ratio at formed insulating barrier etching oblique angle and semiconductor layer etching oblique angle.
Etching gas condition and effect thereof that present embodiment uses are as described below:
The fluorine atom speed of dissociating is adjusted gas, for example: O
2, in order to SF
6Reaction produces speed to increase or to reduce fluorine atom, and then the etching oblique angle of control insulating barrier.For example: adding oxygen will increase the fluorine atom generating rate that dissociates, and when the every increase of oxygen flow 100sccm, can make 0.5 ° to 15 ° of insulating barrier etching oblique angle reduction.And this routine side direction etching etching gas (for example: SF
6) mix etching gas (O with it
2) flow-rate ratio be about 25:1.Certainly, the invention process condition should not be subject to this, and preferable flow-rate ratio can be 1:1 to 50:1, and better flow-rate ratio can be 3:1 to 100:1.
Neutral passivity gas, for example: Ar, He, N
2Deng gas, in order to the gas pressure of adjusting etching environment, and this example is to use Ar.Because insulating barrier etching gas pressure has significantly affecting for insulating barrier etching oblique angle, during the every raising of etching gas pressure 10mTorr, insulating barrier etching oblique angle will reduce or raise 0.5 ° to 15 °.This routine side direction etching etching gas (for example: SF
6) flow-rate ratio of mixing etching gas (Ar) with it is about 50:1.And the invention process condition should not be subject to this, and preferable flow-rate ratio can be 1:1 to 100:1, and better flow-rate ratio can be 30:1 to 90:1.
Etching gas mixes in fluorine system, for example: CF
4, CHF
3, C
2F
6Deng gas, when etching, be used to film surface and produce product to change the etching oblique angle.In the insulating barrier etching process, this routine CF
4Etching gas is to generate macromolecule carbonization thing in surface of insulating layer.Mix the every increase of etching gas flow 100sccm when fluorine system, insulating barrier etching oblique angle can reduce by 0.5 ° to 10 ° at etching oblique angle.The etching gas of this routine side direction etching (for example: SF
6) etching gas (CF mixed with it
4) the about 80:1 of flow-rate ratio.The invention process condition should not be subject to this, and preferable flow-rate ratio can be 1:1 to 100:1, and better flow-rate ratio can be 30:1～90:1, to avoid the surface of insulating layer product too much, improves etching oblique angle and reduced insulation layer etch rate on the contrary.
Etching gas mixes in chlorine system, as Cl
2, BCl
3, gas such as HCl, in order to the etch rate of reduced insulation layer, and then reduce the etching oblique angle.The every increase of etching gas flow 100sccm mixes in chlorine system, and insulating barrier etching oblique angle can reduce by 0.5 ° to 30 ° at etching oblique angle.Because insulating barrier etching oblique angle reduction amount is bigger, the ratio at insulating barrier etching oblique angle and semiconductor layer etching oblique angle will be reduced to 0.3～0.8.The etching gas of this routine side direction etching (for example: SF
6) mix etching gas (Cl with it
2, HCl) the about 80:1 of flow-rate ratio.Note that the invention process condition should not be subject to this, preferable flow-rate ratio can be 1:1 to 100:1, and better flow-rate ratio can be 30:1～90:1, to avoid the causing insulating barrier etch rate slow excessively.
Embodiment three
The present embodiment Thin Film Transistor-LCD is same as embodiment two described process conditions with the manufacture method of substrate, also be four road light shield processing procedures, except semiconductor layer adopts the single layer structure of embodiment one, remaining process conditions, for example: the interlayer structure of etching gas and other each rete of thin-film transistor etc., roughly similar in appearance to the content shown in the embodiment two.
Embodiment four
The present embodiment Thin Film Transistor-LCD is same as embodiment two described process conditions with the manufacture method of substrate, also be four road light shield processing procedures, except thin-film transistor interlayer structure does not form the barrier layer, remaining process conditions, for example: the interlayer structure of etching gas and other each rete of thin-film transistor etc., roughly similar in appearance to the content shown in the embodiment two.
In sum, the present invention can improve the etching oblique angle of semiconductor layer and insulating barrier multilayer thin film pattern really, makes the process results at 90 ° of etching oblique angles of known convergence be improved as 10 ° to 60 ° etching oblique angles.And the etching rake angle of insulating barrier of the present invention can be according to different etching gaseous species and etching condition and is controlled.
Therefore, Thin Film Transistor-LCD of the present invention not only can promote the performance and the processing procedure stability of thin-film transistor with the manufacture method of substrate, and significantly promote the light transmittance of substrate transparent area, also can reach the purpose that reduces cost of manufacture by the simplification of light shield and processing procedure.
The foregoing description only has been convenience explanation and giving an example, and the interest field that the present invention advocated is from should being as the criterion so that claims are described, but not only limits to the foregoing description.
Claims (24)
1, a kind of manufacture method of base-board of liquid crystal display may further comprise the steps:
(a) provide a substrate;
(b) form the first metal layer of a patterning in this substrate surface;
(c) form one first insulating barrier, semi-conductor layer and a barrier layer in regular turn continuously in this substrate surface and this first metal layer surface, and utilize a light shield, to form a plurality of transistor switches island district to this barrier layer and this semiconductor layer patternization;
(d) utilization contains an etching gas of a fluorine sulphur compound and an auxiliary etch gas with this first insulating barrier of etching, and make this first insulating barrier form one first inclination angle and this semiconductor layer is had the side direction etching effect, make this semiconductor layer form one second inclination angle, wherein this first inclination angle is between 10 ° to 70 °, and this second inclination angle is between 10 ° to 70 °;
(e) form a transparency conducting layer and one second metal level in regular turn continuously in these surface, transistor switch island district and this substrate surface; And
(f) form an one source pole and a drain electrode in each this transistor switch island district, wherein this source electrode and this drain electrode respectively comprise this second metal level, and do not connect each other.
2, the method for claim 1 is characterized in that, more comprises a step (g), and second insulating barrier that forms a patterning is in these surfaces, district, transistor switch island.
3, the method for claim 1 is characterized in that, this etching gas is the fluorine sulphur compound that comprises 40% above content.
4, the method for claim 1 is characterized in that, this fluorine sulphur compound is sulphur hexafluoride, sulfur tetrafluoride, sulfur pentafluoride or its combination.
5, the method for claim 1 is characterized in that, this auxiliary etch gas is O
2, Ar, He, N
2, CF
4, CHF
3, C
2F
6, Cl
2, BCl
2Or HCl.
6, method as claimed in claim 5 is characterized in that, in this etching gas, the flow-rate ratio of this fluorine sulphur compound and described auxiliary etch gas is between 1:1 to 100:1 scope.
7, the method for claim 1 is characterized in that, this first inclination angle that this first insulating barrier forms is between 10 ° to 60 °.
8, the method for claim 1 is characterized in that, the formed described transistor switch island of this step (c) district comprises this first metal layer.
9, the method for claim 1 is characterized in that, this step (c) forms after this semiconductor layer, more comprises to form an ohmic contact layer in this semiconductor layer surface.
10, the method for claim 1 is characterized in that, the etching of this step (d) is to utilize a dry etching.
11, the method for claim 1 is characterized in that, this first insulating barrier of this step (d) institute etching is this first insulating barrier beyond the district of described transistor switch island.
12, the method for claim 1 is characterized in that, the ratio at first inclination angle of this first insulating barrier etching and second inclination angle of this semiconductor layer etching is between 0.3 to 1.5.
13, a kind of manufacture method of base-board of liquid crystal display, it may further comprise the steps:
(a) provide a substrate;
(b) form the first metal layer of a patterning in this substrate surface;
(c) form one first insulating barrier and semi-conductor layer in regular turn continuously in this substrate surface and this first metal layer surface, and utilize a light shield, to form a plurality of transistor switches island district to this semiconductor layer patternization;
(d) utilization contains an etching gas of a fluorine sulphur compound and an auxiliary etch gas with this first insulating barrier of etching, and make this first insulating barrier form one first inclination angle and this semiconductor layer is had the side direction etching effect, make this semiconductor layer form one second inclination angle, wherein this first inclination angle is between 10 ° to 70 °, and this second this inclination angle is between 10 ° to 70 °;
(e) form a transparency conducting layer and one second metal level in regular turn continuously in surface, described transistor switch island district and this substrate surface; And
(f) form an one source pole and a drain electrode in each this transistor switch island district, wherein this source electrode and this drain electrode respectively comprise this second metal level, and do not connect each other.
14, method as claimed in claim 13 is characterized in that, more comprises a step (g), and second insulating barrier that forms a patterning is in surface, district, described transistor switch island.
15, method as claimed in claim 13 is characterized in that, this etching gas is the fluorine sulphur compound that comprises 40% above content.
16, method as claimed in claim 13 is characterized in that, this fluorine sulphur compound is sulphur hexafluoride, sulfur tetrafluoride, sulfur pentafluoride or its combination.
17, method as claimed in claim 13 is characterized in that, this assist gas is O
2, Ar, He, N
2, CF
4, CHF
3, C
2F
6, Cl
2, BCl
2Or HCl.
18, method as claimed in claim 17 is characterized in that, in this etching gas, the flow-rate ratio of this fluorine sulphur compound and described assist gas is between 1:1 to 100:1 scope.
19, method as claimed in claim 13 is characterized in that, this inclination angle that this first insulating barrier forms is between 10 ° to 60 °.
20, method as claimed in claim 13 is characterized in that, the formed described transistor switch island of this step (c) district comprises this first metal layer.
21, method as claimed in claim 13 is characterized in that, this step (c) forms after this semiconductor layer and forms before this barrier layer, more comprises to form an ohmic contact layer in this semiconductor layer surface.
22, method as claimed in claim 13 is characterized in that, the etching of this step (d) is to utilize a dry etching.
23, method as claimed in claim 13 is characterized in that, this first insulating barrier of this step (d) institute etching is this first insulating barrier beyond the district of described transistor switch island.
24, method as claimed in claim 13 is characterized in that, the ratio at first inclination angle of this first insulating barrier etching and second inclination angle of this semiconductor layer etching is between 0.3 to 1.5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100850105A CN100490125C (en) | 2006-05-30 | 2006-05-30 | Method for making base-board of liquid crystal display |
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|---|---|---|---|
| CNB2006100850105A CN100490125C (en) | 2006-05-30 | 2006-05-30 | Method for making base-board of liquid crystal display |
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| CN100490125C true CN100490125C (en) | 2009-05-20 |
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| TWI360708B (en) | 2007-12-17 | 2012-03-21 | Au Optronics Corp | Pixel structure, display panel, elecro-optical app |
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