CN100470781C - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN100470781C
CN100470781C CNB2006100747015A CN200610074701A CN100470781C CN 100470781 C CN100470781 C CN 100470781C CN B2006100747015 A CNB2006100747015 A CN B2006100747015A CN 200610074701 A CN200610074701 A CN 200610074701A CN 100470781 C CN100470781 C CN 100470781C
Authority
CN
China
Prior art keywords
wiring
semiconductor device
insulating film
semiconductor
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CNB2006100747015A
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English (en)
Chinese (zh)
Other versions
CN1855469A (zh
Inventor
野间崇
篠木裕之
高井信行
北川胜彦
德重利洋智
太田垣贵康
安藤达也
沖川满
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Publication of CN1855469A publication Critical patent/CN1855469A/zh
Application granted granted Critical
Publication of CN100470781C publication Critical patent/CN100470781C/zh
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0238—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes through pads or through electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0234—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes that stop on pads or on electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0242—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes from the back sides of the chips, wafers or substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
CNB2006100747015A 2002-04-23 2003-04-23 半导体装置及其制造方法 Expired - Lifetime CN100470781C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2002120369 2002-04-23
JP2002120369 2002-04-23
JP2002185749 2002-06-26

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CNB031229913A Division CN1257550C (zh) 2002-04-23 2003-04-23 半导体装置及其制造方法

Publications (2)

Publication Number Publication Date
CN1855469A CN1855469A (zh) 2006-11-01
CN100470781C true CN100470781C (zh) 2009-03-18

Family

ID=37195490

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2006100747015A Expired - Lifetime CN100470781C (zh) 2002-04-23 2003-04-23 半导体装置及其制造方法

Country Status (2)

Country Link
JP (1) JP5238985B2 (https=)
CN (1) CN100470781C (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009032929A (ja) * 2007-07-27 2009-02-12 Sanyo Electric Co Ltd 半導体装置及びその製造方法
CN102339844A (zh) * 2011-10-08 2012-02-01 江阴长电先进封装有限公司 无硅通孔低成本图像传感器封装结构的实现方法
CN102339843A (zh) * 2011-10-08 2012-02-01 江阴长电先进封装有限公司 无硅通孔低成本图像传感器封装结构
CN118248567A (zh) * 2022-12-23 2024-06-25 华润润安科技(重庆)有限公司 半导体结构的制造方法及半导体结构

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL123207A0 (en) * 1998-02-06 1998-09-24 Shellcase Ltd Integrated circuit device
DE69934466T2 (de) * 1998-03-16 2007-09-27 Koninklijke Philips Electronics N.V. Herstellungsverfahren von halbleiteranordnungen als chip-size packung
JP3839271B2 (ja) * 2001-05-01 2006-11-01 富士写真フイルム株式会社 固体撮像装置及びその製造方法

Also Published As

Publication number Publication date
JP2010016395A (ja) 2010-01-21
CN1855469A (zh) 2006-11-01
JP5238985B2 (ja) 2013-07-17

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Granted publication date: 20090318

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