JP5238985B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP5238985B2
JP5238985B2 JP2009203621A JP2009203621A JP5238985B2 JP 5238985 B2 JP5238985 B2 JP 5238985B2 JP 2009203621 A JP2009203621 A JP 2009203621A JP 2009203621 A JP2009203621 A JP 2009203621A JP 5238985 B2 JP5238985 B2 JP 5238985B2
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JP
Japan
Prior art keywords
wiring
semiconductor
forming
insulating film
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2009203621A
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English (en)
Japanese (ja)
Other versions
JP2010016395A (ja
JP2010016395A5 (https=
Inventor
崇 野間
裕之 篠木
信行 高井
勝彦 北川
利洋智 徳重
貴康 太田垣
達也 安藤
満 沖川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Components Industries LLC
Original Assignee
Semiconductor Components Industries LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Components Industries LLC filed Critical Semiconductor Components Industries LLC
Priority to JP2009203621A priority Critical patent/JP5238985B2/ja
Publication of JP2010016395A publication Critical patent/JP2010016395A/ja
Publication of JP2010016395A5 publication Critical patent/JP2010016395A5/ja
Application granted granted Critical
Publication of JP5238985B2 publication Critical patent/JP5238985B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0238—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes through pads or through electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0234—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes that stop on pads or on electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0242—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes from the back sides of the chips, wafers or substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
JP2009203621A 2002-04-23 2009-09-03 半導体装置の製造方法 Expired - Lifetime JP5238985B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009203621A JP5238985B2 (ja) 2002-04-23 2009-09-03 半導体装置の製造方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2002120369 2002-04-23
JP2002120369 2002-04-23
JP2009203621A JP5238985B2 (ja) 2002-04-23 2009-09-03 半導体装置の製造方法

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2005197942A Division JP4401330B2 (ja) 2002-04-23 2005-07-06 半導体装置及びその製造方法

Publications (3)

Publication Number Publication Date
JP2010016395A JP2010016395A (ja) 2010-01-21
JP2010016395A5 JP2010016395A5 (https=) 2010-03-04
JP5238985B2 true JP5238985B2 (ja) 2013-07-17

Family

ID=37195490

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009203621A Expired - Lifetime JP5238985B2 (ja) 2002-04-23 2009-09-03 半導体装置の製造方法

Country Status (2)

Country Link
JP (1) JP5238985B2 (https=)
CN (1) CN100470781C (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009032929A (ja) * 2007-07-27 2009-02-12 Sanyo Electric Co Ltd 半導体装置及びその製造方法
CN102339844A (zh) * 2011-10-08 2012-02-01 江阴长电先进封装有限公司 无硅通孔低成本图像传感器封装结构的实现方法
CN102339843A (zh) * 2011-10-08 2012-02-01 江阴长电先进封装有限公司 无硅通孔低成本图像传感器封装结构
CN118248567A (zh) * 2022-12-23 2024-06-25 华润润安科技(重庆)有限公司 半导体结构的制造方法及半导体结构

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL123207A0 (en) * 1998-02-06 1998-09-24 Shellcase Ltd Integrated circuit device
DE69934466T2 (de) * 1998-03-16 2007-09-27 Koninklijke Philips Electronics N.V. Herstellungsverfahren von halbleiteranordnungen als chip-size packung
JP3839271B2 (ja) * 2001-05-01 2006-11-01 富士写真フイルム株式会社 固体撮像装置及びその製造方法

Also Published As

Publication number Publication date
JP2010016395A (ja) 2010-01-21
CN100470781C (zh) 2009-03-18
CN1855469A (zh) 2006-11-01

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