CN100463232C - 4H-SiC avalanche photodetector and its preparing method - Google Patents
4H-SiC avalanche photodetector and its preparing method Download PDFInfo
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Abstract
This invention provides a 4H-SiC snowslide photo-electric detector having high internal gain under low breakdown voltage, not sensitive to visible light and infrared light and testing UV light, weak signals and single-photon signals and its preparation method, in which, the photo-electric detector includes a n+type 4H-SiC substrate, an n-type epitaxial absorption layer, an n-type epitaxial multiplying layer and a p+ epitaxial layer orderly grow from the bottom up on the substrate, a passive film is set on the surface of the device, the epitaxial layer has a p electrode with a weld set on it and an n electrode is set on the back of the substrate, in preparation, the epitaxial plate is cleaned normally to prepare all table-boards then oxidation layer as the passive layer of the chip, the p electrode region is etched to erode the oxidation layer at the electrode pattern place, sputtering Ti/Al/Au as the contact metal of the p electrode to form n-type ohm contact on the back of the substrate.
Description
Technical field
The present invention relates to a kind of photodetector, especially relate to a kind of 4H-SiC base snowslide semiconductor UV photodetector and preparation method thereof with internal gain.
Background technology
UV photodetector military, industry and civilian aspect very important use is all arranged.To the silica-based UV photodetector of the general at present employing of detection of ultraviolet light, but document (1. high-tech communication, 2002:104-109; 2. semiconductor optoelectronic, 2003,24 (1): 5-11) point out, silicon-based semiconductor ultraviolet measuring technology can be utilized ripe silicon technology, but since silicon materials self can with restriction, make the silicon based opto-electronics detector all very sensitive, therefore when using, add complexity and expensive filter plate at window as UV photodetector to visible light and infrared light.The band gap width of 4H-SiC is about 3.24eV, makes it can directly not consider the influence to UV signal of visible and infrared light background to ultraviolet detector.In addition, because the ionization coefficient ratio of 4H-SiC hole and electronics is about 10, make 4H-SiC be fit to do avalanche photodetector (having little multiplication noise).The snowslide semiconductor photo detector has internal gain, can improve the sensitivity of measurement, also can detect small-signal and single photon.Photomultiplier is generally used in the detection of small-signal and single photon at present, but there is bigger, the fragile and shortcoming such as need work of size in this detection means under high pressure low temperature.(Solid-StateElectronics such as Feng Yan, 2000,44:41) and (IEEE Photonics TechnologyLetters such as Xiangyi Guo, 2006,18 (1): 136) reported the 4H-SiC avalanche ultraviolet electric explorer of analog structure, its shortcoming is just can reach higher multiplication factor under higher puncture voltage.Because the normal operating voltage of avalanche probe is near puncture voltage, under the prerequisite that guarantees 4H-SiC avalanche ultraviolet electric explorer excellent performance, puncture voltage is low more good more.
Summary of the invention
The objective of the invention is under higher puncture voltage, just can reach higher deficiencies such as multiplication factor at what existing 4H-SiC avalanche ultraviolet electric explorer existed, a kind of high internal gain that has under low breakdown voltage is provided, insensitive to visible light and infrared light, 4H-SiC avalanche photodetector that can directly detect and preparation method thereof to ultraviolet light, small-signal and single photon signal.
Technical scheme of the present invention is to have adopted absorbed layer to separate the avalanche photodetector structure with dynode layer, and this structure both can reduce the puncture voltage of device, improves the response time of device, can improve the quantum efficiency of device again.
4H-SiC avalanche photodetector of the present invention is provided with n
+Type 4H-SiC substrate is at n
+Growing n-type extension absorbed layer (abbreviation absorbed layer), n type extension dynode layer (abbreviation dynode layer) and p+ epitaxial loayer successively from top to bottom on the type 4H-SiC substrate, n type extension absorbed layer can for the intrinsic layer of involuntary doping or doping content scope 1 * 10
15/ cm
3～1 * 10
1The lightly-doped layer of 6/cm3, its thickness are 0.5～2 μ m; The doping content scope of n type extension dynode layer is 1 * 10
16/cm3～1 * 10
18/ cm3, its thickness are 0.05～0.5 μ m; Its doping content of p+ epitaxial loayer is at least 1 * 10
18/ cm
3, its thickness is 0.1～0.5 μ m.The surface of device is by the passivating film of thermal oxidation generation one deck silica, at p
+Epitaxial loayer is provided with p type electrode, and magnetron sputtering Ti/Au is provided with n type electrode as the pad contacting metal at the back side of substrate on p type electrode.
The present invention preferably is provided with at least 3 table tops, and mesa width is preferably less than 50 μ m.Table top is preferably established 3, and the position of 3 table tops is located at substrate respectively, on n type extension dynode layer and the p+ epitaxial loayer.
P type electrode metal is preferably metal Ti/Au, Al/Au, Al/Ti/Au or Ti/Al/Au, and n type electrode metal is preferably Ni/Au.
The preparation method of 4H-SiC avalanche photodetector of the present invention may further comprise the steps:
1. the good epitaxial wafer of growing is carried out standard cleaning;
2. the preparation of table top: adopt first reticle photoetching outermost table top figure, developing removes the photoresist on the table top; Sputter nickel metal is as the mask of back dry etching; Adopt plasma-induced dry etching; Erode the nickel of chip surface; Clean the back and make the figure of second table top by lithography, directly carry out the dry etching second time as the mask of dry etching with photoresist with second reticle; Wash the photoresist on surface, adopt the 3rd reticle to make innermost table top figure by lithography, do the mask of etching for the third time with photoresist, carry out dry etching for the third time; Until intact all table tops of etching;
3. the preparation of oxide layer: do standard cleaning before the thermal oxidation, chip is put in the oxidation furnace, chip is carried out dry-oxygen oxidation, wet-oxygen oxidation and dry-oxygen oxidation successively, form oxide layer; Take out well-oxygenated sample for the first time, putting into buffered hydrofluoric acid solution corrodes, remove the oxide layer that oxidation for the first time forms, put chip into oxidation furnace once more after rinsing well and carry out the oxidation second time, the method that oxidation is for the second time adopted is identical with oxidation for the first time, and the oxide layer of generation is as the passivation layer of chip;
4. the preparation of electrode: two the slotting silk p type electrode districts that have that on photosurface, make annular by lithography, and erode the oxide layer at electrode pattern place with buffered hydrofluoric acid, magnetron sputtering Ti/Al/Au is as p type electrode contacting metal, the back side of chip substrate forms n type ohmic contact, two kinds of last good Ohmic contact that form of ohmic contact annealing at high temperature simultaneously;
5. the square pad area of photoetching, magnetron sputtering Ti/Au is as pad metal.
The good epitaxial wafer of growing is carried out standard cleaning can adopt following method:
A. use toluene, acetone and ethanol ultrasonic cleaning 3 times, rinse well with deionized water again.
B. boil respectively liquid (ammoniacal liquor by volume: hydrogen peroxide: water=1:1:5) and No. two liquid (hydrochloric acid by volume: hydrogen peroxide: each 15min of water=1:1:5), rinse well with deionized water again.
C. chip is put into hydrofluoric acid and soak 3～5min, rinse the back well with deionized water again and dry up stand-by with nitrogen.
The table top preparation can be adopted from outside to inside, and to 3 table tops of shallow preparation, the degree of depth of 3 table tops is respectively d1, d2 and d3 from deeply, and in the table top preparation process, adopting the plasma-induced dry etching degree of depth is d1-d2; Erode the nickel of chip surface again with chloroazotic acid, clean the back and make the figure of second table top by lithography with second reticle, directly carry out the dry etching second time as the mask of dry etching with photoresist, etching depth is d2-d3; Wash the photoresist on surface, adopt the 3rd reticle to make innermost table top figure by lithography, do the mask of etching for the third time with photoresist, carry out dry etching for the third time, form 3 table tops simultaneously; The final table top of isolating is positioned at substrate layer, and 2 table top terminal extensions lay respectively at the n type extension dynode layer and the p of chip
+Epitaxial loayer.
In the preparation process of electrode; the back side of described chip substrate forms n type ohmic contact; can adopt the preparation of following method: the device front is protected with photoresist, erodes back side oxide layer with buffered hydrofluoric acid then, again at the back side of substrate magnetron sputtering Ni/Au as n type electrode contacting metal.
The effect of carbofrax material substrate and 3 epitaxial loayers is as follows: selecting heavily doped n type silicon carbide substrates is to have lower conductivity because of comparing with p type carborundum.P+ epitaxial loayer one is to be used for forming p type ohmic contact, and another effect is to form the p-n junction that device needs with n type extension dynode layer.Because the doping content of n type extension dynode layer compares p
+The doping content of epitaxial loayer is hanged down 2 orders of magnitude, and when adding reverse biased, the depletion layer of p-n junction so n type extension dynode layer internal electric field strength ratio is higher, has constituted the multiplication region of device basically all in n type extension dynode layer one side.The thickness of n type extension absorbed layer is bigger, and the light major part is absorbed at this layer, and this layer is the absorbed layer of device.This absorbed layer and n type extension dynode layer separated structures can make the dynode layer of device enough little and absorbed layer is thick as far as possible.Because n type extension dynode layer is less, therefore can makes entire device that unified multiplier effect takes place, and prolong the quantum efficiency that absorber thickness can increase device effectively.
Below principle of the present invention done one simply introduce.In actual applications, require detector under lower bias voltage, to work.Certainly, from the volume of AC-DC converter and the requirement of reliability, lower operating voltage meets the requirements.For avalanche photodetector, its normal operating voltage is near puncture voltage, so puncture voltage is low more good more on the basis that guarantees the avalanche probe performance.In order to make the avalanche-type photodetector have the high performance lower puncture voltage that has simultaneously, the electric field in the charge carrier drift region can be reduced to lower but still be enough to keep the value of charge carrier with the saturation drift velocity drift.In order to satisfy this requirement, the punch avalanche photodetector structure that has adopted absorbed layer to separate with dynode layer.This structure makes the dynode layer of device enough little and absorbed layer is thick as far as possible.Unified multiplier effect takes place in the less entire device that can make of dynode layer, and prolongs the quantum efficiency that absorber thickness can increase device effectively.The characteristics of this structure are after reverse voltage reaches the punch through voltage of device, and depletion region is just from p
+Expand to substrate.But only have the required high electric field of the carrier impact ionization of generation in the avalanche region, wherein a part of voltage drop drops on the avalanche region, and another part voltage drop drops on the uptake zone.Light is from positive incident, and the photon energy on inciding the avalanche photodetector photosurface just can make an electronics transit to conduction band from valence band by intrinsic excitation, thereby produce charge carrier during more than or equal to the energy gap of semi-conducting material.Under the depletion region effect of electric field, electron-hole pair is to the drift of the two ends of device, and the hole will near the drift of the multiplication region p-n junction under effect of electric field.In the high electric field region of a high back-biased p-n junction, the hole obtains enough energy with the saturated velocity drift and from electric field, thereby excites new electron-hole pair by the collision ionization.A succession of such collision ionization causes the charge carrier multiplication.
This shows that compare with existing photodetector, the present invention has following outstanding advantage.1. the band gap width owing to the 4H-SiC material is 3.24eV, so spectral response range does not respond visible light and infrared light at the ultraviolet light wave band.2. because the punch structure that adopted absorbed layer to separate with dynode layer, so device has that breakdown potential is forced down, the response time reaches the quantum efficiency advantages of higher soon.3. adopt many table tops terminal structure to suppress the edge breakdown of device effectively, make device have high multiplication factor, improved the sensitivity of device ultraviolet detection, can carry out the detection of small-signal and single photon signal.4. has high temperature resistant and radiation-resistant advantage.
Description of drawings
Fig. 1 is the cross section structure schematic diagram of the embodiment of the invention.
Fig. 2 is the vertical view of Fig. 1.
Fig. 3 is photoelectric current, dark current and the multiplication factor of the embodiment of the invention variation relation with voltage.In Fig. 3, abscissa is reverse voltage/V, and left ordinate is electric current/A, and right ordinate is a multiplication factor.3 sets of curves are followed successively by photoelectric current (Photo current), dark current (Dark current) and multiplication current (Gain) from top to bottom.
Fig. 4 is the spectral response curve of 4H-SiC avalanche ultraviolet electric explorer of the present invention.In Fig. 4, abscissa is incident wavelength (nm), and ordinate is a relative spectral response, and upper curve is 0V, and lower curve is 30V.
Embodiment
Referring to Fig. 1 and 2,4H-SiC avalanche ultraviolet electric explorer of the present invention mainly comprises heavily doped n type silicon carbide substrates 2, and 3 layers of epitaxial loayer of growing successively from top to bottom on substrate, is respectively n type extension absorbed layer 11, n type extension dynode layer 10 and p
+Epitaxial loayer 9; The darkest step 3 is as the isolation between the device, above 2 table tops be referred to as table top 5, as the terminal extension of device architecture, the suppression device edge-crowding effect of current also prevents the puncture in advance of device edge; Sample surfaces parcel oxide layer 4; The device the superiors are photosurfaces 7 of oxidized layer 4 protection.Have ring-like on the photosurface 7 and have two p type electrodes 8 of inserting silk, electrode is provided with pad 6; The back side of entire device is n type electrode 1.Photosurface 7 can also can be other shape for circle, and p type electrode changes along with the change of photosurface shape.In order to collect charge carrier better, electrode all is the annular around photosurface, and has the slotting silk that stretches to the photosurface center.Passivation layer can be the oxide layer that thermal oxidation generates, also can be on the oxide layer that thermal oxidation generates again using plasma strengthen the passivation layer of chemical vapour deposition (CVD) (PECVD) or low-pressure chemical vapor deposition (LPCVD) growth one deck silica or silicon nitride.
Below provide the example of preparation 4H-SiC avalanche ultraviolet electric explorer.
1. to the good epitaxial wafer standard cleaning of growing: with toluene, acetone and ethanol ultrasonic cleaning 3 times, clean earlier with deionized water; Boil respectively liquid (ammoniacal liquor: hydrogen peroxide: water=1:1:5) and No. two liquid (hydrochloric acid: hydrogen peroxide: each 15min of water=1:1:5), clean with deionized water; Chip is put into hydrofluoric acid soak 3～5min, clean the back with deionized water and dry up stand-by with nitrogen.
2. preparation table top: establishing from outside to inside, the degree of depth of 3 table tops is respectively d1 (1.6 μ m), d2 (0.4 μ m) and d3 (0.25 μ m), then concrete table top preparation process is as follows: adopt first reticle photoetching outermost table top figure, developing removes the photoresist on the table top; Sputter nickel metal is as the mask of back dry etching; Adopting the plasma-induced dry etching degree of depth is d1-d2=1.2 μ m; Erode the nickel of chip surface with chloroazotic acid; Clean the back and make the figure of second table top by lithography with second reticle, directly carry out the dry etching second time as the mask of dry etching with photoresist, etching depth is d2-d3=0.15 μ m; Wash the photoresist on surface, adopt the 3rd reticle to make innermost table top figure by lithography, do the mask of etching for the third time with photoresist, carry out dry etching for the third time, etch thicknesses is d3 (0.25 μ m).Form 3 table tops so simultaneously.The final table top of isolating is positioned at substrate layer, and 2 table top terminal extensions lay respectively at the n type extension dynode layer and the p of chip
+Epitaxial loayer.
3. preparation oxide layer: do standard cleaning before the thermal oxidation at first once more, the oxidation of sacrifice layer is also named in thermal oxidation for the first time; Chip is put in the oxidation furnace, adopted dried oxygen, wet oxygen and dried oxygen alternating oxidation thickness to be about 100
Oxide layer; Take out well-oxygenated sample for the first time, put into buffered hydrofluoric acid solution and corrode, remove the oxide layer that oxidation for the first time forms, rinse well with deionized water; Put chip into oxidation furnace once more and carry out the oxidation second time.Secondary oxidation is same to adopt dried oxygen, wet oxygen and dried oxygen alternately, generates thickness and is about 600
Oxide layer as the passivation layer of chip.
4. preparation electrode: the having two and insert silk p type electrode districts of photoetching annular on photosurface, and erode the oxide layer at electrode pattern place with buffered hydrofluoric acid; Magnetron sputtering Ti/Al/Au is as p type electrode contacting metal; The chip substrate back side is used for forming n type ohmic contact, and its preparation process is as follows: the device front is protected with photoresist, erodes back side oxide layer with buffered hydrofluoric acid then, again at the back side of substrate magnetron sputtering Ni/Au as n type electrode contacting metal; The last good Ohmic contact that forms of last two kinds of ohmic contact annealing at high temperature simultaneously; At last, the pad area that photoetching is square, magnetron sputtering Ti/Au is as pad metal.
Below by test circuit device is tested, its method of testing and result are as follows.
The measurement of photoelectric current, dark current and spectral response can adopt a cover test macro of computer control to finish, test macro comprises the applying bias of needs when a Keithley2410 source and course table is used to provide the device measurement, a Keithley6514 electrometer, can measure weak current, precision can reach 0.1fA.The used light source of the measurement of spectral response is the xenon arc lamp of power 450W, carries out beam split by monochromator.Because the restriction of monochromator, the wave-length coverage of measurement is 200～400nm.Light source is calibrated by standard silicon 222 detectors that a ultraviolet strengthens.Photoelectric current, dark current and the direct current multiplication factor of the device that test obtains are as shown in Figure 3.Found out that by Fig. 3 the dark current of device is at the 10pA order of magnitude, photoelectric current is to obtain under the UV-irradiation of 280nm wavelength.As can be seen, under the incident light irradiation of single wavelength, the photoelectric current of device exceeds 3 orders of magnitude than dark current, illustrates that the present invention has sensitive response to ultraviolet light.The puncture voltage of device is about 55V, and near puncture voltage, the direct current multiplication factor is greater than 10
4These presentation of results devices have high multiplication factor under low puncture voltage, the detectivity of device is improved a lot, and have satisfied the requirement of designs.
Fig. 4 provides the spectral response curve of device.Under the 0V bias voltage, response wave length scope of the present invention is at 200～380nm, and the peak value of response wave length is positioned at 260nm, and the UV, visible light ratio of device is about 1000.Along with the rising of reverse voltage, responsiveness improves accordingly.These presentation of results devices can effectively carry out the detection of ultraviolet light, and are not subjected to the influence of visible light and infrared light background basically.
Claims (5)
1.4H-SiC avalanche photodetector is characterized in that being provided with n
+Type 4H-SiC substrate is at n
+Growing n-type extension absorbed layer, n type extension dynode layer and p successively from top to bottom on the type 4H-SiC substrate
+Epitaxial loayer, n type extension absorbed layer can for the intrinsic layer of involuntary doping or doping content scope 1 * 10
15/ cm
3～1 * 10
16/ cm
3Lightly-doped layer, its thickness is 0.5～2 μ m; The doping content scope of n type extension dynode layer is 1 * 10
16/ cm
3～1 * 10
18/ cm
3, its thickness is 0.05～0.5 μ m; p
+Its doping content of epitaxial loayer is at least 1 * 10
18/ cm
3, its thickness is 0.1～0.5 μ m, the surface of device is by the passivating film of thermal oxidation generation one deck silica, at p
+Epitaxial loayer is provided with p type electrode, and magnetron sputtering Ti/Au is provided with n type electrode as the pad contacting metal at the back side of substrate on p type electrode;
Be provided with 3 table tops, mesa width is less than 50 μ m, and the position of 3 table tops is located at substrate respectively, n type extension dynode layer and p
+On the epitaxial loayer;
P type electrode is Ti/Au electrode, Al/Au electrode, Al/Ti/Au electrode or Ti/Al/Au electrode;
N type electrode is the Ni/Au electrode.
2. the preparation method of 4H-SiC avalanche photodetector as claimed in claim 1 is characterized in that may further comprise the steps:
1) the good epitaxial wafer of growing is carried out standard cleaning;
2) preparation of table top: adopt first reticle photoetching outermost table top figure, developing removes the photoresist on the table top; Sputter nickel metal is as the mask of back dry etching; Adopt plasma-induced dry etching; Erode the nickel of chip surface; Clean the back and make the figure of second table top by lithography, directly carry out the dry etching second time as the mask of dry etching with photoresist with second reticle; Wash the photoresist on surface, adopt the 3rd reticle to make innermost table top figure by lithography, do the mask of etching for the third time with photoresist, carry out dry etching for the third time; Until intact all table tops of etching;
3) preparation of oxide layer: do standard cleaning before the thermal oxidation, chip is put in the oxidation furnace, chip is carried out dry-oxygen oxidation, wet-oxygen oxidation and dry-oxygen oxidation successively, form oxide layer; Take out well-oxygenated sample for the first time, putting into buffered hydrofluoric acid solution corrodes, remove the oxide layer that oxidation for the first time forms, put chip into oxidation furnace once more after rinsing well and carry out the oxidation second time, the method that oxidation is for the second time adopted is identical with oxidation for the first time, and the oxide layer of generation is as the passivation layer of chip;
4) preparation of electrode: two the slotting silk p type electrode districts that have that on photosurface, make annular by lithography, and erode the oxide layer at electrode pattern place with buffered hydrofluoric acid, magnetron sputtering Ti/Al/Au is as p type electrode contacting metal, the back side of chip substrate forms n type ohmic contact, two kinds of last good Ohmic contact that form of ohmic contact annealing at high temperature simultaneously;
5) the square pad area of photoetching, magnetron sputtering Ti/Au is as pad metal.
3. the preparation method of 4H-SiC avalanche photodetector as claimed in claim 2 is characterized in that the good epitaxial wafer of growing is carried out standard cleaning adopts following method:
1) with toluene, acetone and ethanol ultrasonic cleaning 3 times, rinses well with deionized water again;
2) boil a liquid and No. two each 15min of liquid respectively, rinse well with deionized water, liquid is ammoniacal liquor by volume: hydrogen peroxide: water=1:1:5, No. two liquid be hydrochloric acid by volume: hydrogen peroxide: water=1:1:5;
3) chip is put into hydrofluoric acid and soak 3～5min, rinse the back well with deionized water again and dry up stand-by with nitrogen.
4. the preparation method of 4H-SiC avalanche photodetector as claimed in claim 2, the preparation that it is characterized in that table top is adopted from outside to inside, to 3 table tops of shallow preparation, the degree of depth of 3 table tops is respectively d1, d2 and d3 from deeply, and adopting the plasma-induced dry etching degree of depth is d1-d2; Erode the nickel of chip surface again with chloroazotic acid, clean the back and make the figure of second table top by lithography with second reticle, directly carry out the dry etching second time as the mask of dry etching with photoresist, etching depth is d2-d3; Wash the photoresist on surface, adopt the 3rd reticle to make innermost table top figure by lithography, do the mask of etching for the third time with photoresist, carry out dry etching for the third time, etching depth is d3, forms 3 table tops simultaneously; The final table top of isolating is positioned at substrate layer, and 2 table top terminal extensions lay respectively at the n type extension dynode layer and the p of chip
+Epitaxial loayer.
5. the preparation method of 4H-SiC avalanche photodetector as claimed in claim 2; it is characterized in that in the preparation process of electrode; the back side of described chip substrate forms n type ohmic contact and adopts following method preparation: the device front is protected with photoresist; erode back side oxide layer with buffered hydrofluoric acid then, again at the back side of substrate magnetron sputtering Ni/Au as n type electrode contacting metal.
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| CN1988185A (en) | 2007-06-27 |
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