CN100447738C - 含有多级寄存器文件的数字数据处理设备 - Google Patents
含有多级寄存器文件的数字数据处理设备 Download PDFInfo
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- CN100447738C CN100447738C CNB2005100794172A CN200510079417A CN100447738C CN 100447738 C CN100447738 C CN 100447738C CN B2005100794172 A CNB2005100794172 A CN B2005100794172A CN 200510079417 A CN200510079417 A CN 200510079417A CN 100447738 C CN100447738 C CN 100447738C
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30138—Extension of register space, e.g. register cache
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30123—Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3888—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple threads [SIMT] in parallel
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Mathematical Physics (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/875,373 US7284092B2 (en) | 2004-06-24 | 2004-06-24 | Digital data processing apparatus having multi-level register file |
| US10/875,373 | 2004-06-24 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1713137A CN1713137A (zh) | 2005-12-28 |
| CN100447738C true CN100447738C (zh) | 2008-12-31 |
Family
ID=35507434
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100794172A Expired - Fee Related CN100447738C (zh) | 2004-06-24 | 2005-06-21 | 含有多级寄存器文件的数字数据处理设备 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US7284092B2 (enExample) |
| JP (1) | JP4829541B2 (enExample) |
| CN (1) | CN100447738C (enExample) |
| TW (1) | TW200609744A (enExample) |
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| CN103250131B (zh) | 2010-09-17 | 2015-12-16 | 索夫特机械公司 | 包括用于早期远分支预测的影子缓存的单周期多分支预测 |
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| KR101636602B1 (ko) | 2011-03-25 | 2016-07-05 | 소프트 머신즈, 인크. | 분할가능한 엔진에 의해 인스턴스화된 가상 코어를 이용한 코드 블록의 실행을 지원하는 메모리 프래그먼트 |
| KR101620676B1 (ko) | 2011-03-25 | 2016-05-23 | 소프트 머신즈, 인크. | 분할가능한 엔진에 의해 인스턴스화된 가상 코어를 이용한 코드 블록의 실행을 지원하는 레지스터 파일 세그먼트 |
| TWI533129B (zh) | 2011-03-25 | 2016-05-11 | 軟體機器公司 | 使用可分割引擎實體化的虛擬核心執行指令序列程式碼區塊 |
| CN103649932B (zh) | 2011-05-20 | 2017-09-26 | 英特尔公司 | 资源的分散分配以及用于支持由多个引擎执行指令序列的互连结构 |
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| CN112817639B (zh) * | 2021-01-13 | 2022-04-08 | 中国民航大学 | Gpu读写单元通过操作数收集器访问寄存器文件的方法 |
| CN116560729B (zh) * | 2023-05-11 | 2024-06-04 | 北京市合芯数字科技有限公司 | 一种多线程处理器的寄存器多级管理方法及系统 |
| US20250130799A1 (en) * | 2023-10-19 | 2025-04-24 | Ampere Computing Llc | Techniques for performing non-vector micro-operations on vector hardware |
Citations (5)
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|---|---|---|---|---|
| US5226142A (en) * | 1990-11-21 | 1993-07-06 | Ross Technology, Inc. | High performance register file with overlapping windows |
| US5701507A (en) * | 1991-12-26 | 1997-12-23 | Texas Instruments Incorporated | Architecture of a chip having multiple processors and multiple memories |
| US5721868A (en) * | 1994-01-21 | 1998-02-24 | Sun Microsystems, Inc. | Rapid register file access by limiting access to a selectable register subset |
| US5974438A (en) * | 1996-12-31 | 1999-10-26 | Compaq Computer Corporation | Scoreboard for cached multi-thread processes |
| US20040064680A1 (en) * | 2002-09-26 | 2004-04-01 | Sudarshan Kadambi | Method and apparatus for reducing register file access times in pipelined processors |
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-
2004
- 2004-06-24 US US10/875,373 patent/US7284092B2/en not_active Expired - Fee Related
-
2005
- 2005-06-06 TW TW094118524A patent/TW200609744A/zh unknown
- 2005-06-20 JP JP2005179948A patent/JP4829541B2/ja not_active Expired - Fee Related
- 2005-06-21 CN CNB2005100794172A patent/CN100447738C/zh not_active Expired - Fee Related
-
2007
- 2007-08-08 US US11/835,519 patent/US8793433B2/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5226142A (en) * | 1990-11-21 | 1993-07-06 | Ross Technology, Inc. | High performance register file with overlapping windows |
| US5701507A (en) * | 1991-12-26 | 1997-12-23 | Texas Instruments Incorporated | Architecture of a chip having multiple processors and multiple memories |
| US5721868A (en) * | 1994-01-21 | 1998-02-24 | Sun Microsystems, Inc. | Rapid register file access by limiting access to a selectable register subset |
| US5974438A (en) * | 1996-12-31 | 1999-10-26 | Compaq Computer Corporation | Scoreboard for cached multi-thread processes |
| US20040064680A1 (en) * | 2002-09-26 | 2004-04-01 | Sudarshan Kadambi | Method and apparatus for reducing register file access times in pipelined processors |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2006012163A (ja) | 2006-01-12 |
| JP4829541B2 (ja) | 2011-12-07 |
| US20080022044A1 (en) | 2008-01-24 |
| TW200609744A (en) | 2006-03-16 |
| US7284092B2 (en) | 2007-10-16 |
| US20050289299A1 (en) | 2005-12-29 |
| US8793433B2 (en) | 2014-07-29 |
| CN1713137A (zh) | 2005-12-28 |
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