CN100440511C - Bidirectional photocontrol crystalbrake tube chip, photoarcing coupler and solid relay - Google Patents

Bidirectional photocontrol crystalbrake tube chip, photoarcing coupler and solid relay Download PDF

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CN100440511C
CN100440511C CNB2005100788631A CN200510078863A CN100440511C CN 100440511 C CN100440511 C CN 100440511C CN B2005100788631 A CNB2005100788631 A CN B2005100788631A CN 200510078863 A CN200510078863 A CN 200510078863A CN 100440511 C CN100440511 C CN 100440511C
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diffusion layer
light controlled
diffusion region
bidirectional light
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CN1694255A (en
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鞠山満
中島聡司
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Sharp Corp
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Abstract

Two operation channels CH 1 and CH 2 of a bidirectional photothyristor chip 31 are disposed away from each other so as not to intersect with each other. In between a P-gate diffusion region 23 on the left-hand side and a P-gate diffusion region 23 ' on the right-hand side on an N-type silicon substrate, and in between the CH 1 and the CH 2 , a channel isolation region 29 comprised of an oxygen doped semi-insulating polycrystalline silicon film 35 a doped with phosphorus is formed. Consequently, a silicon interface state (Qss) in the vicinity of the channel isolation region 29 on the surface of the N-type silicon substrate increases, so that holes or minority carriers in the N-type silicon substrate are made to disappear in the region. This makes it possible to prevent such commutation failure that when a voltage of the inverted phase is applied to the CH 2 side at the point of time when the CH 1 is turned off, the CH 2 is turned on without incidence of light, and this allows a commutation characteristic to be enhanced.

Description

Bidirectional light controlled thyristor chip, light starting the arc coupler and solid state relay
Technical field
The present invention relates to a kind of bidirectional light controlled thyristor chip, use playing the camber coupler and using this solid state relay that plays the camber coupler (hereinafter to be referred as SSR) of this chip.
Up to the present, the bidirectional light controlled thyristor that has this structure of Figure 35～shown in Figure 37.And Figure 35 is a plane graph, and Figure 36 is the sectional view of observing along the A-A ' arrow among Figure 35, and Figure 37 is an equivalent circuit diagram.For example, this bidirectional light controlled thyristor 4 is made of the photo thyristor of the CH (raceway groove) 1 that forms on N type silicon substrate 1 and the photo thyristor of CH2.Apply conducting that the grid triggering signal controls SSR by so that as light starting the arc coupler by rayed, just extensively adopt this bidirectional thyristor 4.
And, 5,5 ' be anode diffusion region (P type), 6,6 ' be P-gate diffusion region (P type), 7,7 ' be cathode diffusion region (N type), 8,8 ' be gate resistance, 9,9 ' be the aluminium electrode, the 10th, the aluminium wiring.And electrode T2 is formed on directly over the aluminium electrode 9, so that be connected with anode diffusion region 5 and cathode diffusion region 7 by aluminium electrode 9.Similarly, electrode T1 be formed on aluminium electrode 9 ' directly over so that by aluminium electrode 9 ' with anode diffusion region 5 ' reach cathode diffusion region 7 ' be connected.And, the anode diffusion region 5 on right side from figure ', be formed with the PNPN portion of the photo thyristor 2 that constitutes the CH1 among Figure 37 to left side cathode diffusion region 7.In addition, from figure the anode diffusion region 5 in left side to the cathode diffusion region 7 on right side ', be formed with the PNPN portion of the photo thyristor 3 that constitutes CH2.
Figure 36 is the sectional view of the N type silicon substrate 1 of the passivating structure in this bidirectional light controlled thyristor of expression.Aluminium from the N type substrate 1 connects up on the cathode diffusion region 7 in 10 left sides until the anode diffusion region 5 of aluminium wiring 10 ' form SiO 2Film 15.And, at this SiO 2Form oxygen-doped semi-insulating polysilicon film 16 on the film 15, on oxygen-doped semi-insulating polysilicon film 16, utilize the chemical vapor-phase growing method to form SiN film 17.And, among above-mentioned left side, from SiN film 17, form aluminium electrode 9, and be connected to electrode T2 until P-gate diffusion region 6.On the other hand, in above-mentioned right side, from the SiN film 17 until anode diffusion layer 5 ' form aluminium electrode 9 ', and be connected to above-mentioned electrode T1.And, as shown in figure 35, on SiN film 17, form with mutual overall width that the aluminium in left side and right side connects up 10 among the figure that isolates this bidirectional light controlled thyristor, and be connected with N type silicon substrate 1.So, the two ends that make oxygen-doped semi-insulating polysilicon film 16 and central authorities and aluminium electrode 9,9 ', 10 contact, aluminium electrode 9,9 ' and aluminium electrode 10 between form electric potential gradient, mitigation Si-SiO 2The electric field at interface is concentrated.So, just formed and helped high withstand voltage field plate structure.And, the 18th, N+ layer, the 19th, depletion layer.
The light that uses in the interchange plays the camber coupler and usually works as follows.Promptly, in Figure 37, biasing applies under the condition of the taller alternating voltage of conducting voltage (about 1.5V) than element between to electrode T1-electrode T2, at first, electrode T1 side will be in the positive potential situation higher than electrode T2 side, when bidirectional light controlled thyristor 4 received light signal from LED (light-emitting diode) (not shown), the NPN transistor Q2 of CH1 side just became conducting state.So, the base current of drawing the PNP transistor Q1 of CH1 side, and this PNP transistor Q1 conducting.Then, utilize PNP transistor Q1 collector current, base current is supplied to the NPN transistor Q2 of CH1 side, by the PNPN portion conducting of positive feedback CH1 side, just flow through conducting electric current to electrode T2 corresponding to the alternating current circuit load from above-mentioned electrode T1.At this moment, owing on the CH2 side, apply rightabout bias voltage, thus just can not cause the positive feedback of PNPN portion, and only 1 photoelectric current flows through.During the next half period, above-mentioned electrode T2 is in than electrode T1 more under the situation of high normal potential, and the PNPN portion of CH2 side just carries out positive feedback work and conducting in the same manner with above-mentioned situation, only has 1 photoelectric current to flow through in the CH1 side.
Thus, above-mentioned bidirectional light controlled thyristor 4 just Continuous irradiation from the situation of above-mentioned LED light under conducting.On the other hand, under the situation from above-mentioned LED light not, above-mentioned bidirectional light controlled thyristor 4 is with regard to holding current value (being called IH) and end.Thus, just play the effect of switch.And, relate to the prior art document of the employed bidirectional light controlled thyristor of above-mentioned this smooth starting the arc coupler, for example there is the spy to open flat 10-242449 communique.
But, in above-mentioned existing bidirectional light controlled thyristor, such problem below existing.That is, when carrying out ISO in order to improve photosensitivity, will make opposite noise resistance characteristic is that rectification characteristic and dv/dt characteristic descend.That is, for rectification characteristic and dv/dt characteristic and photosensitivity, have what is called and repulse or subdue the enemy relation, this becomes most important design problem on the characteristic of bidirectional light controlled thyristor.At this, for the dv/dt characteristic,, have normal function as device in order to make bidirectional light controlled thyristor as " critical cut-ff voltage climbing ", just need the above critical cut-ff voltage climbing of 1000V/ μ s or 1000V/ μ s.
And, from use equipment, owing to can control with electric current seldom, so, just there is advantage of low power consumption and the advantage that can directly drive by microcomputer etc. etc., this is the key property from user's strong request.
At this, above-mentioned rectification characteristic is described.So-called rectification characteristic, under the situation of operate as normal, shown in Figure 38 (cross-sectional view that comprises the integral body of the A-A ' among Figure 35), the situation that does not have light incident in during the half period of the interchange of CH1 conducting, during this half period, the electric current retention performance by above-mentioned PNPN portion continues conducting state.And, shown in Figure 39 (comprise anode diffusion region 5 among Figure 35 and cathode diffusion region 7 ' the cross-sectional view of integral body), as can be known, when proceeding to down half period, be not limited to light incident, not conductings of CH2.But, carry out existing under the situation of inductance (L) load in the alternating current circuit of switch, because the phase place of conducting voltage further postpones than the phase place of the alternating voltage that applies between electrode T1-electrode T2, so, in CH1 cut-off time, between electrode T1-electrode T2, apply the alternating voltage of opposite phase in advance.Therefore, in the moment that CH1 ends, applied the voltage of the opposite phase that shows rapid rising in the CH2 side.
For this reason, in the N type silicon substrate 1 of above-mentioned bidirectional light controlled thyristor 4 residual hole 11 will before the disappearance shown in arrow mark (A), to the P-gate diffusion region 6 of photo thyristor 3 sides ' move, although there is not light incident, the NPN transistor Q4 of CH2 side also can conducting, promote the positive feedback effect of CH2 side simultaneously, thereby cause this misoperation of CH2 conducting (rectification failure).
That is, so-called above-mentioned " rectification characteristic " is the characteristic of the maximum operating currenbt value Icom that represents not cause that above-mentioned this rectification failure can be controlled.And, in the ISO process, have exchange correlation that so-called this rectification characteristic descends, how to improve this rectification characteristic, and become the problem that surmounts ISOization.
Certainly, under the situation that is preventing above-mentioned rectification failure, also can suppress in the N type silicon substrate 1 residual hole 11 from the P-gate diffusion region 6 of photo thyristor 2 side direction photo thyristors 3 sides ' move.But, in having the existing bidirectional light controlled thyristor 4 of Figure 35～structure shown in Figure 37, as mentioned above, its passivating structure as shown in figure 36, aluminium electrode 9,9 ' and aluminium electrode 10 between form electric potential gradient, relaxed Si-SiO 2The electric field at interface is concentrated, and formation can be beneficial to the field plate structure that carries out high withstand voltageization.But the improvement of this structure and rectification characteristic does not have direct relation, can not be suppressed in the N type that the remains in silicon substrate 1 that photo thyristor 2 sides produce hole 11 to the P-gate diffusion region 6 of photo thyristor 3 sides ' move.
Then, the above-mentioned critical electric field climbing dv/dt characteristic of ending is described.Anode diffusion region 5,5 ' and cathode diffusion region 7,7 ' between when applying the potential pulse of rapid rising, even without light signal, bidirectional light controlled thyristor 4 also can conducting, produces misoperation.Its reason be because, the displacement electric current flow into to receive the P-gate diffusion region 6,6 of original light signal ', the displacement electric current is as the effect of trigger current.This misoperation particularly produces under the condition of high temperature.That is, not producing the above-mentioned maximum voltage climbing that delays work is critical cut-ff voltage climbing dv/dt.And, also just exist this critical cut-ff voltage climbing dv/dt and ISO decline this compromise relevant.That is, how to improve this dv/dt characteristic and just become the problem that surmounts ISOization.
Summary of the invention
Therefore, problem of the present invention is to provide a kind of bidirectional light controlled thyristor that can realize photosensitivity, improve rectification characteristic and critical cut-ff voltage climbing dv/dt characteristic with this photosensitivity and trade-off relation.
In order to solve above-mentioned problem, bidirectional light controlled thyristor chip of the present invention is characterised in that, as a kind of semiconductor chip, comprising:
The substrate of first conduction type;
A pair of photo thyristor part, this a pair of photo thyristor partly contains the 3rd diffusion layer at second diffusion layer of first diffusion layer of second conduction type that is provided with simultaneously on the surface of above-mentioned first conductivity type substrate, above-mentioned second conduction type, above-mentioned first conduction type that forms in this second diffusion layer
A photo thyristor in the wherein above-mentioned a pair of photo thyristor part partly is configured in a side of above-mentioned semiconductor chip, and on the other hand, another photo thyristor partly is configured in the opposite side of above-mentioned semiconductor chip;
Constitute above-mentioned first diffusion layer of above-mentioned photo thyristor part, opposed with above-mentioned second diffusion layer and the 3rd diffusion layer phase that constitute above-mentioned another photo thyristor part;
Constitute above-mentioned first diffusion layer of above-mentioned another photo thyristor part, opposed with above-mentioned second diffusion layer and the 3rd diffusion layer phase that constitute above-mentioned photo thyristor part;
2 raceway grooves that produce between above-mentioned a pair of photo thyristor part do not intersect and parallel to each other mutually,
Move the inhibition zone comprising between 2 above-mentioned second diffusion layers that constitute the above-mentioned a pair of photo thyristor part on the above-mentioned substrate, forming the charge carrier that moves with the inhibition charge carrier.
According to said structure, during applying the half period of alternating voltage, move the inhibition zone by the charge carrier that between 2 second diffusion layers that constitute above-mentioned 2 photo thyristors part, forms and just can be suppressed at a raceway groove in above-mentioned paired 2 raceway grooves and during conducting, produce in the above-mentioned substrate and residual charge carrier moves according to light signal.Its result, during the next half period, residual charge carrier just moves to above-mentioned second diffusion layer of the photo thyristor part that constitutes another raceway groove in the above-mentioned substrate, makes above-mentioned another raceway groove conducting although just can prevent from not have light incident.Therefore, can reduce misoperation, and improve rectification characteristic because of the rectification failure.
At this, so-called above-mentioned first conduction type and second conduction type refer to N type or P type, and above-mentioned second conduction type was the P type when above-mentioned first conduction type was the N type, and above-mentioned second conduction type was the N type when above-mentioned first conduction type was the P type.
In addition, in first embodiment, above-mentioned charge carrier moves the oxygen-doped semi-insulating polysilicon film that the phosphorus that mixed is contained in the inhibition zone;
The oxygen-doped semi-insulating polysilicon film of the above-mentioned phosphorus that mixed is electrically connected with above-mentioned substrate by the aluminium electrode.
According to this embodiment, be that N type, above-mentioned second conduction type are that P type, above-mentioned substrate are under the situation of silicon substrate at above-mentioned first conduction type, the above-mentioned charge carrier that has increased in the above-mentioned N type surface of silicon substrate moves the silicon interface energy level (Qss) of inhibition zone.Its result, in the zone of the oxygen-doped semi-insulating polysilicon film of the above-mentioned phosphorus that mixed, the minority carrier that can reduce in the N type silicon substrate is the hole, and can promote the life-span in above-mentioned hole to descend.Therefore, consequently, can improve rectification characteristic.
In addition, in first embodiment, above-mentioned charge carrier moves the inhibition zone and also contain the charge carrier absorption diode that forms on the surface of above-mentioned substrate.
According to this embodiment, the minority carrier in the above-mentioned N type silicon substrate is that the hole is configured the p type diffusion region that above-mentioned charge carrier absorbs with diode and absorbs, and has shortened the life-span in above-mentioned hole.Therefore, combine, just can more positively improve rectification characteristic with the effect that oxygen-doped semi-insulating polysilicon film according to the above-mentioned above-mentioned phosphorus that mixed produces.
In addition, in first embodiment, above-mentioned charge carrier absorbs with diode and has the also little external diameter of external diameter than the oxygen-doped semi-insulating polysilicon film of the above-mentioned phosphorus that mixed, and, be electrically connected with above-mentioned substrate by above-mentioned aluminium electrode with above-mentioned substrate side opposite side.
According to this embodiment,, the zone that silicon interface energy level Qss that the existence because of the oxygen-doped semi-insulating polysilicon film of the phosphorus that mixed causes increases can be set in above-mentioned N type surface of silicon substrate.Therefore, can extract the effect that absorbs the effect that produces with diode and produce by above-mentioned charge carrier effectively by the oxygen-doped semi-insulating polysilicon film of the above-mentioned phosphorus that mixed.
In addition, in first embodiment, the interval that first electrode that is electrically connected with above-mentioned first diffusion layer and above-mentioned charge carrier move the inhibition zone, and second electrode that is electrically connected with above-mentioned the 3rd diffusion layer and above-mentioned charge carrier move among the interval of inhibition zone, no matter is which side narrow side is at least 30 μ m at interval.
According to this embodiment, state in the use under the situation of structure that charge carrier moves the inhibition zone, can obtain above withstand voltage of 400V or 400V.
In addition, in first embodiment, between above-mentioned 2 raceway grooves, form above-mentioned charge carrier and move the inhibition zone, so that it does not intersect with each raceway groove.
According to this embodiment, utilize the little above-mentioned charge carrier of region area to move the inhibition zone, suppress residual charge carrier in the above-mentioned substrate to constituting by the moving of above-mentioned second diffusion layer of the photo thyristor part of the raceway groove of side, just can improve rectification characteristic.
In addition, in first embodiment,
Above-mentioned charge carrier moves the inhibition zone and intersects respectively with above-mentioned 2 raceway grooves.
According to this embodiment, under the situation of the potential pulse that applies rapid rising between above-mentioned first diffusion region and the 3rd diffusion region, can utilize the oxygen-doped semi-insulating polysilicon film that contains the above-mentioned phosphorus that mixed that intersects respectively with above-mentioned two raceway grooves and form and the charge carrier of aluminium electrode to move the inhibition zone, suppress the displacement electric current and flow into above-mentioned second diffusion region that has received original light signal.Its result can prevent to make the conducting of above-mentioned photo thyristor part even without light signal, can improve the dv/dt characteristic.
In addition, in first embodiment, the interval that first electrode that is electrically connected with above-mentioned first diffusion layer and above-mentioned charge carrier move the inhibition zone, and second electrode that is electrically connected with above-mentioned the 3rd diffusion layer and above-mentioned charge carrier move among the interval of inhibition zone, no matter is which side narrow side is at least 30 μ m at interval.
According to this embodiment, using the charge carrier that intersects respectively with above-mentioned two raceway grooves to move under the situation of structure of inhibition zone, can obtain withstand voltage more than 400V or the 400V.
In addition, in first embodiment, above-mentioned charge carrier moves the inhibition zone and intersects respectively with above-mentioned 2 raceway grooves.
According to this embodiment, under the situation of the potential pulse that applies rapid rising between above-mentioned first diffusion region and the 3rd diffusion region, can utilize the oxygen-doped semi-insulating polysilicon film that contains the above-mentioned phosphorus that mixed that intersects respectively with above-mentioned two raceway grooves and form and the charge carrier of aluminium electrode to move the inhibition zone, suppress the displacement electric current and flow into above-mentioned second diffusion region that has received original light signal.Its result just can prevent to make the conducting of above-mentioned photo thyristor part even without light signal, can improve the dv/dt characteristic.
In addition, in first embodiment, the interval that first electrode that is electrically connected with above-mentioned first diffusion layer and above-mentioned charge carrier move the inhibition zone, and second electrode that is electrically connected with above-mentioned the 3rd diffusion layer and above-mentioned charge carrier move among the interval of inhibition zone, and any one narrow interval is at least 30 μ m.
According to this embodiment, absorb and use diode containing above-mentioned charge carrier, use the charge carrier that intersects respectively with above-mentioned two raceway grooves to move under the situation of structure of inhibition zone simultaneously, can obtain withstand voltage more than 400V or the 400V.
In addition, in first embodiment, above-mentioned charge carrier absorbs with diode and has the also little external diameter of external diameter than the oxygen-doped semi-insulating polysilicon film of the above-mentioned phosphorus that mixed, and the side relative with above-mentioned substrate side is electrically connected with above-mentioned substrate by above-mentioned aluminium electrode.
According to this embodiment,, the zone that silicon interface energy level Qss that the existence because of the oxygen-doped semi-insulating polysilicon film of the phosphorus that mixed causes increases can be set in above-mentioned N type surface of silicon substrate.Therefore, can extract the effect that absorbs the effect that produces with diode and produce by above-mentioned charge carrier effectively by the oxygen-doped semi-insulating polysilicon film of the above-mentioned phosphorus that mixed.
In addition, bidirectional light controlled thyristor chip of the present invention is characterized in that, as a semiconductor chip, comprising:
The substrate of first conduction type;
A pair of photo thyristor part, this a pair of photo thyristor partly contains a pair of photo thyristor part of the 3rd diffusion layer of second diffusion layer of first diffusion layer of lip-deep second conduction type of the substrate that is arranged on above-mentioned first conduction type simultaneously, above-mentioned second conduction type, above-mentioned first conduction type that forms in this second diffusion layer
A photo thyristor in the wherein above-mentioned a pair of photo thyristor part partly is configured in a side of above-mentioned semiconductor chip, and on the other hand, another photo thyristor partly is configured in the opposite side of above-mentioned semiconductor chip;
Constitute above-mentioned first diffusion layer of above-mentioned photo thyristor part, opposed with above-mentioned second diffusion layer and the 3rd diffusion layer phase that constitute above-mentioned another photo thyristor part;
Constitute above-mentioned first diffusion layer of above-mentioned another photo thyristor part, opposed with above-mentioned second diffusion layer and the 3rd diffusion layer phase that constitute above-mentioned photo thyristor part;
2 raceway grooves that produce between above-mentioned a pair of photo thyristor part do not intersect and parallel to each other mutually,
Comprising on the above-mentioned substrate and with the joint portion of 2 above-mentioned first diffusion layers that constitute above-mentioned a pair of photo thyristor part and above-mentioned substrate near, and with the joint portion of 2 above-mentioned second diffusion layers that constitute above-mentioned a pair of photo thyristor part and above-mentioned substrate near intersected to form with the doping of moving that suppresses charge carrier the oxygen-doped semi-insulating polysilicon film of phosphorus with above-mentioned raceway groove.
According to said structure, by the doping that between two second diffusion layers that constitute above-mentioned two photo thyristors part, forms the oxygen-doped semi-insulating polysilicon film of phosphorus, suppress charge carrier residual in the above-mentioned substrate moving to above-mentioned second diffusion layer of the raceway groove of conducting subsequently.Its result during the next half period, makes above-mentioned raceway groove conducting although just can prevent from not have light incident, and improves rectification characteristic.
And, under the situation of the potential pulse that applies rapid rising between above-mentioned first diffusion region and the 3rd diffusion region, can utilize the oxygen-doped semi-insulating polysilicon film that contains the above-mentioned phosphorus that mixed that intersects respectively with above-mentioned two raceway grooves and form and the charge carrier of aluminium electrode to move the inhibition zone, suppress the displacement electric current and flow into above-mentioned second diffusion region that has received original light signal.Its result just can prevent to make the conducting of above-mentioned photo thyristor part even without light signal, can improve the dv/dt characteristic.
In addition, in first embodiment, comprising: between above-mentioned 2 paired photo thyristors parts, intersect the Al guard ring that forms and be electrically connected by Al respectively with above-mentioned substrate with above-mentioned 2 raceway grooves.
The oxygen-doped semi-insulating polysilicon film of above-mentioned each phosphorus that mixed and the interval of above-mentioned Al guard ring are at least 30 μ m.
According to this embodiment, state in the use under the situation of structure of oxygen-doped semi-insulating polysilicon film of the phosphorus that mixed, can obtain above withstand voltage of 400V or 400V.
In addition, bidirectional light controlled thyristor chip of the present invention is characterized in that, as a semiconductor chip, comprising:
The substrate of first conduction type;
A pair of photo thyristor part, this a pair of photo thyristor partly contains the 3rd diffusion layer at second diffusion layer of first diffusion layer of second conduction type that is provided with simultaneously on the surface of the substrate of above-mentioned first conduction type, above-mentioned second conduction type, above-mentioned first conduction type that forms in this second diffusion layer
A photo thyristor in the wherein above-mentioned a pair of photo thyristor part partly is configured in a side of above-mentioned semiconductor chip, and on the other hand, another photo thyristor partly is configured in the opposite side of above-mentioned semiconductor chip;
Constitute above-mentioned first diffusion layer of above-mentioned photo thyristor part, opposed with above-mentioned second diffusion layer and the 3rd diffusion layer phase that constitute above-mentioned another photo thyristor part;
Constitute above-mentioned first diffusion layer of above-mentioned another photo thyristor part, opposed with above-mentioned second diffusion layer and the 3rd diffusion layer phase that constitute above-mentioned photo thyristor part;
2 raceway grooves that produce between above-mentioned a pair of photo thyristor part do not intersect and parallel to each other mutually,
Comprising: between 2 above-mentioned second diffusion layers that constitute the above-mentioned a pair of photo thyristor part on the above-mentioned substrate and between above-mentioned 2 raceway grooves, not intersecting respectively near the joint portion of above-mentioned 2 second diffusion layers and above-mentioned substrate, form with the oxygen-doped semi-insulating polysilicon film of phosphorus that suppressed doping that charge carrier moves with each raceway groove.
According to this embodiment, by the doping that between two second diffusion layers that constitute above-mentioned two photo thyristors part, forms the oxygen-doped semi-insulating polysilicon film of phosphorus, suppress charge carrier residual in the above-mentioned substrate and move to above-mentioned second diffusion layer of the raceway groove of conducting subsequently.Its result during the next half period, makes above-mentioned raceway groove conducting although just can prevent from not have light incident, and improves rectification characteristic.
In addition, in first embodiment, in the interval of the oxygen-doped semi-insulating polysilicon film of the interval of first electrode that is electrically connected with above-mentioned first diffusion layer and the oxygen-doped semi-insulating polysilicon film of the above-mentioned phosphorus that mixed and second electrode that is electrically connected with above-mentioned the 3rd diffusion layer and the above-mentioned phosphorus that mixed, any one narrow interval is at least 30 μ m
Mutual interval in the oxygen-doped semi-insulating polysilicon film of above-mentioned 2 phosphorus that mixed is at least 30 μ m.
According to this embodiment, state in the use under the situation of structure of oxygen-doped semi-insulating polysilicon film of the phosphorus that mixed, can obtain above withstand voltage of 400V or 400V.
In addition; in first embodiment; on above-mentioned substrate; for each above-mentioned paired photo thyristor part; near the joint portion that comprises above-mentioned first diffusion layer and above-mentioned substrate, and the joint portion of above-mentioned second diffusion layer and above-mentioned substrate near also surrounding in the annular section of first diffusion layer and second diffusion layer simultaneously, form the transparency protected ring that the oxygen-doped semi-insulating polysilicon film by the phosphorus that mixed constitutes.
According to this embodiment, in the annular section that surrounds first diffusion layer and second diffusion layer, form transparency protected ring.Therefore, the shading area in the zone of above-mentioned first diffusion layer and above-mentioned second diffusion layer can be reduced to surround, photosensitivity can be improved.
In addition, in first embodiment, also be included in the Schottky barrier diode that forms between second diffusion layer that constitutes above-mentioned each photo thyristor part and the substrate.
According to this embodiment, when rectification, by above-mentioned Schottky barrier diode can suppress minority carrier (hole) from constitute conducting above-mentioned second diffusion layer of photo thyristor part of raceway groove to the injection of above-mentioned N type substrate.Therefore, reduce the residual charge carrier amount in the above-mentioned substrate, can further improve rectification characteristic.
In addition, in first embodiment,
Above-mentioned first conduction type is any one of N type and P type,
Above-mentioned second conduction type is the another kind of N type and P type,
In above-mentioned each photo thyristor part, gate resistance and switch element are connected in parallel between by the base stage of above-mentioned the 3rd diffusion region and second diffusion region and substrate or the NPN transistor that is made of above-mentioned first diffusion region and substrate and second diffusion region and emitter electrode;
The control terminal of above-mentioned switch element is connected by above-mentioned the 3rd diffusion region and second diffusion region and substrate or the transistorized base stage of PNP that is made of above-mentioned first diffusion region and substrate and second diffusion region.
According to this embodiment, near the zero crossing of the supply voltage of setovering between the emitter electrode of transistorized emitter electrode of above-mentioned PNP and above-mentioned NPN transistor, above-mentioned switch element ends, and applies the base-emitter voltage of the resistance value of corresponding above-mentioned gate resistance in above-mentioned NPN transistor.With respect to this, in the time that the zero crossing from above-mentioned supply voltage leaves, because of short circuit between the Base-Emitter of the above-mentioned NPN transistor of above-mentioned switch element conducting, even receiving optical signals, above-mentioned NPN transistor can not conducting.
Thus, only near the zero crossing of above-mentioned supply voltage, just realized making the zero crossing function of photo thyristor part conducting.
In addition, in first embodiment,
Above-mentioned switch element is the metal oxide film semiconductor field effect transistor,
Above-mentioned metal oxide film semiconductor field effect transistor is formed in the trap of above-mentioned second conduction type that forms on the surface of above-mentioned substrate, and the diffusion depth of above-mentioned trap surpasses above-mentioned second diffusion depth.
According to this embodiment, can make the current amplification degree ratio of the parasitic transistor that is formed by the leakage diffusion region of above-mentioned metal oxide film semiconductor field effect transistor and above-mentioned trap and above-mentioned substrate, the diffusion depth of above-mentioned trap will reduce than the diffusion depth of above-mentioned second diffusion layer situation shallow, that have the bidirectional light controlled thyristor chip of common zero crossing function.Therefore, above-mentioned photo thyristor is partly applied under the situation of pulse type noise voltage,, can suppress the amplification that transition flows into the displacement electric current of above-mentioned parasitic transistor by the junction capacitance of above-mentioned trap and substrate.
That is, at present, utilize above-mentioned parasitic transistor to amplify, suppressed the above-mentioned displacement electric current of trigger current effect, but can improve above-mentioned photo thyristor partly the maximum of the above-mentioned pulse type noise voltage of operate as normal be the amount of bearing of pulse noise.
In addition, in first embodiment,
The diffusion depth of above-mentioned trap is that the diffusion depth of above-mentioned second diffusion layer is more than 1 times or 1 times and be below 1.3 times or 1.3 times.
According to this embodiment, the diffusion depth that makes above-mentioned trap is that the diffusion depth of above-mentioned second diffusion layer is below 1.3 times or 1.3 times.Therefore, just needn't make diffusion temperature and diffusion time excessive when forming above-mentioned trap, just can easily obtain to suppress the effect of the current amplification degree in the above-mentioned parasitic transistor.
In addition, in first embodiment,
Above-mentioned switch element is the metal oxide film semiconductor field effect transistor,
Above-mentioned metal oxide film semiconductor field effect transistor is formed in the trap of above-mentioned second conduction type that forms on the surface of above-mentioned substrate,
The area of the leakage diffusion region that forms in the above-mentioned trap in above-mentioned metal oxide film semiconductor field effect transistor is littler than the area of the diffusion region, source that forms in above-mentioned trap.
According to this embodiment,, just can reduce the collector current of above-mentioned parasitic transistor owing to reduce the emitter area of above-mentioned parasitic transistor.Therefore, just increased the split ratio of above-mentioned displacement electric current to the diffusion region, source of above-mentioned metal oxide film semiconductor field effect transistor.That is, reduce of the influence of the current amplification degree of above-mentioned parasitic transistor, just can improve the pulse noise amount of bearing above-mentioned displacement electric current.
In addition, in first embodiment,
Above-mentioned leakage diffusion region is formed on above-mentioned trap inner surface side,
Diffusion region, above-mentioned source surround above-mentioned leakage diffusion region around be formed on above-mentioned trap inner surface side.
According to this embodiment, when increasing, form the diffusion region, above-mentioned source that surrounds above-mentioned leakage diffusion region with respect to above-mentioned leakage diffusion region area ratio.Therefore, can improve the split ratio of above-mentioned displacement electric current significantly to the diffusion region, source.Its result has further reduced the influence of the current amplification degree of above-mentioned parasitic transistor to above-mentioned displacement electric current, just can improve the pulse noise dosis tolerata.
In first embodiment,
Above-mentioned switch element is the metal oxide film semiconductor field effect transistor,
At least a portion in the above-mentioned metal oxide film semiconductor field effect transistor is formed in the trap of above-mentioned second conduction type that the surface of above-mentioned substrate forms,
Around the above-mentioned trap in the surface of above-mentioned substrate, form with above-mentioned trap adherence, have high concentration compensation diffusion layer than second conduction type of the diffusion of impurities concentration of the diffusion of impurities concentration high concentration in the above-mentioned trap,
In the above-mentioned metal oxide film semiconductor field effect transistor, the zone that is not formed in the above-mentioned trap is formed in the above-mentioned high concentration compensation diffusion layer.
According to this embodiment, around above-mentioned trap, this trap of adherence forms high concentration compensation diffusion layer.Therefore, the resistance value of the series resistance of the base stage that connects above-mentioned parasitic transistor can be reduced, above-mentioned displacement electric current can be improved by the ratio of being shunted by the path of above-mentioned trap and diffusion region, above-mentioned source.Its result has further reduced the influence of the current amplification degree of above-mentioned parasitic transistor to above-mentioned displacement electric current, just can improve the pulse noise dosis tolerata.
In addition, in first embodiment,
Impurity concentration in the above-mentioned high concentration compensation diffusion layer is 1 * 10 17Cm -3Or 1 * 10 17Cm -3More than.
According to this embodiment, the impurity concentration of above-mentioned trap is 5 * 10 16Cm -3Situation under, can fully revise and compensate above-mentioned trap surface concentration.
In addition, in first embodiment,
Diffusion region, source in the above-mentioned metal oxide film semiconductor field effect transistor is formed in the above-mentioned trap,
Leakage diffusion region in the above-mentioned metal oxide film semiconductor field effect transistor, a side relative with diffusion region, above-mentioned source is formed in the above-mentioned trap, and on the other hand, remaining zone is formed in the above-mentioned high concentration compensation diffusion layer.
According to this embodiment,, just can reduce the collector current of above-mentioned parasitic transistor by making the base region in the parasitic transistor that forms by the leakage diffusion region of above-mentioned metal oxide film semiconductor field effect transistor and above-mentioned trap and above-mentioned substrate narrow.Therefore,, further reduced of the influence of the current amplification degree of above-mentioned parasitic transistor to above-mentioned displacement electric current, just can improve the pulse noise dosis tolerata.
In addition, in first embodiment,
Leakage diffusion region in the above-mentioned metal oxide film semiconductor field effect transistor is formed in the above-mentioned trap,
Diffusion region, source in the above-mentioned metal oxide film semiconductor field effect transistor, a side relative with above-mentioned leakage diffusion region is formed in the above-mentioned trap, and on the other hand, remaining zone is formed in the above-mentioned high concentration compensation diffusion layer.
According to this embodiment, around above-mentioned trap, this trap of adherence forms high concentration compensation diffusion layer.And, the part of formation diffusion region, above-mentioned source in above-mentioned high concentration compensation diffusion layer.Therefore, the resistance value of the series resistance of the base stage that connects above-mentioned parasitic transistor can be reduced, above-mentioned displacement electric current can be further improved by the ratio of being shunted by the path of above-mentioned trap and diffusion region, above-mentioned source.
In addition, in first embodiment,
The length of the channel direction that the above-mentioned side in above-mentioned leakage diffusion region or diffusion region, source that forms in above-mentioned trap is extended is 0 μ m or more than the 0 μ m and be 10 μ m or below the 10 μ m.
According to this embodiment, be 10 μ m or below the 10 μ m, so the high concentration diffusion layer that can utilize adherence to form around above-mentioned trap is obtained above-mentioned effect owing to make the width of an above-mentioned side.And, be 0 μ m or more than the 0 μ m owing to make the width of an above-mentioned side, can the raceway groove concentration (that is the threshold voltage of above-mentioned metal oxide film semiconductor field effect transistor) of above-mentioned metal oxide film semiconductor field effect transistor not impacted.
In addition, in first embodiment,
Channel width in the above-mentioned metal oxide film semiconductor field effect transistor is 300 μ m or more than the 300 μ m.
According to this embodiment,, just can reduce conducting resistance owing to increased the channel width of above-mentioned metal oxide film semiconductor field effect transistor.Therefore,, also can make the work of above-mentioned metal oxide film field-effect transistor, just can further improve the pulse noise dosis tolerata even above-mentioned photo thyristor is partly applied under the situation of above-mentioned pulse type noise voltage.
In addition, in first embodiment, in the surface of above-mentioned substrate, form the charge carrier absorption diode that intersects to form with above-mentioned 2 raceway grooves.
According to this embodiment, at above-mentioned first conduction type is that N type, above-mentioned second conduction type are that P type, above-mentioned substrate are under the situation of silicon substrate, minority carrier in the above-mentioned N type silicon substrate is that the hole is configured the p type diffusion region that above-mentioned charge carrier absorbs with diode and absorbs, and just can reduce the life-span in above-mentioned hole.Therefore, can reduce the transistorized current amplification degree of PNP that forms by above-mentioned trap and N type silicon substrate and above-mentioned second diffusion layer.Its result, by improving the resistance value of above-mentioned gate resistance, the noise properties that will form by above-mentioned the 3rd diffusion layer and above-mentioned second diffusion layer and N type silicon substrate when the current amplification degree of the NPN transistor of influence is set at the value that can obtain desirable anti-noise properties easily, as bidirectional light controlled thyristor, just can keep necessary photosensitivity and high speed operation with zero crossing function.
In addition, smooth starting the arc coupler of the present invention is characterized in that, is made of bidirectional light controlled thyristor chip of the present invention and light-emitting diode.
According to said structure, the bidirectional light controlled thyristor chip that use can improve rectification characteristic is constituted.Therefore, can provide a kind of, not have rectification failure, light starting the arc coupler that misoperation is few.Especially, use possess near the joint portion of above-mentioned two first diffusion layers and above-mentioned substrate, and the joint portion of above-mentioned 2 second diffusion layers and above-mentioned substrate near the doping that intersects to form with above-mentioned raceway groove under the bidirectional light controlled thyristor chip of oxygen-doped semi-insulating polysilicon film of the phosphorus situation about being constituted, can also improve the dv/dt characteristic, the light starting the arc coupler of further minimizing misoperation can be provided.
In addition, solid state relay of the present invention is characterized in that, is made of smooth starting the arc coupler of the present invention and buffering circuit.
According to said structure, the light starting the arc coupler that do not have the rectification failure owing to using, misoperation is few is so can provide a kind of misoperation few solid state relay.Especially, use by near the joint portion of above-mentioned two first diffusion layers and above-mentioned substrate, and the joint portion of above-mentioned 2 second diffusion layers and above-mentioned substrate near the doping that forms with above-mentioned raceway groove cross-over design under the situation of the light starting the arc coupler that constitutes of the bidirectional light controlled thyristor chip of oxygen-doped semi-insulating polysilicon film of phosphorus, can improve the dv/dt characteristic of above-mentioned bidirectional light controlled thyristor chip, a kind of solid state relay of further minimizing misoperation can be provided.
As above-mentioned further clear and definite, because bidirectional light controlled thyristor chip of the present invention comprises that between 2 second diffusion layers that constituted paired 2 photo thyristors part on the substrate suppressing the charge carrier that charge carrier moves moves the inhibition zone, so just can suppress photo thyristor above-mentioned second diffusion layer partly that remaining charge carrier in the above-mentioned substrate moves to the raceway groove that constitutes conducting subsequently.Therefore, the conducting that makes above-mentioned raceway groove although just can prevent from not have light incident also can improve rectification characteristic.
In addition, bidirectional light controlled thyristor chip of the present invention, be included on the substrate and near the joint portion of 2 first diffusion layers that constitute 2 paired photo thyristors parts and above-mentioned substrate, and the joint portion of 2 second diffusion layers and above-mentioned substrate near intersect with raceway groove and the oxygen-doped semi-insulating polysilicon film of the phosphorus that mixed, first conduction type is the N type, second conduction type is the P type, above-mentioned substrate is under the situation of silicon substrate, can increase the silicon interface energy level Qss in zone of the oxygen-doped semi-insulating polysilicon film of the above-mentioned phosphorus that mixed in the above-mentioned N type surface of silicon substrate.Therefore, the minority carrier of eliminating in the N type silicon substrate is the hole, can reduce the life-span in above-mentioned hole, and can improve rectification characteristic.
And, between above-mentioned first diffusion region and the 3rd diffusion region, apply under the situation of potential pulse, can suppress the displacement electric current and flow into above-mentioned second diffusion region.Therefore, just can prevent to make the conducting of above-mentioned photo thyristor part, can improve the dv/dt characteristic even without light signal.
In addition, because bidirectional light controlled thyristor chip of the present invention is between 2 second diffusion layers of paired 2 photo thyristors part that constitutes on the substrate and near the joint portion of above-mentioned 2 second diffusion layers and above-mentioned substrate, comprise the oxygen-doped semi-insulating polysilicon film of the phosphorus that mixed respectively between 2 raceway grooves, first conduction type is the N type, second conduction type is the P type, above-mentioned substrate is under the situation of silicon substrate, can increase the silicon interface energy level Qss in zone of the oxygen-doped semi-insulating polysilicon film of the above-mentioned phosphorus that mixed in the above-mentioned N type surface of silicon substrate.Therefore, the minority carrier of eliminating in the N type silicon substrate is the hole, can reduce the life-span in above-mentioned hole, and can improve rectification characteristic.
And; in above-mentioned each bidirectional light controlled thyristor chip; if in the annular section that surrounds above-mentioned first diffusion layer and above-mentioned second diffusion layer, form transparency protected ring, just can dwindle the shading area that surrounds above-mentioned first diffusion layer and above-mentioned second diffusion layer region, can improve photosensitivity.
In addition, bidirectional light controlled thyristor chip of the present invention, in above-mentioned each photo thyristor part, between base stage and emitter electrode by above-mentioned the 3rd diffusion region and second diffusion region and substrate or above-mentioned first diffusion region and the substrate and the second diffusion region NPN transistor, the gate resistance that is connected in parallel and switch element, when forming above-mentioned switch element by the MOSFET that in the trap of above-mentioned second conduction type, forms, if the diffusion depth of above-mentioned trap is made as the diffusion depth that surpasses above-mentioned second diffusion layer, the parasitic transistor that utilization forms at above-mentioned MOSFET suppresses the amplification of displacement electric current, and the bidirectional light controlled thyristor with zero crossing function that the pulse noise dosis tolerata is improved just can be provided.
In addition because smooth starting the arc coupler of the present invention is made of bidirectional light controlled thyristor chip that can improve rectification characteristic of the present invention and light-emitting diode, so can provide do not have the rectification failure, light starting the arc coupler that misoperation is few.Especially, by using the bidirectional light controlled thyristor chip that can improve above-mentioned dv/dt characteristic, just can provide the light starting the arc coupler of further minimizing misoperation.
In addition, owing to solid state relay of the present invention is made of rectification failure of the present invention few light starting the arc coupler and buffering circuit, so can provide a kind of misoperation few solid state relay.Especially, under the situation of using the light starting the arc coupler that constitutes by the bidirectional light controlled thyristor chip that can improve above-mentioned dv/dt characteristic, can provide a kind of solid state relay of further minimizing misoperation.
Brief description of drawings
According to following detailed explanation and additional accompanying drawing, just can understand the present invention more fully.Accompanying drawing only is used for explanation, is not used in restriction the present invention.In the accompanying drawings,
Fig. 1 is the pattern layout figure in the bidirectional light controlled thyristor chip of the present invention.
Fig. 2 is the cross section of observing along the B-B ' direction among Fig. 1.
Fig. 3 is the equivalent circuit diagram of bidirectional light controlled thyristor chip shown in Figure 1.
Fig. 4 is the pattern layout figure in the bidirectional light controlled thyristor chip different with Fig. 1.
Fig. 5 is the cross section of observing along the C-C ' direction among Fig. 4.
Fig. 6 is the equivalent circuit diagram of bidirectional light controlled thyristor chip shown in Figure 4.
Fig. 7 is the pattern layout figure in the bidirectional light controlled thyristor chip different with Fig. 1 and Fig. 4.
Fig. 8 is the pattern layout figure in the bidirectional light controlled thyristor chip different with Fig. 1, Fig. 4 and Fig. 7.
Fig. 9 is the pattern layout figure in the bidirectional light controlled thyristor chip different with Fig. 1, Fig. 4, Fig. 7 and Fig. 8.
Figure 10 is the pattern layout figure in the bidirectional light controlled thyristor chip different with Fig. 1, Fig. 4, Fig. 7～Fig. 9.
Figure 11 is the cross section of observing along the D-D ' direction among Figure 10.
Figure 12 is the pattern layout figure in the bidirectional light controlled thyristor chip different with Fig. 1, Fig. 4, Fig. 7～Figure 10.
Figure 13 is the pattern layout figure in the bidirectional light controlled thyristor chip different with Fig. 1, Fig. 4, Fig. 7～Figure 10 and Figure 12.
Figure 14 is the cross section of observing along the E-E ' direction among Figure 13.
Figure 15 is the pattern layout figure in the bidirectional light controlled thyristor chip different with Fig. 1, Fig. 4, Fig. 7～Figure 10, Figure 12 and Figure 13.
Figure 16 is the equivalent circuit diagram of bidirectional light controlled thyristor chip shown in Figure 15.
Figure 17 is the pattern layout figure in the bidirectional light controlled thyristor chip different with Fig. 1, Fig. 4, Fig. 7～Figure 10, Figure 12, Figure 13 and Figure 15.
Figure 18 is to use the equivalent circuit diagram of the light starting the arc coupler of the bidirectional light controlled thyristor chip different with Fig. 1, Fig. 4, Fig. 7～Figure 10, Figure 12, Figure 13 and Figure 15.
Figure 19 is the graph of a relation of expression photosensitivity IFT and rectification characteristic Icom.
Figure 20 is the graph of a relation of expression photosensitivity IFT and dv/dt characteristic.
Figure 21 is the graph of a relation of expression rectification characteristic Icom and dv/dt characteristic.
Figure 22 is the equivalent circuit diagram of SSR (solid state relay).
Figure 23 is the sectional view at the position of the N type MOSFET in the bidirectional light controlled thyristor chip with zero crossing function shown in Figure 180.
Figure 24 (a) and (b) be plane graph and the sectional view of the N type MOSFET different with Figure 23.
Figure 25 (a) and (b) be plane graph and the sectional view of the N type MOSFET different with Figure 23 and Figure 24.
Figure 26 (a) and (b) be plane graph and the sectional view of the N type MOSFET different with Figure 23～Figure 25.
Figure 27 (a) and (b) be plane graph and the sectional view of the N type MOSFET different with Figure 23～Figure 26.
Figure 28 is to use the pattern layout figure in the bidirectional light controlled thyristor chip with zero crossing function of N type MOSFET shown in Figure 27.
Figure 29 is the cross section of observing along the J-J ' direction among Figure 28.
Figure 30 is the equivalent circuit diagram of the bidirectional light controlled thyristor chip with zero crossing function shown in Figure 28.
Figure 31 is to use the pattern layout figure in the bidirectional light controlled thyristor chip with zero crossing function of common N type MOSFET.
Figure 32 is the sectional view of Figure 31.
Figure 33 is the graph of a relation that expression has applied the pulse duration and the pulse noise dosis tolerata of pulse noise.
Figure 34 is the figure of indicating impulse noise test circuit.
Figure 35 is the pattern layout figure in original bidirectional light controlled thyristor.
Figure 36 is the cross section of observing along the A-A ' direction among Figure 35.
Figure 37 is the equivalent circuit diagram of bidirectional light controlled thyristor chip shown in Figure 35.
Figure 38 is expression makes the CH1 conducting state by the light input a sectional view.
Figure 39 is that expression does not have the light input but to make the sectional view of CH2 conducting (rectification failure) state.
Detailed description of the invention
Below, describe the present invention in detail according to illustrated example.
(first example)
Fig. 1 is the pattern layout figure of brief configuration in the bidirectional light controlled thyristor chip of this example of expression.In addition, Fig. 2 is the cross section of observing along the B-B ' direction among Fig. 1.In addition, Fig. 3 is the equivalent circuit diagram of the bidirectional light controlled thyristor chip of this example.And this equivalent circuit diagram is identical with existing bidirectional light controlled thyristor chip shown in Figure 36.
In this bidirectional light controlled thyristor chip 31, on the face side of N type silicon substrate 21, in Fig. 1, make 2 anode diffusion regions (P type) 22,22 ' be in roughly point-symmetric position with respect to the center of bidirectional light controlled thyristor chip 31, and, anode diffusion region 22 is configured in the left side, with anode diffusion region 22 ' be configured in right side.In addition, make 2 P-gate diffusion regions (P type) 23,23 ' be in roughly point-symmetric position with respect to above-mentioned center, and, P-gate diffusion region 23 is configured in the left side, with right side, P-gate diffusion region 23 ' be configured in.And, be configured, in case anode diffusion region 22 and P-gate diffusion region 23 ' opposed mutually, on the other hand, anode diffusion region 22 ' opposed mutually with P-gate diffusion region 23.And, each P-gate diffusion region 23,23 ' in, opposed anode diffusion region 22 ', 22 sides be provided with cathode diffusion region (N type) 24,24 '.Thus, the anode diffusion region 22 on right side from figure ', just formed the PNPN portion of the photo thyristor 32 of the CH1 in the pie graph 3 until the cathode diffusion region 24 in left side.That is, two of configurations move raceway groove CH1, CH2 with being separated from each other, so that they do not intersect.In addition, anode diffusion region 22 is connected by gate resistance 23 with P-gate diffusion region 23, on the other hand, anode diffusion region 22 ' with P-gate diffusion region 23 ' by gate resistance 25 ' be connected.
At this, the N type impurity concentration in the above-mentioned N type silicon substrate 21 is 10 14Cm -3About, P-gate diffusion region 23,23 ' in p type impurity concentration be 10 16Cm -3～10 18Cm -3About, cathode diffusion region 24,24 ' in N type impurity concentration be 10 20Cm -3～10 21Cm -3About.
And electrode T2 is formed on directly over the aluminium electrode 26, and is connected with anode diffusion region 22 and cathode diffusion region 24 by aluminium electrode 26.In addition, electrode T1 be formed on aluminium electrode 26 ' directly over, and by aluminium electrode 26 ' with anode diffusion region 22 ' reach cathode diffusion region 24 ' be connected.And, by the anode diffusion region 22 on above-mentioned right side ' and N type silicon substrate 21 and P-gate diffusion region, left side 23 constitute the PNP transistor Q1 of CH1 side, constitute the NPN transistor Q2 of CH1 side by the cathode diffusion region 24 in above-mentioned left side and P-gate diffusion region 23 and N type silicon substrate 21.On the other hand, by the anode diffusion region 22 in left side and N type silicon substrate 21 and P-gate diffusion region, right side 23 ' the constitute PNP transistor Q3 of CH2 side, by the cathode diffusion region 24 on right side ' and P-gate diffusion region 23 ' and N type silicon substrate 21 constitute the NPN transistor Q4 of CH2 side.
Form N type diffusion region 27 along the periphery of chip as raceway groove termination portion (stopper).And, in the surface of N type silicon substrate 27, form SiO 2Film (not shown), the position of necessity make aluminium electrode 26,26 ' between the insulation.In addition, the above-mentioned SiO on N type diffusion region 27 2On the film, form the aluminium electrode 28 that is illustrated by the broken lines.
In this example, on above-mentioned N type silicon substrate 21, the P-gate diffusion region 23 in left side and the P-gate diffusion region 23 on right side ' between, between promptly above-mentioned CH1 and the CH2, form trench isolation regions 29.And, when above-mentioned rectification, be the hole with regard to utilizing this trench isolation regions 29 to come the minority carrier in the absorption of N type silicon substrate 21, move between raceway groove with the restriction hole.
In addition, as shown in Figure 2,, spread the phosphorus that side by side spreads high concentration, form N+ layer 30 with negative electrode at the back side of above-mentioned N type silicon substrate 21.So, by on the back side of above-mentioned N type silicon substrate 21, forming high concentration (for example, 10 16Cm -3About) N+30, cause the reflection of charge carrier to utilize this N+ layer 30, so-called BSF (the back surface field Back Surface Field) effect by the life-span that makes equivalence increases improves photosensitivity.But,, therefore just be unfavorable for above-mentioned rectification characteristic because the transistorized current amplification degree Hfe of PNP (pnp) increases and holding current value IH descends.And, if do not take this structure, when the back side of N type silicon substrate 21 is N-(being still N type substrate), because charge carrier is compound again at the back side of N type silicon substrate 21 easily, so just can shorten equivalent lifetime.
When the constant design of the equivalent electric circuit of photo thyristor shown in Figure 3, though help rectification characteristic owing to shorten the life-span of above-mentioned equivalence, owing to reduced above-mentioned current amplification degree Hfe (pnp), the latter will cause photosensitivity decline.In order to revise these characteristics, in the circuit constant design, just must increase gate resistance 25,25 ' and the current amplification degree Hfe (npn) of NPN transistor, can not satisfy the so-called problem that makes the key property of the device that critical cut-ff voltage climbing dv/dt characteristic descends thereby produced.And, critical cut-ff voltage climbing dv/dt characteristic also depends on the life-span of N type silicon substrate 21: (i) under the situation of back side N-, the life-span τ p in hole is short, anode diffusion region 22,22 ' diffusion capacity descend, the transistorized work response of PNP accelerates, and critical cut-ff voltage climbing dv/dt diminishes.On the other hand, (ii) under the situation of back side N+, the life-span τ p in hole is long, anode diffusion region 22,22 ' diffusion capacity increase, the transistorized work response of PNP is slack-off, it is big that critical cut-ff voltage climbing dv/dt becomes.
Therefore, in order to satisfy trade-off relation about this rectification characteristic and critical cut-ff voltage climbing dv/dt characteristic, make the phosphorus concentration optimization at N type silicon substrate 21 back sides, the property settings of the transistorized current amplification degree Hfe of PNP (pnp) need be circuit constant arbitrarily.
Fig. 2 is near the sectional view the trench isolation regions 29 of the passivating structure of expression in this example.In Fig. 2, the left side of the trench isolation regions 29 on N type silicon substrate 21 (being the CH1 side) and right side (being the CH2 side), from the P-gate diffusion region 23 of CH1 side to the P-gate diffusion region 23 of CH2 side ' form SiO 2Film 34.And, at this SiO 2Form oxygen-doped semi-insulating polysilicon film 35, Doping Phosphorus among near the regional 35a the trench isolation regions 29 in oxygen-doped semi-insulating polysilicon 35 on the film 34.In view of the above, increased the silicon interface energy level (Qss) of the trench isolation regions 29 in the surface of N type silicon substrate 21.
And, on the zone of not mixing phosphorus in above-mentioned oxygen-doped semi-insulating polysilicon film 35, utilize CVD (Chemical Vapor Deposition) method to form SiN film 36.And, in above-mentioned CH1 side, from SiN film 36, forming aluminium electrode 26, and be connected with electrode T2 until P-gate diffusion region 23.On the other hand, in above-mentioned CH2 side, from SiN film 36 until P-gate diffusion region 23 ' formation aluminium electrode 26 ', and be connected with electrode T1.And, the doping in oxygen-doped semi-insulating polysilicon film 35 among the regional 35a of phosphorus, from the SiN film 36 of CH1 side, forming aluminium electrodes 37, and be connected with N type silicon substrate 21 until the SiN of CH2 side film 36.Thus, with the two ends of oxygen-doped semi-insulating polysilicon film 35 and central authorities and aluminium electrode 26,26 ' and aluminium electrode 37 contact, aluminium electrode 26,26 ' and aluminium electrode 37 between form electric potential gradient, to slow down Si-SiO 2The electric field at interface is concentrated.Thus, just constituted the field plate structure that helps carrying out high withstand voltageization.And in Fig. 1, the two ends of aluminium electrode 37 intersect with CH1 and CH2, and with the whole width extending across chip, to constitute Al guard ring 38.
Thus, the structure of the trench isolation regions in this example 29 by the doping that on N type silicon substrate 21, forms the oxygen-doped semi-insulating polysilicon film 35a of phosphorus constitute.During Doping Phosphorus, increase the energy level in the oxygen-doped semi-insulating polysilicon film in oxygen-doped semi-insulating polysilicon film, its result increases silicon interface energy level Qss.For this reason, in trench isolation regions 29, the minority carrier that just can cut down in the N type silicon substrate 21 is hole 39, can promote the hole minimizing in 39 life-spans.The 40th, depletion layer.
And, in this example, above-mentioned aluminium electrode 37 shown in Figure 1 and aluminium electrode 26,26 ' interval L1 value be set to greater than 30 μ m.This interval L1 value is to use this field plate structure to obtain desirable 400V or the withstand voltage necessary minimum range more than the 400V.And, improving under the withstand voltage situation, also can be withstand voltage according to this, enlarge above-mentioned interval L1 value.
In addition, in the wafer process of reality, make to form aluminium electrode 26,26 ' and aluminium electrode 37 before structure shown in Figure 1 after, Doping Phosphorus in the part of oxygen-doped semi-insulating polycrystalline silicon film 35.
(second example)
Bidirectional light controlled thyristor chip in this example has to have carried on the trench isolation regions 29 in the bidirectional light controlled thyristor chip 31 of above-mentioned first example as above-mentioned charge carrier and absorbs structure with the short circuit diode of diode.
Fig. 4 is the pattern layout figure of simple structure in the bidirectional light controlled thyristor chip of this example of expression.In addition, Fig. 5 is the cross section of observing along the C-C ' direction among Fig. 4.In addition, Fig. 6 is the equivalent circuit diagram of the bidirectional light controlled thyristor chip of this example.
N type silicon substrate 41 in the bidirectional light controlled thyristor chip 51 of this example; anode diffusion region 42; 42 '; P-gate diffusion region 43; 43 '; cathode diffusion region 44; 44 '; gate resistance 45; 45 '; aluminium electrode 46; 46 '; aluminium electrode 47, Al guard ring 48, N+ layer 49; N type silicon substrate 21 in the bidirectional light controlled thyristor chip 31 in the photo thyristor 52 of CH1 and the photo thyristor of CH2 53 and above-mentioned first example; anode diffusion region 22; 22 ', P-gate diffusion region 23; 23 ', cathode diffusion region 24; 24 '; gate resistance 25; 25 '; aluminium electrode 26; 26 ', aluminium electrode 28, Al guard ring 38; N+ layer 30, the photo thyristor 32 of CH1 and the photo thyristor 33 of CH2 are identical.But, in this example, omitted the N type diffusion region that forms along the chip periphery as raceway groove termination portion.
In the bidirectional light controlled thyristor chip 51 of this example, also the situation with above-mentioned first example is identical, the anode diffusion region 42 of N type silicon substrate 41 upper left sides and the anode diffusion region 42 on right side ' between, promptly between CH1 and the CH2, form trench isolation regions 50.And, utilize this trench isolation regions 50, when above-mentioned rectification, the minority carrier in the absorption of N type silicon substrate 41 is the hole, with restriction hole moving between raceway groove.
Fig. 5 is near the sectional view of the N type silicon substrate 41 the trench isolation regions 50 of the passivating structure of expression in this example.In Fig. 5, form p type diffusion region 54 in the zone of the trench isolation regions 50 in the surface of N type silicon substrate 41, the position of the side in left side (being the CH1 side) among the figure in p type diffusion region 54, the N type diffusion region 55 as raceway groove termination portion of formation from N type silicon substrate 41 to p type diffusion region 54, the position of the side on the right side in p type diffusion region 54 (being the CH2 side), similarly N type diffusion region 55 '.
In each side of above-mentioned CH1 side and CH2 side, from P-gate diffusion region 43,43 ' on until N type diffusion region 55,55 ' on, form SiO 2Film 56,56 '.And, from SiO 2Film 56,56 ' near P-gate diffusion region 43,43 ' until N type diffusion region 55,55 ' on, form oxygen-doped semi-insulating polysilicon film 57,57 '.And, oxygen-doped semi-insulating polysilicon film 57,57 ' in N type diffusion region 55, the middle Doping Phosphorus of regional 57a, 57a ' of 55 ' side.And, oxygen-doped semi-insulating polysilicon film 57,57 ' in the zone of not mixing phosphorus on, utilize CVD (Chemical Vapor Deposition) method form SiN film 58,58 '.And, from the P-gate diffusion region 43,43 ' the surface until SiN film 58,58 ' the surface form aluminium electrode 46,46 ', aluminium electrode 46 is connected to electrode T1, on the other hand, with aluminium electrode 46 ' be connected to electrode T2.And, from the surface of the SiN film 58 of above-mentioned CH1 side until the SiN of CH2 side film 58 ' the surface on, form aluminium electrode 59, and with N type diffusion region 55,55 ' and N type silicon substrate 41 be connected.Thus, with above-mentioned oxygen-doped semi-insulating polysilicon film 57,57 ' two ends and aluminium electrode 46,46 ' and aluminium electrode 59 contact, aluminium electrode 46,46 ' and aluminium electrode 59 between form electric potential gradient, to slow down Si-SiO 2The electric field at interface is concentrated.Thus, in this example, also formed field plate structure.And, under the situation of this example, also aluminium electrode 59 and aluminium electrode 46,46 ' interval L1 value be set to greater than 30 μ m.
According to said structure, in the trench isolation regions 50 of the surface of above-mentioned N type silicon substrate 41, form the short circuit diode 60 that makes p type diffusion region 54 and 55 short circuits of N type diffusion region across aluminium electrode 59 and N type silicon substrate 41.For this reason, the minority carrier in the N type silicon substrate 41 is that hole 61 is absorbed by the p type diffusion region 54 of short circuit diode 60, has therefore just reduced the life-span in hole 61.In addition, oxygen-doped semi-insulating polysilicon film 57,57 ' in N type diffusion region 55, the zone 57 of 55 ' side, the middle Doping Phosphorus of 57a '.Therefore, the silicon interface energy level Qss under oxygen-doped semi-insulating polysilicon film 57a, the 57a ' of phosphorus that increased doping in above-mentioned N type silicon substrate 41 surfaces.For this reason, even in the zone that this silicon interface energy level Qss increases, also can cut down hole 61, the effect that produces with utilizing short circuit diode 60 combines, and just can more positively promote the lost of life in hole 61.
And under the situation of present embodiment, as shown in Figure 4, the external diameter of above-mentioned short circuit diode 60 is set at the external diameter less than the oxygen-doped semi-insulating polysilicon film 57a of the phosphorus that mixed.In view of the above, as shown in Figure 5, on N type silicon substrate 41 surfaces, the zone that silicon interface energy level Qss is increased that oxygen-doped semi-insulating polysilicon film 57a, 57a ' by the phosphorus that mixed cause can be set, just can obtain the effect of oxygen-doped semi-insulating polysilicon film 57, the 57 ' generation of the effect that produces by short circuit diode 60 and the phosphorus that mixed thus effectively.
(the 3rd example)
Bidirectional light controlled thyristor chip in this example has the trench isolation regions 29 in the bidirectional light controlled thyristor chip 31 of above-mentioned first example of further extension and intersects the structure that forms with across the whole width of chip with CH1 and CH2.
Fig. 7 is the pattern layout figure of simple structure in the bidirectional light controlled thyristor chip 71 of this example of expression.And sectional view and the Fig. 2 of the trench isolation regions in this bidirectional light controlled thyristor chip 71 are roughly the same.In addition, equivalent electric circuit is identical with Fig. 3.
Anode diffusion region 72,72 in the bidirectional light controlled thyristor chip 71 of this example ', P-gate diffusion region 73,73 ', cathode diffusion region 74,74 ', gate resistance 75,75 ', aluminium electrode 76,76 ' and aluminium electrode 77 and above-mentioned first example in bidirectional light controlled thyristor chip 31 in anode diffusion region 22,22 ', P-gate diffusion region 23,23 ', cathode diffusion region 24,24 ', gate resistance 25,25 ', aluminium electrode 26,26 ' and aluminium electrode 28 is identical.But, in this example, thereby omitted along N type diffusion region that chip periphery forms, and in order to improve the N+ layer that photosensitivity forms on the back side of N type silicon substrate by above-mentioned BSF effect as raceway groove termination portion.
Trench isolation regions 80 in the bidirectional light controlled thyristor chip 71 of this example is each CH1 and CH2 transversely cutting, with the whole width across bidirectional light controlled thyristor chip 71 extend and form from the P-gate diffusion region 23 of the CH1 side shown in Figure 2 above-mentioned first example P-gate diffusion region 23 until the CH2 side ' on passivating structure.Therefore; as shown in Figure 7; with the bidirectional light controlled thyristor chip 31 of above-mentioned first example in the suitable position, position of Al guard ring 38, with whole width, form the oxygen-doped semi-insulating polysilicon film 78 and the aluminium electrode 79 of the phosphorus that mixed across bidirectional light controlled thyristor chip 71.And, under the situation of this example, also aluminium electrode 79 and aluminium electrode 76,76 ' interval L1 value be set to greater than 30 μ m.
By the way, a kind of method of raising rectification characteristic is to improve holding current IH.This IH characteristic represents that bidirectional light controlled thyristor can keep the minimum working current value of conducting, also represents the maximum operating currenbt that can end.This IH value is big more, and rectification characteristic is high more.Its reason is, above-mentioned IH value is subjected to the influence of the half period work of the CH1 side when AC works for the time of cut-off time till the work of the half period of opposite CH2 side is conducting.And this time is long more, just can win the time allowance till the rectification failure more, therefore, at this moment between in, just can cut down the charge carrier that moves to opposite raceway groove effectively.
Parameter as this IH characteristic comprises the circuit constant of (1) current amplification degree Hfe (pnp), (2) current amplification degree Hfe (npn), (3) RGK (gate resistance).Wherein, reduce the current amplification degree Hfe (pnp) of (1), thus with the trade-off relation of IH characteristic in, the not obvious photosensitivity (IFT) that influences just can improve the effective method of IH characteristic.And, though the circuit constant of the RGK of the current amplification degree Hfe (npn) by reducing above-mentioned (2) and (3) has improved the IH characteristic, exist what is called to reduce the drawback of photosensitivity characteristic (IFT) greatly.
In this example, on the N type silicon substrate of the base stage that constitutes PNP transistor Q1, Q3, form the oxygen-doped semi-insulating polysilicon film 78 of the phosphorus that mixed partly.The oxygen-doped semi-insulating polysilicon film 78 of this phosphorus that mixed has increase and is used to increase Si-SiO 2The compound again effect in surface of the energy level Qss at interface, and can reduce current amplification degree Hfe (pnp) effectively.
Therefore, can win the time allowance till rectification is failed, just can cut down effectively to the reverse mobile charge carrier of raceway groove.And though the phosphorus concentration that oxygen-doped semi-insulating polysilicon film is injected is high more, the current amplification degree Hfe (pnp) that reduction is used to increase Qss is just effective more,, when phosphorus concentration is too high, just reliability is brought bad influence.
In addition, in the bidirectional light controlled thyristor chip 71 in this example, intersect with CH1 and CH2, to form the oxygen-doped semi-insulating polysilicon film 78 of the above-mentioned phosphorus that mixed across the whole width of chip.Therefore, anode diffusion region 72,72 ' and cathode diffusion region 74 ', apply between 74 under the situation of potential pulse of rapid rising, just can control the displacement electric current flow into P-gate diffusion region 73,73 '.Its result even without light signal, also can not produce the misoperation of bidirectional light controlled thyristor 71 conductings.That is,, just can improve the dv/dt characteristic according to this example.
(the 4th example)
Bidirectional light controlled thyristor chip in this example have the trench isolation regions 50 in the bidirectional light controlled thyristor chip 51 that further extends in above-mentioned second example doping the oxygen-doped semi-insulating polysilicon film 57a of phosphorus and aluminium electrode 59, the structure of intersecting and forming with CH1 and CH2 across the whole width of chip.
Fig. 8 is the pattern layout figure of simple structure in the bidirectional light controlled thyristor chip 81 of this example of expression.And sectional view and the Fig. 5 of the trench isolation regions in the central portion of this bidirectional light controlled thyristor chip 81 are roughly the same.In addition, equivalent electric circuit is identical with Fig. 6.
Anode diffusion region 82,82 in the bidirectional light controlled thyristor chip 81 of this example ', P-gate diffusion region 83,83 ', cathode diffusion region 84,84 ', gate resistance 85,85 ', aluminium electrode 86,86 ' and aluminium electrode 87 and above-mentioned first example in bidirectional light controlled thyristor chip 31 in anode diffusion region 22,22 ', P-gate diffusion region 23,23 ', cathode diffusion region 24,24 ', gate resistance 25,25 ', aluminium electrode 26,26 ' and aluminium electrode 28 is identical.But, in this example, omitted, and N+ layer for photosensitivity being risen and forming at the back side of N type silicon substrate along N type diffusion region that the periphery of chip forms as raceway groove termination portion.
The structure that trench isolation regions 80 in the bidirectional light controlled thyristor chip 81 of this example has had with the doping in Fig. 4 in above-mentioned example 2 and the trench isolation regions 50 shown in Figure 5 the oxygen-doped semi-insulating polysilicon film 57a of phosphorus and aluminium electrode 59, each CH1 and CH2 transversely cutting and extended across the whole width of bidirectional light controlled thyristor chip 51.Therefore; as shown in Figure 8; with the bidirectional light controlled thyristor chip 51 of above-mentioned second example in the suitable position, position of Al guard ring 48, with whole width, form the oxygen-doped semi-insulating polysilicon film 88 and the aluminium electrode 89 of the phosphorus that mixed across bidirectional light controlled thyristor chip 81.And, under the situation of this example, also aluminium electrode 89 and aluminium electrode 86,86 ' interval L1 value be set to greater than 30 μ m.
But, the situation of the short circuit diode 59 in the bidirectional light controlled thyristor chip 51 of short circuit diode 90 and above-mentioned second example is identical, be formed on the anode diffusion region 82 of N type silicon substrate upper left side and the anode diffusion region 82 on right side ' between, promptly between CH1 and the CH2.
Therefore, according to this example, identical with the situation of the bidirectional light controlled thyristor chip 71 of above-mentioned the 3rd example, reduced current amplification degree Hfe (pnp) effectively, just can win the time margin till rectification is failed, utilize the zone that increases the silicon interface energy level Qss in the N type surface of silicon substrate, just can cut down effectively to the reverse mobile charge carrier of raceway groove.In addition, also utilizing the P-gate diffusion region of above-mentioned short circuit diode 90 to come the minority carrier in the absorption of N type silicon substrate is the hole, just can shorten the life-span in hole thus.
In addition, in the bidirectional light controlled thyristor chip 81 in this example, intersect with CH1 and CH2, to form the oxygen-doped semi-insulating polysilicon film 88 of the above-mentioned phosphorus that mixed across the whole width of chip.Therefore, anode diffusion region 82,82 ' and cathode diffusion region 84 ', apply between 84 under the situation of potential pulse of rapid rising, can control the displacement electric current flow into P-gate diffusion region 83,83 ', just can prevent to make the misoperation of bidirectional light controlled thyristor 81 conductings even without light signal.That is,, just can improve the dv/dt characteristic according to this example.
(the 5th example)
Bidirectional light controlled thyristor chip in this example has short circuit diode 90 in the bidirectional light controlled thyristor chip 81 that further extends in above-mentioned the 4th example, to intersect the structure that forms across the whole width of chip with CH1 and CH2.
Fig. 9 is the pattern layout figure of simple structure in the bidirectional light controlled thyristor chip 91 of this example of expression.And sectional view and the Fig. 5 of the trench isolation regions in this bidirectional light controlled thyristor chip 91 are roughly the same.In addition, equivalent electric circuit is identical with Fig. 6.
Anode diffusion region 92,92 in the bidirectional light controlled thyristor chip 91 of this example ', P-gate diffusion region 93,93 ', cathode diffusion region 94,94 ', gate resistance 95,95 ', aluminium electrode 96,96 ' and aluminium electrode 97 and above-mentioned first example in bidirectional light controlled thyristor chip 31 in anode diffusion region 22,22 ', P-gate diffusion region 23,23 ', cathode diffusion region 24,24 ', gate resistance 25,25 ', aluminium electrode 26,26 ' and aluminium electrode 28 is identical.But, in this example, omitted, and N+ layer for photosensitivity being risen and forming at the back side of N type silicon substrate along N type diffusion region that the periphery of chip forms as raceway groove termination portion.
Trench isolation regions 101 in the bidirectional light controlled thyristor chip 91 of this example has CH1 and H2 transversely cutting, the structure that will extend across the whole width of bidirectional light controlled thyristor chip 91 at the Fig. 4 in above-mentioned second example and trench isolation regions 50 shown in Figure 5.Therefore, as shown in Figure 9,, form oxygen-doped semi-insulating polysilicon film 98 and the aluminium electrode 99 and the short circuit diode 100 of the phosphorus that mixed across the whole width of bidirectional light controlled thyristor chip 91.And, under the situation of this example, also with aluminium electrode 96 and aluminium electrode 96,96 ' interval L1 value be set to greater than 30 μ m.
Therefore, according to this example, compare with the situation of the bidirectional light controlled thyristor chip 81 of above-mentioned the 4th example, just the minority carrier that more can absorb in the above-mentioned N type silicon substrate is the hole, and can shorten the life-span in hole.
In addition, in the bidirectional light controlled thyristor chip 91 in this example, intersect with CH1 and CH2, to form the oxygen-doped semi-insulating polysilicon film 98 of the above-mentioned phosphorus that mixed across the whole width of chip.Therefore, anode diffusion region 92,92 ' and cathode diffusion region 94 ', apply between 94 under the situation of potential pulse of rapid rising, can control the displacement electric current flow into P-gate diffusion region 93,93 ', just can prevent to make the misoperation of bidirectional light controlled thyristor 91 conductings even without light signal.That is,, just can improve the dv/dt characteristic according to this example.
(the 6th example)
Figure 10 is the pattern layout figure of simple structure in the bidirectional light controlled thyristor chip of this example of expression.In addition, Figure 11 is the cross section of observing along the D-D ' direction among Figure 10.In addition, equivalent electric circuit is identical with Fig. 3.
N type silicon substrate 111 in the bidirectional light controlled thyristor chip 120 of this example; anode diffusion region 112; 112 '; P-gate diffusion region 113; 113 '; cathode diffusion region 114; 114 '; gate resistance 115; 115 '; aluminium electrode 116; 116 '; aluminium electrode 117; N type silicon substrate 21 in the bidirectional light controlled thyristor chip 31 in Al guard ring 118 and N+ layer 119 and above-mentioned first example; anode diffusion region 22; 22 '; P-gate diffusion region 23; 23 '; cathode diffusion region 24; 24 '; gate resistance 25; 25 ', aluminium electrode 26; 26 '; aluminium electrode 28; Al guard ring 38 and N+ layer 30 are identical.But, in this example, omitted the N type diffusion region that forms along the periphery of chip as raceway groove termination portion.
In the bidirectional light controlled thyristor chip 120 of this example, along mutual opposed P-gate diffusion region 113 and anode diffusion region 112 ' relative edge, and anode diffusion region 112 and P-gate diffusion region 113 ' the relative edge, in other words, 2 anode diffusion regions 112,112 ' and the joint portion of N type silicon substrate 111 near, and 2 P-gate diffusion regions 113,113 ' and the joint portion of N type silicon substrate 111 near, form oxygen-doped semi-insulating polysilicon film 122a, the 122a ', 124,124 ' of the phosphorus that mixed.
Below, according to Figure 11 illustrate above-mentioned P-gate diffusion region 113 and anode diffusion region 112 ' the relative edge.In Figure 11, from the cathode diffusion region 114 in Al guard ring 118 left sides on the N type silicon substrate 111 to the anode diffusion region 112 on right side ' on, form SiO 2Film 121.And, at this SiO 2 P-gate diffusion region 113 on the film 121 and anode diffusion region 112 ' the outside form oxygen-doped semi-insulating polysilicon film 122, near the P-gate diffusion region 113 in the oxygen-doped semi-insulating polysilicon 122 and the middle Doping Phosphorus of regional 122a, 122a ' of anode diffusion region 112 ' side.In view of the above, the silicon interface energy level (Qss) under oxygen-doped semi-insulating polysilicon film 122a, the 122a ' of phosphorus that increased doping in the surface of above-mentioned N type silicon substrate 111.
And, on the zone of not mixing phosphorus in above-mentioned oxygen-doped semi-insulating polysilicon film 122, utilize CVD (Chemical Vapor Deposition) method to form SiN film 123.And, in above-mentioned left side, form aluminium electrodes 116 from the oxygen-doped semi-insulating polysilicon film 122a of the phosphorus that mixed is last until P-gate diffusion region 113, and be connected with electrode T2.On the other hand, in above-mentioned right side, from the oxygen-doped semi-insulating polysilicon film 122a ' of the phosphorus that mixed go up until P-gate diffusion region 112 ' form aluminium electrode 116 ', and be connected with electrode T1.And, form the aluminium electrode so that cut apart SiN film 123, and be connected to N type silicon substrate 111, constitute Al guard ring 118.Thus, with the two ends of oxygen-doped semi-insulating polysilicon film 122 and central authorities and aluminium electrode 116,116 ' and aluminium electrode 118 contact, aluminium electrode 116,116 ' and aluminium electrode 118 between form electric potential gradient, to slow down Si-SiO 2The electric field at interface is concentrated.Thus, constituted the field plate structure that helps carrying out high withstand voltageization.
As above, in bidirectional light controlled thyristor chip 120, along mutual opposed P-gate diffusion region 113 and anode diffusion region 112 ' the relative edge, form oxygen-doped semi-insulating polysilicon film 122a, the 122a ' of the phosphorus that mixed.And, along mutual opposed anode diffusion region 112 and P-gate diffusion region 113 ' the relative edge, formation mixed the oxygen-doped semi-insulating polysilicon film 124,124 of phosphorus ', just can increase P-gate diffusion region 113 in the surface of N type silicon substrate 111 and anode diffusion region 112 ' the relative edge near and anode diffusion region 112 and P-gate diffusion region 113 ' the relative edge near silicon interface energy level (Qss).
Promptly, according to this example, identical with the situation of the bidirectional light controlled thyristor chip 71 of above-mentioned the 3rd example, reduced current amplification degree Hfe (pnp) effectively, and can win time margin till the rectification failure, regional 122a, the 122a ', 124,124 that can increase at the silicon interface energy level Qss in the surface of N type silicon substrate 111 ' cuts down effectively to the reverse mobile charge carrier of raceway groove.In addition, the 125th, depletion layer.
In addition, in the bidirectional light controlled thyristor chip 120 in this example, form oxygen-doped semi-insulating polysilicon film 122a, the 122a ', 124,124 ' of the above-mentioned phosphorus that mixed across with above-mentioned CH1 and CH2.Therefore, anode diffusion region 112,112 ' and cathode diffusion region 114 ', apply between 114 under the situation of potential pulse of rapid rising, can control the displacement electric current flow into P-gate diffusion region 113,113 '.Just can prevent to make the mistake of the bidirectional light controlled thyristor 120 conductings work of making an uproar even without light signal.That is,, just can improve the dv/dt characteristic according to this example.
And, in this example, the value of above-mentioned Al guard ring shown in Figure 10 118 with the interval L2 of oxygen-doped semi-insulating polysilicon film 122a, the 122a ', 124,124 ' of the phosphorus that mixed is set at greater than 30 μ m.The value of this above-mentioned interval L2 is to use this field plate structure for obtaining the above withstand voltage necessary minimum range of desirable 400V or 400V.And, improving under the withstand voltage situation, also can be withstand voltage according to this, enlarge above-mentioned interval L2 value.
In addition, oxygen-doped semi-insulating polysilicon film 122a, the 122a ', 124,124 ' of the phosphorus that mixed is connected with electrode T2 (cathode electrode) with electrode T1 (anode electrode), is the transparency electrode that constitutes the part of field plate structure.Therefore, adopt the situation of Al film to compare, more can improve the not local photosensitivity of shield light with the oxygen-doped semi-insulating polysilicon film that substitutes the above-mentioned phosphorus that mixed.
(the 7th example)
Figure 12 is the pattern layout figure of simple structure in the bidirectional light controlled thyristor chip of this example of expression.In addition, equivalent electric circuit is identical with Fig. 3.
Anode diffusion region 132,132 in the bidirectional light controlled thyristor chip 131 of this example ', P-gate diffusion region 133,133 ', cathode diffusion region 134,134 ', gate resistance 135,135 ', aluminium electrode 136,136 ' and aluminium electrode 137 and above-mentioned first example in bidirectional light controlled thyristor chip 31 in anode diffusion region 22,22 ', P-gate diffusion region 23,23 ', cathode diffusion region 24,24 ', gate resistance 25,25 ', aluminium electrode 26,26 ' and aluminium electrode 28 is identical.But, in this example, omitted, and the N+ layer that forms at the back side of N type silicon substrate for photosensitivity is risen along N type diffusion region that the periphery of chip forms as raceway groove termination portion.
In the bidirectional light controlled thyristor chip 131 of this example, with respect to chip center, interconnect the P-gate diffusion region 133,133 that is configured in point-symmetric position ' line on and the position that isolates with CH1 and CH2, with respect to chip center with the formation of point symmetry ground mixed the oxygen-doped semi-insulating polysilicon film 138,138 of phosphorus '.Thus, the silicon interface energy level (Qss) in the oxygen-doped semi-insulating polysilicon film 138,138 of phosphorus ' zone that just can increase doping in the above-mentioned N type surface of silicon substrate.
That is, according to this example, the minority carrier that can cut down in the above-mentioned N type silicon substrate in the zone that silicon interface energy level Qss increases is the hole, can positively promote the shortening of hole life.
And, in this example, with the oxygen-doped semi-insulating polysilicon film 138,138 of the above-mentioned phosphorus that mixed shown in Figure 12 ' and aluminium electrode 136,136 ' the value of interval L3 and the oxygen-doped semi-insulating polysilicon film 138,138 of 2 phosphorus that mixed ' the value of space L4 be set at greater than 30 μ m.The value of this above-mentioned interval L3 and interval L4 is to use this field plate structure for obtaining the above withstand voltage necessary minimum range of desirable 400V or 400V.And, improving under the withstand voltage situation, also can be withstand voltage according to this, enlarge the value of above-mentioned interval L3 and interval L4.
(the 8th example)
Bidirectional light controlled thyristor chip in this example have aluminium electrode 86,86 in the bidirectional light controlled thyristor chip 81 of above-mentioned the 4th example ' around form the structure of the oxygen-doped semi-insulating polysilicon film of the phosphorus that mixed.
Figure 13 is the pattern layout figure of simple structure of the bidirectional light controlled thyristor chip 152 of this example of expression.In addition, Figure 14 is that E-E ' among Figure 13 is to looking sectional view.In addition, equivalent electric circuit is identical with Fig. 6.
N type silicon substrate 141 in the bidirectional light controlled thyristor chip 152 of this example, anode diffusion region 142,142 ', P-gate diffusion region 143,143 ', cathode diffusion region 144,144 ', gate resistance 145,145 ', N type silicon substrate 21 in the bidirectional light controlled thyristor chip 31 in aluminium electrode 147 and N+ layer 151 and above-mentioned first example, anode diffusion region 22,22 ', P-gate diffusion region 23,23 ', cathode diffusion region 24,24 ', gate resistance 25,25 ', aluminium electrode 28 and N+ layer 30 are identical.In addition, mixed doping in the bidirectional light controlled thyristor 81 of oxygen-doped semi-insulating polysilicon film 148, aluminium electrode 149 and the short circuit diode 150 of phosphorus and the 4th example oxygen-doped semi-insulating polysilicon film 88, aluminium electrode 89 and the short circuit diode 90 of phosphorus identical.But, in this example, omitted the N type diffusion region that forms along the periphery of chip as raceway groove termination portion.
In this example, as shown in figure 13, by can cover fully P-gate diffusion region 143,143 ', gate resistance 145,145 ' and anode diffusion region 142,142 ' the rectangular shape of minimum form aluminium electrode 146,146 '.That is, form the aluminium electrode 146,146 littler than aluminium electrode in above-mentioned each example 26,46,76,86,96,116,136 '.And, as shown in figure 14, the SiO on the surface that is formed on N type silicon substrate 141 2Form on the film 155 and the oxygen-doped semi-insulating polysilicon film 156 of its part as the oxygen-doped semi-insulating polysilicon film 148 of the phosphorus that mixed in, Doping Phosphorus in surrounding the Rack zone 156a of aluminium electrode 146.And, in the zone of not mixing phosphorus on oxygen-doped semi-insulating polysilicon film 156, utilize the chemical vapor-phase growing method to form SiN film 157,158.And, from SiN film 157 on the oxygen-doped semi-insulating polysilicon film 156a of the phosphorus that mixed, form Al guard ring 159.And, under the situation of this example, also with aluminium electrode 149 and Al guard ring 159,159 ' the value of interval L1 be set at greater than 30 μ m.
So, in the bidirectional light controlled thyristor chip 152 in this example, intersect with CH1 and CH2, to form the oxygen-doped semi-insulating polysilicon film 148 of the phosphorus that mixed across the whole width of chip.Therefore, just can improve rectification characteristic.And; by can cover fully P-gate diffusion region 143,143 '; gate resistance 145,145 ' and anode diffusion region 142,142 ' the rectangular shape of minimum form aluminium electrode 146,146 '; and surround this aluminium electrode 146,146 '; formation by the guard ring of the oxygen-doped semi-insulating polysilicon film 156a of the phosphorus that mixed, hyaline membrane that 156a ' constitutes and Al guard ring 159,159 ', constitute the duplicate protection ring structure.Therefore, reduce P-gate diffusion region 143,143 ' and the shading area of the calmodulin binding domain CaM of N type silicon substrate 141, can improve photosensitivity.
And; in this example; to surround above-mentioned aluminium electrode 146,146 ', suitably be used in the bidirectional light controlled thyristor chip 81 of above-mentioned the 4th example by the duplicate protection ring structure of oxygen-doped semi-insulating polysilicon film 156a, the 156a ' of the phosphorus that mixed and Al guard ring 159,159 ' constitute., undoubtedly, be applicable to other example, also can improve photosensitivity.
(the 9th example)
Bidirectional light controlled thyristor chip in this example has the structure of P-gate diffusion region 83, the 83 ' formation Schottky barrier diode in the bidirectional light controlled thyristor chip 81 of above-mentioned the 8th example.And in the following description, the member identical with the bidirectional light controlled thyristor chip 81 of above-mentioned the 4th example given the member numbering identical with the member numbering of above-mentioned the 4th example, and omits its explanation.
Figure 15 is the pattern layout figure of simple structure of the bidirectional light controlled thyristor chip 161 of this example of expression.In addition, Figure 16 is an equivalent circuit diagram.
Do not form above-mentioned P-gate diffusion region 83,83 ' in cathode diffusion region 84,84 ' the zone in, do not spread the rectangular aperture portion (not shown) of p type impurity with anode diffusion region 84,84 ' concurrently setting.In addition, at SiO 2 P-gate diffusion region 84,84 in the film 56 (with reference to Fig. 5) ' the position of above-mentioned peristome, form opening (not shown) so that surround this peristome.And, aluminium electrode 86,86 ' in SiO 2The above-mentioned aperture position formation peristome 164,164 of film 56 ' so that surround this opening.And, aluminium electrode 86,86 ' peristome 164,164 ' in, and at SiO 2In the above-mentioned opening of film 56, along aluminium electrode 86,86 ' peristome 164,164 ' formation rectangle aluminium electrode 165,165 '.At this moment, aluminium electrode 86,86 ' and aluminium electrode 165,165 ' between, but form the space of electric insulation.
As mentioned above, pass through SiO 2The above-mentioned opening of film 56, above-mentioned aluminium electrode 165,165 ' just directly contact P-gate diffusion region 83,83 ' the interior N type silicon substrate (not shown) of above-mentioned peristome.Thus, P-gate diffusion region 83,83 ' and above-mentioned N type silicon substrate between form Schottky barrier diode 166,166 '.At this, (make the load current decay in rectification according to alternating current, the process that photo thyristor is ended) time until photo thyristor 166,166 ' before ending, P-gate diffusion region (NPN transistor Q2, Q4 base region) 83,83 ' be in saturation condition, but under this state, utilize Schottky barrier diode suppress from the P-gate diffusion region 83,83 ' to N type silicon substrate injected minority carrier (hole).Therefore, reduce the residual charge carrier amount in the N type silicon substrate, can further improve rectification characteristic.But, since reduced above-mentioned P-gate diffusion region 83,83 ' the light area, the shortcoming that just exists photosensitivity to descend.
And, in the above description, for constitute Schottky barrier diode 166,166 ' metal material for, can use Al.But, replace Al, also can use metal materials such as Cr, Mo, Ti, Pt.
(the tenth example)
Bidirectional light controlled thyristor chip in this example has the structure of P-gate diffusion region 143, the 143 ' formation Schottky barrier diode in the bidirectional light controlled thyristor chip 152 of above-mentioned the 8th example.And, in the following description, give the member numbering identical for the member identical, and omit its explanation with the member numbering of above-mentioned the 8th example with the bidirectional light controlled thyristor chip 152 of above-mentioned the 8th example.
Figure 17 is the pattern layout figure of simple structure of the bidirectional light controlled thyristor chip 171 of this example of expression.In addition, Figure 16 is an equivalent circuit diagram.
In this example; identical with the situation of the bidirectional light controlled thyristor 152 of above-mentioned the 8th example; by the rectangular shape of necessary Min. size form aluminium electrode 146,146 '; and surround this aluminium electrode 146,146 ', form guard ring and Al guard ring by the oxygen-doped semi-insulating polysilicon film 156a of the phosphorus that mixed, hyaline membrane that 156a ' constitutes.Therefore, reduce P-gate diffusion region 143,143 ' and the shading area of the calmodulin binding domain CaM of N type silicon substrate 141, can improve photosensitivity.
And, do not form P-gate diffusion region 143,143 ' in cathode diffusion region 144,144 ' the zone in, form have with the Schottky barrier diode 172,172 of above-mentioned the 9th example same structure '.Therefore, can suppress from the P-gate diffusion region 143,143 ' to N type silicon substrate injected minority carrier (hole).Its result has just reduced the residual charge carrier amount in the above-mentioned N type silicon substrate, can further improve rectification characteristic.
And, intersect with above-mentioned CH1 and CH2, form the oxygen-doped semi-insulating polysilicon film 148 of the above-mentioned phosphorus that mixed.Therefore, anode diffusion region 142,142 ' and cathode diffusion region 144 ', apply under the situation of potential pulse between 144, also can prevent to make the misoperation of bidirectional light controlled thyristor 171 conductings even without light signal.That is,, just can improve the dv/dt characteristic according to this example.
That is,, can improve rectification characteristic and raising dv/dt characteristic and improve photosensitivity simultaneously according to this example.
(the 11 example)
This example relates to a kind of bidirectional light controlled thyristor chip with zero crossing function.Figure 18 is to use the equivalent circuit diagram of light starting the arc coupler of the bidirectional light controlled thyristor chip of this example.The bidirectional light controlled thyristor chip 181 of this example is identical with the bidirectional light controlled thyristor chip 51 of above-mentioned second example, comprise: photo thyristor 182 with CH1 side of PNP transistor Q1 and NPN transistor Q2, photo thyristor 183 with CH2 side of PNP transistor Q3 and NPN transistor Q4 connects short circuit diode 184 on the base stage of PNP transistor Q1, Q3.
And, between the base stage and electrode T2 of the NPN transistor Q2 of above-mentioned CH1 side, be connected in parallel to N type FET (field-effect transistor) 186 with gate resistance 185.Similarly, between the base stage and electrode T1 of the NPN transistor Q4 of above-mentioned CH2 side, be connected in parallel to N type FET (field-effect transistor) 188 with gate resistance 187.And, the grid of N type FET 186 are connected to the base stage of PNP transistor Q1, on the other hand, the grid of N type FET 187 are connected to the base stage of PNP transistor Q3.The 189th, LED.
Therefore, near the zero cross point of the supply voltage of setovering between above-mentioned electrode T1-T2, N type FET 186,188 ends, corresponding with the resistance value of gate resistance 185,187, NPN transistor Q2, Q4 are applied base-emitter voltage, when the light signal that receives from LED 189, owing to help in P-gate diffusion region generation photoelectric current, NPN transistor Q2, Q4 conducting.With respect to this, in the time that the zero cross point from above-mentioned supply voltage breaks away from, since N type FET 186,188 conductings, short circuit between the Base-Emitter of NPN transistor Q2, Q4, even receive the light signal from LED 189, NPN transistor Q2, Q4 can conductings yet.
Thus, only near the zero cross point of the supply voltage of setovering between above-mentioned electrode T1-T2, just can realize making the zero crossing function of photo thyristor 182,183 conductings.And, adopt the bidirectional light controlled thyristor chip 51 of above-mentioned second example, just rectification characteristic Icom can be improved as about 100mArms or more than the 100mArms.Therefore, the rectification failure of light starting the arc coupler can be do not made, misoperation can be reduced.
And, in the structure of the bidirectional light controlled thyristor chip with zero crossing function 181 shown in Figure 180, between the Base-Emitter of NPN transistor Q2, Q4, form Schottky barrier diode, just can constitute bidirectional light controlled thyristor chip with the zero crossing function that forms Schottky barrier diode.
In addition, undoubtedly, above-mentioned N type FET 186,188 also can be made of other switch element with control terminal.
In addition, light starting the arc coupler in above-mentioned the 11 example, though use the bidirectional light controlled thyristor chip 51 of above-mentioned second example, but, undoubtedly, also can use in the bidirectional light controlled thyristor chip 31,71,81,91,120,131,152,161,171 in above-mentioned first example, the 3rd example～the tenth example any one.
Figure 19～Figure 21 is a situation about being compared about the bidirectional light controlled thyristor chip 31,51,71,81,91,120,131,152,161,171 in above-mentioned first～the tenth example and Figure 35 and existing bidirectional light controlled thyristor chip 4 shown in Figure 36, with rectification characteristic Icom and dv/dt characteristic and photosensitivity IFT.
Figure 19 is the graph of a relation of above-mentioned photosensitivity IFT of expression and rectification characteristic Icom.And the numbering among the figure is represented the numbering of example, for example [1] representative [first example].In addition, represent for existing bidirectional light controlled thyristor chip 4 usefulness Δs.In the table 1, show relevant each example and photosensitivity IFT (mA), the rectification characteristic Icom (mA) of existing bidirectional light controlled thyristor chip 4 and the value of dv/dt (V/ μ s) characteristic.But the measurement boundary of dv/dt is 3200V/ μ s, in Figure 20 and Figure 21, for the ease of watching curve chart, represents with the desired value more than the 3200V/ μ s for the value that surpasses above-mentioned measurement boundary.
Table 1
IFT Icom dv/dt(100℃)
1、2、7 First and second, seven examples 5.5 100 1000
3、4、5、6 Third and fourth, five, six examples 6.5 150 More than 3200
8 The 8th example 2.75 100 1000
9 The 9th example 7.5 240 More than 3200
10 The tenth example 3.8 245 More than 3200
Existing 5.5 40 1000
Figure 19 shows, in all examples, compares with existing bidirectional light controlled thyristor chip 4, has increased above-mentioned rectification characteristic value Icom.This be because, in all examples, the P-gate diffusion region 23,43,73,83,93,113,133,143 of above-mentioned CH1 side and the P-gate diffusion region 23 of CH2 side ', 43 ', 73 ', 83 ', 93 ', 113 ', 133 ', 143 ' between, form the oxygen-doped semi-insulating polysilicon film 35a, 57a, 78,88,98,122a, 124,138,138 of the phosphorus that mixed ', 148,156a, 156a '.Therefore, increased the silicon interface energy level (Qss) in the above-mentioned N type surface of silicon substrate, the above-mentioned charge carrier that can cut down in the zone of the oxygen-doped semi-insulating polysilicon film of the above-mentioned phosphorus that mixed in the N type silicon substrate is the hole, can shorten the life-span in above-mentioned hole.Therefore, its result can improve rectification characteristic.
In addition, in above-mentioned the 8th, ten examples, reduced above-mentioned sensitivity value IFT.This be because; by the rectangular shape of the minimum that can cover P-gate diffusion region, gate resistance and anode diffusion region fully form aluminium electrode 146,146 '; and surround this aluminium electrode 146,146 ', form guard ring and Al guard ring by the oxygen-doped semi-insulating polysilicon film 156a of the phosphorus that mixed, hyaline membrane that 156a ' constitutes.Therefore, can reduce the shading area of aluminium electrode 146,146 ' on every side, its result just can improve photosensitivity.
Figure 20 is the graph of a relation of above-mentioned photosensitivity IFT of expression and dv/dt characteristic.And the numbering among the figure is the numbering of example.Figure 20 shows, at third and fourth, in five, six, nine, ten examples, increased above-mentioned dv/dt characteristic value.This be because, at third and fourth, in five, six, nine, ten examples, on above-mentioned N type silicon substrate, oxygen-doped semi-insulating polysilicon film 78,88,98,122a, 124,138,138 ', 148,156a, the 156a ' of the phosphorus that mixed have been formed across with above-mentioned CH1 and CH2.Therefore, under the situation of the potential pulse that applies rapid rising between above-mentioned anode diffusion region and the cathode diffusion region, can control the displacement electric current and flow into the corresponding P-gate diffusion region that receives original light signal.Its result even without light signal, also can not produce the misoperation of bidirectional light controlled thyristor 71,81,91,120,161,171 conductings, can improve the dv/dt characteristic.
Figure 21 is the graph of a relation of above-mentioned rectification characteristic Icom of expression and dv/dt characteristic.And the numbering among the figure is represented the numbering of example.Figure 21 shows, in all examples, has increased above-mentioned rectification characteristic value Icom, at third and fourth, in five, six, nine, ten examples, has increased above-mentioned dv/dt value.
(the 12 example)
This example relates to use by the bidirectional light controlled thyristor chip of above-mentioned first～the 11 example and the SSR of the light starting the arc coupler that LED constitutes.
Figure 22 is the equivalent electric circuit of SSR.SSR 198 is by constituting with the lower part: light starting the arc coupler 193, bidirectional thyristor (main thyristor) 194 that is used for the working control load that is made of with bidirectional light controlled thyristor 192 light-emitting components such as LED 191 and the starting the arc and the buffer circuit 197 that is formed by resistor 195 and capacitor 196 etc.At this,, using the bidirectional light controlled thyristor chip 31,51,71,81,91,120,131,152,161,171,181 of above-mentioned first～the 11 example as the bidirectional light controlled thyristor 192 that the starting the arc is used.In the foregoing circuit structure, the working control load current be main thyristor 194, bidirectional light controlled thyristor 192 is used for light starting the arc main thyristor 194.
In this example, as above-mentioned starting the arc bidirectional light controlled thyristor 192, can use the bidirectional light controlled thyristor chip 31,51,71,81,91,120,131,152,161,171,181 of above-mentioned first～the 11 example, so that above-mentioned rectification characteristic Icom is improved to about 100mArms or more than the 100mArms.Therefore, can obtain to use the light starting the arc coupler 193 and the few SSR198 of misoperation of no rectification failure.
And, as above-mentioned starting the arc bidirectional light controlled thyristor 192, if use the bidirectional light controlled thyristor chip 71,81,91,120,161,171 o'clock of the raising dv/dt characteristic of above-mentioned the 3rd example～the 6th example, the 9th example and the tenth example, just can obtain further to reduce the SSR 198 of misoperation.And, as starting the arc bidirectional light controlled thyristor 92, can realize improving rectification characteristic and improving the bidirectional light controlled thyristor chip 152,171 o'clock of photosensitivity of above-mentioned the 8th example and the tenth example if use, just can obtain the higher SSR of further photosensitivity 198.
(the 13 example)
By the way, have at the sort of shown in above-mentioned the 11 example under the situation of bidirectional light controlled thyristor of zero crossing function, except the problem that has above-mentioned general non-zero chiasma type bidirectional light controlled thyristor, also there are 2 distinctive problems as described below.
At first, first, in equivalent electric circuit shown in Figure 180, just the current amplification degree Hfe (npn) of NPN transistor Q2, Q4 must be set than high about 5～10 times of the situation of non-zero chiasma type bidirectional light controlled thyristor.Its reason is because fasten necessary response high speed operation in the pass that has the so-called time restriction that only can trigger below near the voltage the zero cross point.Especially, when using, in the switch AC circuit, exist under the situation of L load, postpone because of phase deviation produces action as the bidirectional light controlled thyristor chip that constitutes above-mentioned SSR, will occur can not conducting situation.But anti-noise properties and current amplification degree Hfe (npn) are closely related, and exist so-called current amplification degree Hfe (npn) high more, the problem that anti-noise properties is low more.
The second, constituting under the situation of above-mentioned N type FET 186,188 by MOS (burning film semiconductor) FET, just must be suppressed at the work of the parasitic transistor among this MOSFET, even under the situation of the noise voltage of time short pulse shape, above-mentioned MOSFET is worked fully.
As mentioned above, so-called zero crossing function is the enhancement mode MOSFET 186,188 of additional N raceway groove between the P-gate-negative electrode of photo thyristor 182,183, under about 30V or the AC voltage more than the 30V, make short circuit between above-mentioned P-gate-negative electrode, thereby can make photo thyristor 182,183 idle functions.Thus, because will the triggered time be limited to low-voltage the time, so the operating current that flows when triggering also can be limited very lowly.Therefore, possess the zero crossing function, just have the relevant advantage of Safety Design so-called and on the design control circuit.
And; above-mentioned MOSFET 186,188 except above-mentioned zero crossing function, even also have under the situation that when connecting the power supply of equipment mistake applies the noise voltage that is easy to generate dv/dt high about 1KV/ μ sec, also can prevent because of the P-gate-negative electrode of photo thyristor 182,183 between the function as excess voltage protection of misoperation of short circuit.But, even also can there be the situation that can't prevent the above-mentioned misoperation under the noise voltage situation that applies pulse type in built-in MOSFET 186,188.
At this, the noise voltage of so-called above-mentioned pulse type is sharply to rise with the AC line overlap and the noise voltage of short pulse shape.And the condition of the pulse type of this situation is that pulse duration is 0.1 μ sec～1.0 μ sec, and voltage is about 4KV or below the 4KV.Therefore, applying under the voltage condition of this short pulse shape, just do not working as the MOSFET 186,188 of excess voltage protection, because thyristor 182,183 misoperations between this, the therefore problem that just exists so-called noise dosis tolerata to descend in mistake.
This be because, under the state of the voltage that applies rapid rising, in the path of spreading the parasitic transistor that constitutes by N type substrate-P type trap-N type leakage of above-mentioned MOSFET 186,188, also flow into the displacement electric current, this displacement electric current amplifies through parasitic transistor, flows into the P-gate of thyristor 182,183 by wiring.Because this electric current plays the trigger current of thyristor 182,183, will cause the misoperation of bidirectional light controlled thyristor thus.
This 13 example～the 18 example is to solve the distinctive problem of bidirectional light controlled thyristor with zero crossing function, when promptly improving the current amplification degree Hfe (npn) of NPN transistor Q2, Q4 in order to obtain the high speed operation response, anti-noise properties is reduced, make the displacement electric current flow into the parasitic transistors that form in the MOSFET 186,188 and cause misoperation etc.
Figure 23 is the sectional view that the NPN transistor Q2 in the photo thyristor 182 of the bidirectional light controlled thyristor chip with zero crossing function 181 shown in Figure 180 has reached N type MOSFET 186 positions of zero crossing function.By in the P-gate diffusion region 202 that forms on the surface of N type silicon substrate 201, the cathode diffusion region (N type) 203 that forms on 202 inner surfaces of P-gate diffusion region, N type silicon substrate constitute NPN transistor Q2.And, in the surface of N type silicon substrate 201, form P trap diffusion region 204, in the surface of this P trap diffusion region 204, form the diffusion region, source (N type) 205 of N type MOSFET 186 and leak diffusion region (N type) 206.And, the simple gate region 207 that is connected with VP (the voltage probe Voltage Probe) circuit 209 of control-grid voltage of describing.
And the above-mentioned anode diffusion region 203 described in above-mentioned the 11 example and P trap diffusion region 204 and diffusion region, source 205 are connected also ground connection simultaneously with an end and the electrode T2 of gate resistance 185.In addition, the other end of gate resistance 185 is connected with leakage diffusion region 206 with P-gate diffusion region 203.
In this example, the degree of depth a of above-mentioned P trap diffusion region 204 is set at the degree of depth more than the degree of depth b of P-gate diffusion region 202, and forms 13 times the degree of depth.Thus, the degree of depth that the current amplification degree Hfe of the parasitic transistor 208 that formed by the leakage diffusion region 206 of N type MOSFET 186 and P trap diffusion region 204 and N type silicon substrate 201 can be reduced to the depth ratio P-gate diffusion region that is lower than P trap diffusion region also wants shallow routine have the situation of the bidirectional light controlled thyristor chip of zero crossing function.
Therefore, between above-mentioned P trap diffusion region 204 and N type silicon substrate 201, apply pulse duration and be 0.1 μ sec～1.0 μ sec, voltage and be under the situation of noise voltage of the following short pulse shape reverse voltage of about 4KV or 4KV, just can suppress the amplification of the above-mentioned displacement electric current of moment inflow parasitic transistor 208 by the junction capacitance of P trap diffusion region 204 and N type silicon substrate 201.That is, according to this example, just can suppress the above-mentioned displacement electric current that the trigger current effect is played in existing inflow P-gate diffusion region 202, and can improve the peaked pulse noise dosis tolerata of the above-mentioned pulse type noise voltage that makes thyristor 182 operate as normal.
By the way, when the degree of depth a of above-mentioned P trap diffusion region 204 surpasses 1.3 times of degree of depth b of P-gate diffusion region 202, owing to must improve diffusion temperature and need long-time diffusion when forming P trap diffusion region 204, so do not carry out preferred.Therefore, the degree of depth a of P trap diffusion region 204 is preferably more than 1 times or 1 times of degree of depth b of P-gate diffusion region 202, and is below 1.3 times or 1.3 times.
(the 14 example)
Figure 24 (a) is another plane graph of the N type MOSFET 186 that plays the zero crossing function in the photo thyristor 182 of the bidirectional light controlled thyristor chip with zero crossing function 181 shown in Figure 180.In addition, Figure 24 (b) is the cross section of observing along the F-F ' direction among Figure 24 (a).The member identical with above-mentioned the 13 example given identical numbering.In this example, the area of the leakage diffusion region (N type) 210 that forms in the surface of the P trap diffusion region 204 of N type MOSFET 186 is less than the area of diffusion region, source (N type) 211.
And, form parasitic transistor 212 by above-mentioned leakage diffusion region 210 and P trap diffusion region 204 and N type silicon substrate 201, capacitive part by N type silicon substrate 201 forms the parasitic capacitance 213 that is connected with the collector electrode of parasitic transistor 212, forms the dead resistance (series resistance) 214 that is connected with the base stage of parasitic transistor 212 by the active component of P trap diffusion region 204.At this, parasitic capacitance 213 decisions flow into the size of the above-mentioned displacement electric current of parasitic transistor 212, and preferred capability value is as far as possible little, and reason is to reduce the value of above-mentioned displacement electric current.In addition, series resistance 214 decision will flow through parasitic transistor 212 above-mentioned displacement electric current, be diverted to the path that is connected with GND (by the path of P trap diffusion region 204, and the path of passing through P trap diffusion region 204 and diffusion region, source 211) ratio, preferred resistance value as far as possible little (the impurity concentration height of P trap diffusion region 204, short) to the distance of GND.
By the way, by the junction capacitance generation of above-mentioned N type silicon substrate 201 and P trap diffusion region 204 and the displacement electric current of inflow parasitic transistor 212, split into 3 paths as follows.
(a) path by the P trap diffusion region 204 that is connected with GND
(b) by the P trap diffusion region 204 that is connected with GND and the path of diffusion region, source 211
(c) by leaking the path of 210 arrival P-gate diffusion regions, diffusion region
And above-mentioned displacement electric current is diverted to the ratio in above-mentioned each path, by P trap diffusion region 204 and diffusion region, source 211 and the area that leaks diffusion region 210 when the resistance value of series resistance 214 decide.
In this example, reduce the emitter area of above-mentioned parasitic transistor 212, to reduce the collector current of parasitic transistor 212.Thus, as mentioned above, make the split ratio of diffusion region, source 211 (GND current potential) become big, just can easily flow to diffusion region, source 211 to above-mentioned displacement electric current.Its result has reduced the influence of the current amplification degree Hfe of parasitic transistor 212 to above-mentioned displacement electric current, and can improve the dosis tolerata of pulse noise.
(the 15 example)
Figure 25 (a) is another plane graph of the N type MOSFET 186 that plays the zero crossing function in the photo thyristor 182 of the bidirectional light controlled thyristor chip with zero crossing function 181 shown in Figure 180.Figure 25 (b) is the cross section of observing along the G-G ' direction among Figure 25 (a) in addition.The member identical with above-mentioned the 13 example given identical numbering.
In this example, as shown in figure 25, in the surface of P trap diffusion region 204, formation is by connecting that diffusion region 215c connects the end of 2 diffusion region 215a, 215b being arranged in parallel and the diffusion region, source (N type) 215 of plane [U] the word shape that constitutes, between 2 diffusion region 215a, 215b of diffusion region, source 215, form a leakage diffusion region (N type) 216 parallel with diffusion region 215a, 215b.Thus, just has the structure of surrounding leakage diffusion region 216 by diffusion region, source 215.And gate region 217 is formed by aluminium, simultaneously, is formed on the gap of Lou diffusion region 216 and diffusion region, source 215, so that make the edge of gate region 217 overlapping with the edge of leaking diffusion region 216 and diffusion region, source 215.And even in this example, also the situation with the 14 example is identical, and the area that makes diffusion region 216 Lou is less than the diffusion region 215a of diffusion region, source (N type) 215, the area of 215b.
Identical with the situation of the 14 example, just reduced the emitter area of the parasitic transistor 218 among the N type MOSFET186 according to this example, just can reduce the collector current of parasitic transistor 218.And with respect to the area that leaks diffusion region 216, the area of diffusion region, source 215 is bigger than the situation of above-mentioned the 14 example, and forms this anode diffusion region 215 so that surround leakage diffusion region 216.Therefore, compare, can improve the split ratio of diffusion region, source 215 (GND current potential) significantly to above-mentioned displacement electric current with the situation of above-mentioned the 14 example.Its result has further reduced the influence of the current amplification degree Hfe of parasitic transistor 218 to above-mentioned displacement electric current, can improve the dosis tolerata of pulse noise.In addition, for example,, can make the length of grid diffusion region 217 directions of extension in P trap diffusion region 204, be approximately 2 times of length of gate region 217 and diffusion region, source 215 with the identical situation of above-mentioned the 14 example.Therefore, if when the length of gate region 217 and diffusion region, source 215 is identical with above-mentioned the 14 example, the size that just can dwindle bidirectional light controlled thyristor chip 181.
(the 16 example)
Figure 26 (a) is another plane graph of the N type MOSFET 186 that plays the zero crossing function in the photo thyristor 182 of the bidirectional light controlled thyristor chip with zero crossing function 181 shown in Figure 180.Figure 26 (b) is the cross section of observing along the H-H ' direction among Figure 26 (a) in addition.The member identical with above-mentioned the 13 example given identical numbering.
In this example, as shown in figure 26, have and to be converted to the structure of P+ compensation diffusion region around the P trap diffusion region 204 in above-mentioned the 13 example.That is, in Figure 26, form the diffusion region, source 205 of N type MOSFET 186 at P trap diffusion region 211 inner surfaces.With respect to this, only being positioned at, the surface of the P trap diffusion region 221 of width L1 forms leakage diffusion region 206.And, around the P trap diffusion region 221 in the surface of N type silicon substrate 201, form the P+ compensation diffusion region 222 that connects GND.Thus, not with P trap diffusion region 221 overlapping areas of leaking in the diffusion region 206, surrounded by P+ compensation diffusion region 222.At this, the overlap length L1 that leaks diffusion region 206 and P+ diffusion region 222 is 10 μ m.In addition, the concentration of the p type impurity of P+ compensation diffusion region 222 is 1 * 10 19Cm -3And the concentration of the p type impurity of P trap diffusion region 222 is 5 * 10 16Cm -3In addition, grid region 217 is formed by aluminium.
As mentioned above, in this example, form P+ compensation diffusion region 222 in case with above-mentioned N type MOSFET 186 in P trap diffusion region 21 around be connected in, inside in P trap diffusion region 221 forms diffusion region, source 205, on the other hand, forming leakage diffusion region 206 contacts so that make its part and P+ compensate diffusion region 222.Therefore, just can leak the overlap length of diffusion region 206 and P trap diffusion region 221, that is, reduce to about 10 μ m to the distance L 1 that P+ compensates diffusion region 222, just the base region that constitutes parasitic transistor 223 can be narrowed down from the raceway groove end of N type NOSFET186.Its result just can reduce the collector current of parasitic transistor 223 significantly.
In addition, around above-mentioned P trap diffusion region 221, when forming the P+ be connected with P trap diffusion region 221 and compensate diffusion region 222, be connected with GND.Therefore, can reduce the resistance value of the series resistance 224 that is connected with the base stage of parasitic transistor 223.
Therefore, compare, can improve the ratio that is diverted to the above-mentioned displacement electric current that connects above-mentioned GND significantly with the situation of above-mentioned the 14 example.Its result can further reduce the influence of the current amplification degree Hfe of parasitic transistor 223 to above-mentioned displacement electric current, can improve the dosis tolerata of pulse noise.
And, the high more resistance value that just helps reducing series resistance 224 more of concentration of the p type impurity of above-mentioned P+ compensation diffusion region 222.But, because P+ compensation diffusion region 222 compensation (correction concentration) p type impurity concentration are 5 * 10 16Cm -3The surface concentration of P trap diffusion region 221, so its p type impurity concentration is necessary for 1 * 10 17Cm -3In addition, think reality the preferred p type impurity concentration 1 * 10 of manufacture method 19Cm -3About.
Above-mentioned overlap length, promptly from the raceway groove end of N type NOSFET 186 when the distance L 1 of P+ compensation diffusion region 222 surpasses 10 μ m, just the base region of formation parasitic transistor 223 can not be narrowed down, just can not obtain the effect of this example.In addition, when being in 0 μ m, can exert an influence to the raceway groove concentration (being the threshold voltage of N type MOSFET 186) of N type MOSFET 186.Therefore, above-mentioned overlap length L1 is necessary for 0 μ m or more than the 0 μ m, and is 10 μ m or below the 10 μ m.
(the 17 example)
Figure 27 (a) is another plane graph of the N type MOSFET 186 with zero crossing function in the photo thyristor 182 of the bidirectional light controlled thyristor chip with zero crossing function 181 shown in Figure 180.In addition, Figure 27 (b) is the cross section of observing along the I-I ' direction among Figure 27 (a).The member identical with above-mentioned the 13 example and the 15 example given identical numbering, and omits its detailed description.
N type MOSFET 186 has the structure of above-mentioned the 15 example of dual-purpose and the 16 example in this example.That is, in Figure 27, in 225 inner surfaces of P trap diffusion region, form and leak diffusion region 216.In addition, diffusion region, source 215, one side of the side of its diffusion region 215a and P trap diffusion region 225 is only formed by overlapping width L1, the another side of the side of its diffusion region 215b and P trap diffusion region 225 is only formed by overlapping width L1, forms to connect diffusion region 215c in the surface of P trap diffusion region 225.And, around the P trap diffusion region 225 in the surface of N type silicon substrate 201, form the P+ compensation diffusion region 226 that connects GND.Thus, surrounded by P+ compensation diffusion region 226, contact with P+ compensation diffusion region 226 simultaneously with 225 nonoverlapping zones, P trap diffusion region in the source diffusion region 215.
At this, in Figure 27 (a), the channel region of the N type MOSFET 186 that between source diffusion region 215 and drain diffusion regions 216, constitutes, by forming from the path that b orders that arrives on every side of a point around drain diffusion regions 216, its length is 600 μ m.In addition, the overlap length L1 of source diffusion region 215 and P trap diffusion region 225 is 10 μ m.In addition, the concentration of the p type impurity in the P+ compensation diffusion region 226 is 1 * 10 19Cm -3Have, the concentration of the p type impurity of P trap diffusion region 225 is 5 * 10 again 16Cm -3In addition, grid diffusion region 217 is formed by aluminium.
As mentioned above, identical according to this example with above-mentioned the 15 example, reduced the emitter area of parasitic transistor 227, just can reduce the collector current of parasitic transistor 227.And, increasing diffusion region, source 215 with respect to the area ratio that leaks diffusion region 216, form this anode diffusion region 215 simultaneously so that surround and leak diffusion region 216.Therefore, compare, just can improve the shunting ratio of diffusion region, source 215 (GND current potential) significantly to above-mentioned displacement electric current with the situation of above-mentioned the 14 example.In addition, identical with above-mentioned the 16 example, around above-mentioned P trap diffusion region 225, when forming the P+ be connected with P trap diffusion region 225 and compensate diffusion region 226, be connected with GND.Therefore, can reduce the resistance value of the series resistance 228 that is connected with the base stage of parasitic transistor 227.Its result can further reduce the influence of the current amplification degree Hfe of parasitic transistor 227 to above-mentioned displacement electric current, can improve the dosis tolerata of pulse noise.
And,, just guaranteed the channel width of 600 μ m by around drain diffusion regions 216, forming the diffusion region, source 215 of above-mentioned N type MOSFET186 with " U " word shape.Therefore, and compare with the situation that rectangle forms source diffusion region 211,, therefore just can reduce conducting resistance owing to, increased the width of channel region with respect to the area of identical N type MOSFET 186 by above-mentioned the 14 example.Its result, even apply under the situation of pulse type noise voltage between N type silicon substrate 201 and electrode T1, T2, N type MOSFET 186 also can work, and can further improve the dosis tolerata of pulse noise.For example, if enlarge dimension of picture shown in Figure 24 separately, just can reduce the conducting resistance of N type MOSFET 186.But, in the case, exist chip size to increase, and the size of leakage diffusion region increases the shortcoming of the current amplification degree Hfe increase of above-mentioned parasitic transistor.Thus, will be understood that the structure of the N type MOSFET 186 of this example is very effective.
In addition, in this example, though the width of the channel region of N type MOSFET 186 is 600 μ m,, as long as be the above effect that just can obtain to reduce conducting resistance of 300 μ m or 300 μ m.Though the upper limit of being not particularly limited,, limit by the chip size of the bidirectional light controlled thyristor of desired acquisition.
(the 18 example)
By the way, as mentioned above, as the distinctive problem of the bidirectional light controlled thyristor with zero crossing function, thereby cause the misoperation problem that when also having the current amplification degree Hfe (npn) that improves NPN transistor Q2, Q4 in order to obtain the high speed operation response anti-noise properties is reduced except making the displacement electric current flow into the parasitic transistor that forms at MOSFET 186,188.This example relates to the bidirectional light controlled thyristor chip with zero crossing function that can solve above-mentioned 2 problems.
Figure 28 is the pattern layout figure of simple structure in the bidirectional light controlled thyristor chip of this example of expression.In addition, Figure 29 is the cross section that the J-J ' direction among Figure 28 is observed.In addition, Figure 30 is the equivalent circuit diagram of the bidirectional light controlled thyristor chip of this example.
N type silicon substrate 231 in the bidirectional light controlled thyristor chip 251 of this example, P-gate diffusion region 233,233 ', cathode diffusion region 234,234 ' and gate resistance 235,235 ' with the bidirectional light controlled thyristor chip 31 of above-mentioned first example in N type silicon substrate 21, P-gate diffusion region 23,23 ', cathode diffusion region 24,24 ' reach gate resistance 25,25 ' shape difference, but have identical functions.
In addition, the photo thyristor 252 of each CH1 of transversely cutting and the photo thyristor 253 of CH2, will be from the P-gate diffusion region 43 of the CH1 side shown in Figure 4 above-mentioned second example to the P-gate diffusion region 43 of CH2 side ' on passivating structure, whole width across bidirectional light controlled thyristor chip 251 extends, thereby forms trench isolation regions 236.Therefore, across the whole width of bidirectional light controlled thyristor chip 251, form the oxygen-doped semi-insulating polysilicon film and the aluminium electrode of the above-mentioned phosphorus that mixed.And, the downside of the trench isolation regions 236 in the surface of N type silicon substrate 231, the Schottky barrier diode 237 that forms p type diffusion region 238 and 239 short circuits of N type diffusion region by aluminium electrode (not shown) and N type silicon substrate 231.Have again, in the sectional view of Figure 29, omitted the passivating structure that comprises trench isolation regions 236.
As shown in figure 29, the anode diffusion region 232,232 in this example ' identical with the situation of N type MOSFET 186 in above-mentioned the 17 example is made of P trap diffusion region 240 and P+ compensation diffusion region 241.At this moment, identical with above-mentioned the 13 example, the degree of depth c that makes P trap diffusion region 240 be P-gate diffusion region 233 ' 1.3 times of depth d.And, this anode diffusion region 232,232 ' the surface on, form have with above-mentioned the 17 example in the N type MOSFET 242,242 ' that uses of the zero crossing of MOSFET 186 same structures.Therefore, in the influence of current amplification degree Hfe in the parasitic transistor 244 that in being reduced in N type MOSFET 242, produces to above-mentioned displacement electric current, increase the channel width of N type MOSFET 242,242 ', just can reduce conducting resistance, can improve the dosis tolerata of above-mentioned pulse noise.Have again, 243,243 ' be the VP circuit that is connected with the gate region of N type MOSFET242,242 '.
By the way, as mentioned above, improve the current amplification degree Hfe (npn) (promptly improving photosensitivity) of above-mentioned NPN transistor Q2, Q4 and, just have the commutative relation of anti-noise properties and photosensitivity carrying out high speed operation when response, but having reduced anti-noise properties.Therefore, in order to make anti-noise properties and photosensitivity optimization (do not reduce photosensitivity and improve anti-noise properties), with influence most the NPN transistor Q2 of noise properties, the current amplification degree Hfe of Q4 (npn) is fixed on optimum value, in the current amplification degree Hfe (pnp) that reduces PNP transistor Q1, Q3, improve effectively gate resistance 253,253 ' resistance value.
Therefore, as described below in this example, just reduce the current amplification degree Hfe (pnp) of PNP transistor Q1, Q3.That is, in this example, across the whole width of bidirectional light controlled thyristor chip 251 to form short circuit diode 237.Therefore, the minority carriers in the N type silicon substrate 231 are that the p type diffusion region 238 that the hole is configured short circuit diode 237 absorbs, thereby have shortened the life-span in above-mentioned hole.Its result can reduce the current amplification degree Hfe (pnp) by PNP transistor Q1, the Q3 of anode diffusion region 232,232 ' and N type silicon substrate 231 and P-gate diffusion region 233,233 ' form.
In other words, according to this example, when will influencing the NPN transistor Q2 of noise properties, the current amplification degree Hfe of Q4 (npn) most and being set at the value that can obtain desirable anti-noise properties, can also keep as necessary photosensitivity of bidirectional light controlled thyristor and high speed operation with zero crossing function.And, in the influence of the current amplification degree Hfe that reduces at the parasitic transistor 244 that N type MOSFET 242 produces, reduce the conducting resistance of N type MOSFET 242 to above-mentioned displacement electric current, therefore can improve the dosis tolerata of pulse noise.
Can carry out peculiar way to solve the problem in the bidirectional light controlled thyristor with zero crossing function of above-mentioned the 13 example～the 18 example individually, undoubtedly, also can carry out above-mentioned peculiar way to solve the problem by making up aptly.
Have again, in above-mentioned the 13 example～the 18 example, the N type MOSFET 186 of the structure that is different from conventional N type MOSFET has been described.At this, so-called " conventional N type MOSFET " refers to that degree of depth e shown in Figure 31 pattern layout and Figure 32 cross section, P trap diffusion region 262 is more shallow than the degree of depth f of P-gate diffusion region 263, the area of diffusion region, source 264 and leak the roughly the same and diffusion region, source 264 of the area of diffusion region 265 and gate region 266 is linearities, does not form the N type MOSFET 261 of P+ compensation diffusion region around P trap diffusion region 262.But, if when having the trench isolation regions 267 of structure shown in above-mentioned first example～the 12 example, undoubtedly, also go for using Figure 31 and conventional N type MOSFET shown in Figure 32, for the category of the bidirectional light controlled thyristor chip that has the zero crossing function 181 shown in Figure 180.
Below, narration is at the bidirectional light controlled thyristor chip with zero crossing function 18 that uses the N type MOSFET 186 of structure shown in above-mentioned the 13 example～the 18 example and the evaluation of using the pulse noise that the SSR of the bidirectional light controlled thyristor chip with standard zero crossing function (not having above-mentioned trench isolation regions) of the conventional N type MOSFET of Figure 31 and structure shown in Figure 32 carries out.Figure 33 has represented to apply the pulse duration and the dosis tolerata (proof voltage) of pulse noise.Use pulse noise hookup shown in Figure 34 to carry out this evaluation.Among Figure 34,271 are to use any one in the bidirectional light controlled thyristor chip with zero crossing function of N type MOSFET of seven types of the totals of having added above-mentioned conventional N type MOSFET on the N type MOSFET 186 of structure shown in above-mentioned the 13 example～the 18 example, form light starting the arc coupler 273 with LED 272 combinations, under voltage 0V～4KV, change and apply the pulse noise of the noise width of 0.1 μ sec～1.0 μ sec gradients, obtain the maximum voltage value of operate as normal from pulse noise generator 274.Have, the alphabet among Figure 33 is represented example again, and " a～f " is corresponding to " the 13 example～the 18 example ".
In the table 2, show the pulse noise dosis tolerata (V) except that the noise width (μ sec) that relates to the bidirectional light controlled thyristor chip that uses above-mentioned each example and conventional N type MOSFET with zero crossing function.But the measurement boundary of the voltage of pulse noise is 4KV, in Figure 33, for the ease of watching curve chart, show surpass above-mentioned measurement boundary value by 4KV or the desired value more than the 4KV.
Table 2
Pulse duration a b c d e f Conventional
0.1 1650 2300 3200 2600 More than 4000 More than 4000 1000
0.2 1700 2600 3400 2800 More than 4000 More than 4000 1050
0.3 1750 2800 More than 4000 3100 More than 4000 More than 4000 1150
0.4 2000 3600 More than 4000 More than 4000 More than 4000 More than 4000 1200
0.5 2600 More than 4000 More than 4000 More than 4000 More than 4000 More than 4000 1200
0.6 3600 More than 4000 More than 4000 More than 4000 More than 4000 More than 4000 1400
0.7 More than 4000 More than 4000 More than 4000 More than 4000 More than 4000 More than 4000 1600
0.8 More than 4000 More than 4000 More than 4000 More than 4000 More than 4000 More than 4000 1700
0.9 More than 4000 More than 4000 More than 4000 More than 4000 More than 4000 More than 4000 1800
1.0 More than 4000 More than 4000 More than 4000 More than 4000 More than 4000 More than 4000 1850
According to Figure 33 and table 2, under the situation that pulse duration shortens, just reduced the pulse noise dosis tolerata, along with the growth of pulse duration, integrally improved the pulse noise dosis tolerata.Work response insufficient (failing to follow) with N type MOSFET of above-mentioned over-voltage protection function for pulse noise; this is because the width of the gate voltage of driving N type MOSFET also can shorten when shortening at pulse duration; and, improved the work response of N type MOSFET with the growth of pulse duration.
In addition, state in the use under the situation of the bidirectional light controlled thyristor chip with zero crossing function of conventional N type MOSFET, in whole noise width, reduce the pulse noise dosis tolerata, its maximum is 1850V.With respect to this, state in the use under the situation of the bidirectional light controlled thyristor chip of the N type MOSFET 186 of structure shown in the 13 example～above-mentioned the 18 example with zero crossing function, the degree that tells on according to architectural difference according to N type MOSFET, improved the pulse noise dosis tolerata with regard to integral body, even under the situation that pulse duration shortens, also can present than higher pulse noise dosis tolerata under the situation of using above-mentioned conventional N type MOSFET.The most important thing is, under the situation of above-mentioned the 17 example and the 18 example,, therefore we can say and improved its effect widely owing to use the N type MOSFET of combination the 13 example～the 16 example structure.
Should be understood that top although clear example of the present invention, but also can carry out various changes it.It will be apparent to those skilled in the art that this change can not break away from aim of the present invention and scope and all is included in the scope of following appended claim.

Claims (78)

1, a kind of bidirectional light controlled thyristor chip is characterized in that, as a kind of semiconductor chip, comprising:
The substrate of first conduction type; And
A pair of photo thyristor part, it is arranged on the substrate surface of above-mentioned first conduction type, contain second diffusion layer of first diffusion layer of second conduction type, above-mentioned second conduction type, the 3rd diffusion layer of above-mentioned first conduction type that in this second diffusion layer, forms simultaneously
A photo thyristor among the wherein above-mentioned a pair of photo thyristor part partly is configured in a side of above-mentioned semiconductor chip, and on the other hand, another photo thyristor partly is configured in the opposite side of above-mentioned semiconductor chip;
Above-mentioned first diffusion layer that constitutes above-mentioned photo thyristor part is opposed with above-mentioned second diffusion layer and the 3rd diffusion layer phase that constitute above-mentioned another photo thyristor part;
Above-mentioned first diffusion layer that constitutes above-mentioned another photo thyristor part is opposed with above-mentioned second diffusion layer and the 3rd diffusion layer phase that constitute above-mentioned photo thyristor part;
2 raceway grooves that produce between above-mentioned a pair of photo thyristor part do not intersect and parallel to each other mutually,
Be included on the above-mentioned substrate to form between 2 above-mentioned second diffusion layers that constitute above-mentioned a pair of photo thyristor part and move the inhibition zone to suppress the charge carrier that charge carrier moves.
2, bidirectional light controlled thyristor chip according to claim 1 is characterized in that,
Wherein above-mentioned charge carrier moves the oxygen-doped semi-insulating polysilicon film that the phosphorus that mixed is contained in the inhibition zone;
The oxygen-doped semi-insulating polysilicon film of the above-mentioned phosphorus that mixed is electrically connected with above-mentioned substrate by the aluminium electrode.
3, bidirectional light controlled thyristor chip according to claim 2 is characterized in that,
Wherein above-mentioned charge carrier moves the inhibition zone and also contain the charge carrier absorption diode that forms on the surface of above-mentioned substrate.
4, bidirectional light controlled thyristor chip according to claim 3 is characterized in that,
Wherein above-mentioned charge carrier absorbs with diode and has the also little external diameter of external diameter than the oxygen-doped semi-insulating polysilicon film of the above-mentioned phosphorus that mixed, and the side relative with above-mentioned substrate side is electrically connected with above-mentioned substrate by above-mentioned aluminium electrode.
5, bidirectional light controlled thyristor chip according to claim 1 is characterized in that,
Wherein first electrode that is electrically connected with above-mentioned first diffusion layer and above-mentioned charge carrier interval of moving the inhibition zone and second electrode that is electrically connected with above-mentioned the 3rd diffusion layer and above-mentioned charge carrier move among the interval of inhibition zone, and any one narrow interval is at least 30 μ m.
6, bidirectional light controlled thyristor chip according to claim 2 is characterized in that,
Wherein between above-mentioned 2 raceway grooves, form above-mentioned charge carrier and move the inhibition zone, so that it does not intersect with each raceway groove.
7, bidirectional light controlled thyristor chip according to claim 2 is characterized in that,
Wherein above-mentioned charge carrier moves the inhibition zone and intersects respectively with above-mentioned 2 raceway grooves.
8, bidirectional light controlled thyristor chip according to claim 7 is characterized in that,
Wherein first electrode that is electrically connected with above-mentioned first diffusion layer and above-mentioned charge carrier interval of moving the inhibition zone and second electrode that is electrically connected with above-mentioned the 3rd diffusion layer and above-mentioned charge carrier move among the interval of inhibition zone, and any one narrow interval is at least 30 μ m.
9, bidirectional light controlled thyristor chip according to claim 3 is characterized in that,
Wherein above-mentioned charge carrier moves the inhibition zone and intersects respectively with above-mentioned 2 raceway grooves.
10, bidirectional light controlled thyristor chip according to claim 9 is characterized in that,
Wherein first electrode that is electrically connected with above-mentioned first diffusion layer and above-mentioned charge carrier interval of moving the inhibition zone and second electrode that is electrically connected with above-mentioned the 3rd diffusion layer and above-mentioned charge carrier move among the interval of inhibition zone, and any one narrow interval is at least 30 μ m.
11, bidirectional light controlled thyristor chip according to claim 9 is characterized in that,
Wherein above-mentioned charge carrier absorbs with diode and has the also little external diameter of external diameter than the oxygen-doped semi-insulating polysilicon film of the above-mentioned phosphorus that mixed, and the side relative with above-mentioned substrate side is electrically connected with above-mentioned substrate by above-mentioned aluminium electrode.
12, bidirectional light controlled thyristor chip according to claim 1 is characterized in that,
Wherein on above-mentioned substrate; for each above-mentioned paired photo thyristor part, near the joint portion that comprises above-mentioned first diffusion layer and above-mentioned substrate and near the joint portion of above-mentioned second diffusion layer and above-mentioned substrate, also surrounding and form the transparency protected ring that the oxygen-doped semi-insulating polysilicon film by the phosphorus that mixed constitutes in the annular section of first diffusion layer and second diffusion layer simultaneously.
13, bidirectional light controlled thyristor chip according to claim 1 is characterized in that,
Wherein also be included in the Schottky barrier diode that forms between second diffusion layer that constitutes above-mentioned each photo thyristor part and the substrate.
14, bidirectional light controlled thyristor chip according to claim 1 is characterized in that,
Wherein above-mentioned first conduction type is any one of N type and P type;
Above-mentioned second conduction type is the another kind of N type and P type;
In above-mentioned each photo thyristor part, gate resistance and switch element are connected in parallel between by the base stage of above-mentioned the 3rd diffusion layer and second diffusion layer and substrate or the NPN transistor that is made of above-mentioned first diffusion layer and substrate and second diffusion layer and emitter electrode;
The control terminal of above-mentioned switch element is connected on the transistorized base stage of PNP that constitutes by above-mentioned the 3rd diffusion layer and second diffusion layer and substrate or by above-mentioned first diffusion layer and substrate and second diffusion layer.
15, bidirectional light controlled thyristor chip according to claim 14 is characterized in that,
Wherein above-mentioned switch element is the metal oxide film semiconductor field effect transistor,
Above-mentioned metal oxide film semiconductor field effect transistor is formed in the trap of above-mentioned second conduction type that forms on the surface of above-mentioned substrate, and the diffusion depth of above-mentioned trap surpasses the diffusion depth of above-mentioned second diffusion layer.
16, bidirectional light controlled thyristor chip according to claim 15 is characterized in that,
Wherein the diffusion depth of above-mentioned trap is that the diffusion depth of above-mentioned second diffusion layer is more than 1 times or 1 times and be below 1.3 times or 1.3 times.
17, bidirectional light controlled thyristor chip according to claim 14 is characterized in that,
Wherein above-mentioned switch element is the metal oxide film semiconductor field effect transistor;
Above-mentioned metal oxide film semiconductor field effect transistor is formed in the trap of above-mentioned second conduction type that forms on the surface of above-mentioned substrate;
The area of the leakage diffusion region that forms in the above-mentioned trap in above-mentioned metal oxide film semiconductor field effect transistor is littler than the area of the diffusion region, source that forms in above-mentioned trap.
18, bidirectional light controlled thyristor chip according to claim 17 is characterized in that,
Wherein above-mentioned leakage diffusion region is formed on above-mentioned trap inner surface side,
Diffusion region, above-mentioned source surrounds around the above-mentioned leakage diffusion region and is formed on above-mentioned trap inner surface side.
19, bidirectional light controlled thyristor chip according to claim 14 is characterized in that,
Wherein above-mentioned switch element is the metal oxide film semiconductor field effect transistor;
At least a portion in the above-mentioned metal oxide film semiconductor field effect transistor is formed in the trap of above-mentioned second conduction type that the surface of above-mentioned substrate forms;
Around the above-mentioned trap in the surface of above-mentioned substrate, form, have high concentration compensation diffusion layer simultaneously than second conduction type of the diffusion of impurities concentration of the diffusion of impurities concentration higher concentration in the above-mentioned trap with above-mentioned trap next-door neighbour;
In the above-mentioned metal oxide film semiconductor field effect transistor, the zone that is not formed in the above-mentioned trap is formed in the above-mentioned high concentration compensation diffusion layer.
20, bidirectional light controlled thyristor chip according to claim 19 is characterized in that,
Impurity concentration in the wherein above-mentioned high concentration compensation diffusion layer is 1 * 10 17Cm -3Or 1 * 10 17Cm -3More than.
21, bidirectional light controlled thyristor chip according to claim 19 is characterized in that,
Wherein in above-mentioned trap, form the diffusion region, source in the above-mentioned metal oxide film semiconductor field effect transistor,
A side relative with diffusion region, above-mentioned source, the leakage diffusion region in above-mentioned trap in the above-mentioned metal oxide film semiconductor field effect transistor of formation on the other hand, form remaining zone in above-mentioned high concentration compensation diffusion layer.
22, bidirectional light controlled thyristor chip according to claim 19 is characterized in that,
Wherein in above-mentioned trap, form the leakage diffusion region in the above-mentioned metal oxide film semiconductor field effect transistor,
A side relative with above-mentioned leakage diffusion region, the diffusion region, source in above-mentioned trap in the above-mentioned metal oxide film semiconductor field effect transistor of formation on the other hand, form remaining zone in above-mentioned high concentration compensation diffusion layer.
23, bidirectional light controlled thyristor chip according to claim 21 is characterized in that,
The length of the channel direction that the above-mentioned side in above-mentioned leakage diffusion region or diffusion region, source that wherein forms in above-mentioned trap is extended is 0 μ m or more than the 0 μ m and be 10 μ m or below the 10 μ m.
24, bidirectional light controlled thyristor chip according to claim 22 is characterized in that, wherein,
The length of the channel direction that the above-mentioned side in above-mentioned leakage diffusion region or diffusion region, source that forms in above-mentioned trap is extended is 0 μ m or more than the 0 μ m and be 10 μ m or below the 10 μ m.
25, bidirectional light controlled thyristor chip according to claim 15 is characterized in that,
Channel width in the wherein above-mentioned metal oxide film semiconductor field effect transistor is 300 μ m or more than the 300 μ m.
26, bidirectional light controlled thyristor chip according to claim 17 is characterized in that,
Channel width in the wherein above-mentioned metal oxide film semiconductor field effect transistor is 300 μ m or more than the 300 μ m.
27, bidirectional light controlled thyristor chip according to claim 19 is characterized in that,
Channel width in the wherein above-mentioned metal oxide film semiconductor field effect transistor is 300 μ m or more than the 300 μ m.
28, bidirectional light controlled thyristor chip according to claim 15 is characterized in that,
Wherein in the surface of above-mentioned substrate, form the charge carrier absorption diode that forms with above-mentioned 2 raceway groove interleaved modes.
29, bidirectional light controlled thyristor chip according to claim 17 is characterized in that,
Wherein in the surface of above-mentioned substrate, form the charge carrier absorption diode that forms with above-mentioned 2 raceway groove interleaved modes.
30, bidirectional light controlled thyristor chip according to claim 19 is characterized in that,
Wherein in the surface of above-mentioned substrate, form the charge carrier absorption diode that forms with above-mentioned 2 raceway groove interleaved modes.
31, a kind of smooth starting the arc coupler is characterized in that,
Constitute by described bidirectional light controlled thyristor chip of claim 1 and light-emitting diode.
32, a kind of solid state relay is characterized in that,
Constitute by described smooth starting the arc coupler of claim 31 and buffering circuit.
33, a kind of bidirectional light controlled thyristor chip is characterized in that, as a semiconductor chip, comprising:
The substrate of first conduction type;
A pair of photo thyristor part, it is arranged on the substrate surface of above-mentioned first conduction type, contain second diffusion layer of first diffusion layer of second conduction type, above-mentioned second conduction type, the 3rd diffusion layer of above-mentioned first conduction type that in this second diffusion layer, forms simultaneously
A photo thyristor in the wherein above-mentioned a pair of photo thyristor part partly is configured in a side of above-mentioned semiconductor chip, and on the other hand, another photo thyristor partly is configured in the opposite side of above-mentioned semiconductor chip;
Constitute above-mentioned first diffusion layer of above-mentioned photo thyristor part, opposed with above-mentioned second diffusion layer and the 3rd diffusion layer phase that constitute above-mentioned another photo thyristor part;
Constitute above-mentioned first diffusion layer of above-mentioned another photo thyristor part, opposed with above-mentioned second diffusion layer and the 3rd diffusion layer phase that constitute above-mentioned photo thyristor part;
2 raceway grooves that produce between above-mentioned a pair of photo thyristor part do not intersect and parallel to each other mutually,
Be included on the above-mentioned substrate and with the joint portion of 2 above-mentioned first diffusion layers that constitute above-mentioned a pair of photo thyristor part and above-mentioned substrate near, and with the joint portion of 2 above-mentioned second diffusion layers that constitute above-mentioned a pair of photo thyristor part and above-mentioned substrate near, intersect to form with the oxygen-doped semi-insulating polysilicon film of phosphorus that suppressed doping that charge carrier moves with above-mentioned raceway groove.
34, bidirectional light controlled thyristor chip according to claim 33 is characterized in that,
Comprising the aluminium guard ring that between above-mentioned paired 2 photo thyristors parts, intersects respectively and form and be electrically connected by aluminium with above-mentioned substrate with above-mentioned 2 raceway grooves,
The oxygen-doped semi-insulating polysilicon film of above-mentioned each phosphorus that mixed and the interval of above-mentioned aluminium guard ring are at least 30 μ m.
35, bidirectional light controlled thyristor chip according to claim 33 is characterized in that,
Wherein above-mentioned paired photo thyristor part on the above-mentioned substrate, for each, comprising near the joint portion of above-mentioned first diffusion layer and above-mentioned substrate and the joint portion of above-mentioned second diffusion layer and above-mentioned substrate near, also surrounding and forming the transparency protected ring that the oxygen-doped semi-insulating polysilicon film by the phosphorus that mixed constitutes in the annular section of first diffusion layer and second diffusion layer simultaneously.
36, bidirectional light controlled thyristor chip according to claim 33 is characterized in that,
Comprising the Schottky barrier diode that between second diffusion layer that constitutes above-mentioned each photo thyristor part and substrate, forms.
37, bidirectional light controlled thyristor chip according to claim 33 is characterized in that,
Wherein above-mentioned first conduction type is any one of N type and P type;
Above-mentioned second conduction type is the another kind of N type and P type;
In above-mentioned each photo thyristor part, gate resistance and switch element are connected in parallel between by the base stage of above-mentioned the 3rd diffusion layer and second diffusion layer and substrate or the NPN transistor that is made of above-mentioned first diffusion layer and substrate and second diffusion layer and emitter electrode;
The control terminal of above-mentioned switch element is connected by above-mentioned the 3rd diffusion layer and second diffusion layer and substrate or the transistorized base stage of PNP that is made of above-mentioned first diffusion layer and substrate and second diffusion layer.
38, according to the described bidirectional light controlled thyristor chip of claim 37, it is characterized in that,
Wherein above-mentioned switch element is the metal oxide film semiconductor field effect transistor,
Above-mentioned metal oxide film semiconductor field effect transistor is formed in the trap of above-mentioned second conduction type that forms on the surface of above-mentioned substrate,
The diffusion depth of above-mentioned trap surpasses the diffusion depth of above-mentioned second diffusion layer.
39, according to the described bidirectional light controlled thyristor chip of claim 38, it is characterized in that,
Wherein the diffusion depth of above-mentioned trap is that the diffusion depth of above-mentioned second diffusion layer is more than 1 times or 1 times and be below 1.3 times or 1.3 times.
40, according to the described bidirectional light controlled thyristor chip of claim 37, it is characterized in that,
Wherein above-mentioned switch element is the metal oxide film semiconductor field effect transistor,
Above-mentioned metal oxide film semiconductor field effect transistor is formed in the trap of above-mentioned second conduction type that forms on the surface of above-mentioned substrate,
The area of the leakage diffusion region that forms in the above-mentioned trap in above-mentioned metal oxide film semiconductor field effect transistor is littler than the area of the diffusion region, source that forms in above-mentioned trap.
41, according to the described bidirectional light controlled thyristor chip of claim 40, it is characterized in that,
Wherein above-mentioned leakage diffusion region is formed on above-mentioned trap inner surface side,
Diffusion region, above-mentioned source surround above-mentioned leakage diffusion region around and be formed on above-mentioned trap inner surface side.
42, according to the described bidirectional light controlled thyristor chip of claim 37, it is characterized in that,
Wherein above-mentioned switch element is the metal oxide film semiconductor field effect transistor,
At least a portion in the above-mentioned metal oxide film semiconductor field effect transistor is formed in the trap of above-mentioned second conduction type that the surface of above-mentioned substrate forms,
Form around the above-mentioned trap in the surface of above-mentioned substrate and above-mentioned trap next-door neighbour, have a high concentration compensation diffusion layer simultaneously than second conduction type of the diffusion of impurities concentration of the diffusion of impurities concentration higher concentration in the above-mentioned trap,
In the above-mentioned metal oxide film semiconductor field effect transistor, the zone that is not formed in the above-mentioned trap is formed in the above-mentioned high concentration compensation diffusion layer.
43, according to the described bidirectional light controlled thyristor chip of claim 42, it is characterized in that,
Impurity concentration in the wherein above-mentioned high concentration compensation diffusion layer is 1 * 10 17Cm -3Or 1 * 10 17Cm -3More than.
44, according to the described bidirectional light controlled thyristor chip of claim 42, it is characterized in that,
Wherein in above-mentioned trap, form the diffusion region, source in the above-mentioned metal oxide film semiconductor field effect transistor,
A side relative with diffusion region, above-mentioned source, the leakage diffusion region in above-mentioned trap in the above-mentioned metal oxide film semiconductor field effect transistor of formation on the other hand, form remaining zone in above-mentioned high concentration compensation diffusion layer.
45, according to the described bidirectional light controlled thyristor chip of claim 42, it is characterized in that,
Wherein in above-mentioned trap, form the leakage diffusion region in the above-mentioned metal oxide film semiconductor field effect transistor,
A side relative with above-mentioned leakage diffusion region, the diffusion region, source in above-mentioned trap in the above-mentioned metal oxide film semiconductor field effect transistor of formation on the other hand, form remaining zone in above-mentioned high concentration compensation diffusion layer.
46, according to the described bidirectional light controlled thyristor chip of claim 44, it is characterized in that,
The length of the channel direction that the above-mentioned side in above-mentioned leakage diffusion region or diffusion region, source that wherein forms in above-mentioned trap is extended is 0 μ m or more than the 0 μ m and be 10 μ m or below the 10 μ m.
47, according to the described bidirectional light controlled thyristor chip of claim 45, it is characterized in that,
The length of the channel direction that the above-mentioned side in above-mentioned leakage diffusion region or diffusion region, source that wherein forms in above-mentioned trap is extended is 0 μ m or more than the 0 μ m and be 10 μ m or below the 10 μ m.
48, according to the described bidirectional light controlled thyristor chip of claim 38, it is characterized in that,
Channel width in the wherein above-mentioned metal oxide film semiconductor field effect transistor is 300 μ m or more than the 300 μ m.
49, according to the described bidirectional light controlled thyristor chip of claim 40, it is characterized in that,
Channel width in the wherein above-mentioned metal oxide film semiconductor field effect transistor is 300 μ m or more than the 300 μ m.
50, according to the described bidirectional light controlled thyristor chip of claim 41, it is characterized in that,
Channel width in the wherein above-mentioned metal oxide film semiconductor field effect transistor is 300 μ m or more than the 300 μ m.
51, according to the described bidirectional light controlled thyristor chip of claim 38, it is characterized in that,
Wherein in the surface of above-mentioned substrate, form the charge carrier absorption diode that forms with above-mentioned 2 raceway groove interleaved modes.
52, according to the described bidirectional light controlled thyristor chip of claim 40, it is characterized in that,
Wherein in the surface of above-mentioned substrate, form the charge carrier absorption diode that forms with above-mentioned 2 raceway groove interleaved modes.
53, according to the described bidirectional light controlled thyristor chip of claim 42, it is characterized in that,
Wherein in the surface of above-mentioned substrate, form the charge carrier absorption diode that forms with above-mentioned 2 raceway groove interleaved modes.
54, a kind of smooth starting the arc coupler is characterized in that,
Constitute by described bidirectional light controlled thyristor chip of claim 33 and light-emitting diode.
55, a kind of solid state relay is characterized in that,
Constitute by described smooth starting the arc coupler of claim 54 and buffering circuit.
56, a kind of bidirectional light controlled thyristor chip is characterized in that, as a semiconductor chip, comprising:
The substrate of first conduction type;
A pair of photo thyristor part, it is arranged on the surface of substrate of above-mentioned first conduction type, contain second diffusion layer of first diffusion layer of second conduction type, above-mentioned second conduction type, the 3rd diffusion layer of above-mentioned first conduction type that in this second diffusion layer, forms simultaneously
A photo thyristor in the wherein above-mentioned a pair of photo thyristor part partly is configured in a side of above-mentioned semiconductor chip, and on the other hand, another photo thyristor partly is configured in the opposite side of above-mentioned semiconductor chip;
Above-mentioned first diffusion layer that constitutes above-mentioned photo thyristor part is opposed with above-mentioned second diffusion layer and the 3rd diffusion layer phase that constitute above-mentioned another photo thyristor part;
Constitute above-mentioned first diffusion layer of above-mentioned another photo thyristor part, opposed with above-mentioned second diffusion layer and the 3rd diffusion layer phase that constitute above-mentioned photo thyristor part;
2 raceway grooves that produce between above-mentioned a pair of photo thyristor part do not intersect and parallel to each other mutually,
Comprise between 2 above-mentioned second diffusion layers of the above-mentioned a pair of photo thyristor part that is formed on the above-mentioned substrate and form between above-mentioned 2 raceway grooves, not intersecting respectively near the joint portion of above-mentioned 2 second diffusion layers and above-mentioned substrate with the oxygen-doped semi-insulating polysilicon film of phosphorus that suppressed doping that charge carrier moves with each raceway groove.
57, according to the described bidirectional light controlled thyristor chip of claim 56, it is characterized in that,
Wherein among the interval of the oxygen-doped semi-insulating polysilicon film of the interval of the oxygen-doped semi-insulating polysilicon film of first electrode that is electrically connected with above-mentioned first diffusion layer and the above-mentioned phosphorus that mixed and second electrode that is electrically connected with above-mentioned the 3rd diffusion layer and the above-mentioned phosphorus that mixed, any one narrow interval is at least 30 μ m
Space in the oxygen-doped semi-insulating polysilicon film of above-mentioned 2 phosphorus that mixed is at least 30 μ m.
58, according to the described bidirectional light controlled thyristor chip of claim 56, it is characterized in that,
Also surrounding wherein near above-mentioned paired photo thyristor part on the above-mentioned substrate, for each is comprising the joint portion of above-mentioned first diffusion layer and above-mentioned substrate and near the joint portion of above-mentioned second diffusion layer and above-mentioned substrate, simultaneously and forming the transparency protected ring that the oxygen-doped semi-insulating polysilicon film by the phosphorus that mixed constitutes in the annular section of first diffusion layer and second diffusion layer.
59, according to the described bidirectional light controlled thyristor chip of claim 56, it is characterized in that,
Comprising the Schottky barrier diode that between second diffusion layer that constitutes above-mentioned each photo thyristor part and substrate, forms.
60, according to the described bidirectional light controlled thyristor chip of claim 56, it is characterized in that,
Wherein above-mentioned first conduction type is any one of N type and P type;
Above-mentioned second conduction type is the another kind of N type and P type;
In above-mentioned each photo thyristor part, gate resistance and switch element are connected in parallel between by the base stage of above-mentioned the 3rd diffusion layer and second diffusion layer and substrate or the NPN transistor that is made of above-mentioned first diffusion layer and substrate and second diffusion layer and emitter electrode;
The control terminal of above-mentioned switch element is connected by above-mentioned the 3rd diffusion layer and second diffusion layer and substrate or the transistorized base stage of PNP that is made of above-mentioned first diffusion layer and substrate and second diffusion layer.
61, according to the described bidirectional light controlled thyristor chip of claim 60, it is characterized in that,
Wherein above-mentioned switch element is the metal oxide film semiconductor field effect transistor,
Above-mentioned metal oxide film semiconductor field effect transistor is formed in the trap of above-mentioned second conduction type that forms on the surface of above-mentioned substrate, and the diffusion depth of above-mentioned trap surpasses the diffusion depth of above-mentioned second diffusion layer.
62, according to the described bidirectional light controlled thyristor chip of claim 61, it is characterized in that,
Wherein the diffusion depth of above-mentioned trap is that the diffusion depth of above-mentioned second diffusion layer is more than 1 times or 1 times and be below 1.3 times or 1.3 times.
63, according to the described bidirectional light controlled thyristor chip of claim 60, it is characterized in that,
Wherein above-mentioned switch element is the metal oxide film semiconductor field effect transistor,
Above-mentioned metal oxide film semiconductor field effect transistor is formed in the trap of above-mentioned second conduction type that forms on the surface of above-mentioned substrate,
The area of the leakage diffusion region that forms in the above-mentioned trap in above-mentioned metal oxide film semiconductor field effect transistor is littler than the area of the diffusion region, source that forms in above-mentioned trap.
64, according to the described bidirectional light controlled thyristor chip of claim 63, it is characterized in that,
Wherein form above-mentioned leakage diffusion region in above-mentioned trap inner surface side,
Diffusion region, above-mentioned source surround above-mentioned leakage diffusion region around and be formed on above-mentioned trap inner surface side.
65, according to the described bidirectional light controlled thyristor chip of claim 60, it is characterized in that,
Wherein above-mentioned switch element is the metal oxide film semiconductor field effect transistor,
At least a portion in the above-mentioned metal oxide film semiconductor field effect transistor is formed in the trap of above-mentioned second conduction type that the surface of above-mentioned substrate forms,
Form around the above-mentioned trap in the surface of above-mentioned substrate and above-mentioned trap next-door neighbour, have a high concentration compensation diffusion layer simultaneously than second conduction type of the diffusion of impurities concentration of the diffusion of impurities concentration higher concentration in the above-mentioned trap,
In the above-mentioned metal oxide film semiconductor field effect transistor, inchoate zone is formed in the above-mentioned high concentration compensation diffusion layer in above-mentioned trap.
66, according to the described bidirectional light controlled thyristor chip of claim 65, it is characterized in that,
Impurity concentration in the wherein above-mentioned high concentration compensation diffusion layer is 1 * 10 17Cm -3Or 1 * 10 17Cm -3More than.
67, according to the described bidirectional light controlled thyristor chip of claim 65, it is characterized in that,
Wherein in above-mentioned trap, form the diffusion region, source in the above-mentioned metal oxide film semiconductor field effect transistor,
A side relative with diffusion region, above-mentioned source, the leakage diffusion region in above-mentioned trap in the above-mentioned metal oxide film semiconductor field effect transistor of formation on the other hand, form remaining zone in above-mentioned high concentration compensation diffusion layer.
68, according to the described bidirectional light controlled thyristor chip of claim 65, it is characterized in that,
Wherein in above-mentioned trap, form the leakage diffusion region in the above-mentioned metal oxide film semiconductor field effect transistor,
A side relative with above-mentioned leakage diffusion region, the diffusion region, source in above-mentioned trap in the above-mentioned metal oxide film semiconductor field effect transistor of formation on the other hand, form remaining zone in above-mentioned high concentration compensation diffusion layer.
69, according to the described bidirectional light controlled thyristor chip of claim 67, it is characterized in that,
The length of the channel direction that the above-mentioned side in above-mentioned leakage diffusion region or diffusion region, source that wherein forms in above-mentioned trap is extended is 0 μ m or more than the 0 μ m and be 10 μ m or below the 10 μ m.
70, according to the described bidirectional light controlled thyristor chip of claim 68, it is characterized in that,
The length of the channel direction that the above-mentioned side in above-mentioned leakage diffusion region or diffusion region, source that wherein forms in above-mentioned trap is extended is 0 μ m or more than the 0 μ m and be 10 μ m or below the 10 μ m.
71, according to the described bidirectional light controlled thyristor chip of claim 61, it is characterized in that,
Channel width in the wherein above-mentioned metal oxide film semiconductor field effect transistor is 300 μ m or more than the 300 μ m.
72, according to the described bidirectional light controlled thyristor chip of claim 63, it is characterized in that,
Channel width in the wherein above-mentioned metal oxide film semiconductor field effect transistor is 300 μ m or more than the 300 μ m.
73, according to the described bidirectional light controlled thyristor chip of claim 64, it is characterized in that,
Channel width in the wherein above-mentioned metal oxide film semiconductor field effect transistor is 300 μ m or more than the 300 μ m.
74, according to the described bidirectional light controlled thyristor chip of claim 61, it is characterized in that,
Wherein in the surface of above-mentioned substrate, form the charge carrier absorption diode that forms with above-mentioned 2 raceway groove interleaved modes.
75, according to the described bidirectional light controlled thyristor chip of claim 63, it is characterized in that,
Wherein in the surface of above-mentioned substrate, form the charge carrier absorption diode that forms with above-mentioned 2 raceway groove interleaved modes.
76, according to the described bidirectional light controlled thyristor chip of claim 65, it is characterized in that,
Wherein in the surface of above-mentioned substrate, form the charge carrier absorption diode that forms with above-mentioned 2 raceway groove interleaved modes.
77, a kind of smooth starting the arc coupler is characterized in that,
Constitute by described bidirectional light controlled thyristor chip of claim 56 and light-emitting diode.
78, a kind of solid state relay is characterized in that,
Constitute by described smooth starting the arc coupler of claim 77 and buffering circuit.
CNB2005100788631A 2004-03-17 2005-03-17 Bidirectional photocontrol crystalbrake tube chip, photoarcing coupler and solid relay Expired - Fee Related CN100440511C (en)

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JP2004075900A JP2005268377A (en) 2004-03-17 2004-03-17 Bidirectional photo-thyristor chip, optical ignition coupler, and solid-state relay
JP2004075900 2004-03-17
JP2005040675 2005-02-17

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JP6089000B2 (en) * 2014-05-12 2017-03-01 シャープ株式会社 Bidirectional photothyristor chip and solid state relay
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US9923051B1 (en) * 2016-09-21 2018-03-20 Xilinx, Inc. Substrate noise isolation structures for semiconductor devices
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