JP2005268377A - Bidirectional photo-thyristor chip, optical ignition coupler, and solid-state relay - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a bidirectional photo-thyristor chip capable of improving optical sensitivity, commutation property having a trade-off relationship therewith and critical OFF voltage increase rate dv/dt property. <P>SOLUTION: Two operating channels CH1, CH2 of a bidirectional photo-thyristor chip 31 are disposed separately from each other so as not to cross each other. A channel separation area 29 composed of an oxygen dope semi-insulating multicrystal silicon film 35a wherein phosphorous is doped, is formed between a left-side p gate diffusion area 23 and a right-side p gate diffusion area 23' on an n-type silicon substrate, and between the CH1 and the CH2. Therefore, a silicon interface level (Qss) near the channel separation area 29 on a front surface of the n-type silicon substrate increases, and holes that are a minority carriers inside the n-type silicon substrate are extinguished in the area. As a result, a commutation failure can be prevented that the CH2 is turned on although there is no light incidence if a voltage of an inverse phase is applied to the side of the CH2 when the CH1 is turned off, so that commutation property can be improved. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a bidirectional photothyristor chip, an ignition coupler using the chip, and a solid state relay (hereinafter abbreviated as SSR) using the ignition coupler.

  Conventionally, there is a bidirectional photothyristor having a structure as shown in FIGS. 23 is a plan view, FIG. 24 is a cross-sectional view taken along the line AA ′ in FIG. 23, and FIG. 25 is an equivalent circuit diagram. The bidirectional photothyristor 4 is composed of, for example, a CH (channel) 1 photothyristor and a CH2 photothyristor formed on an N-type silicon substrate 1. Such a bi-directional thyristor 4 is widely used for an optical ignition coupler that controls on / off of an SSR by applying a gate trigger signal by light irradiation.

  5, 5 'is an anode diffusion region (P type), 6, 6' is a P gate diffusion region (P type), 7, 7 'is a cathode diffusion region (N type), 8, 8' is a gate resistance, 9, 9 'are Al electrodes, and 10 is an Al wiring. The electrode T 2 is formed immediately above the Al electrode 9 and is connected to the anode diffusion region 5 and the cathode diffusion region 7 via the Al electrode 9. Similarly, the electrode T1 is formed immediately above the Al electrode 9 ′ and is connected to the anode diffusion region 5 ′ and the cathode diffusion region 7 ′ via the Al electrode 9 ′. A PNPN portion constituting the CH1 photothyristor 2 in FIG. 25 is formed from the anode diffusion region 5 ′ on the right side to the cathode diffusion region 7 on the left side in the drawing. Further, a PNPN portion constituting the CH2 photothyristor 3 is formed from the anode diffusion region 5 on the left side to the cathode diffusion region 7 'on the right side in the drawing.

FIG. 24 is a cross-sectional view of the N-type silicon substrate 1 showing a passivation structure in the bidirectional photothyristor. A SiO ₂ film 15 is formed from the cathode diffusion region 7 on the left side of the Al wiring 10 on the N-type silicon substrate 1 to the anode diffusion region 5 ′ on the right side of the Al wiring 10. Further, an oxygen-doped semi-insulating polycrystalline silicon film 16 is formed on the SiO ₂ film 15, and an SiN film 17 is formed on the oxygen-doped semi-insulating polycrystalline silicon film 16 by chemical vapor deposition. On the left side, an Al electrode 9 is formed from the SiN film 17 to the P gate diffusion region 6 and connected to the electrode T2. On the other hand, on the right side, an Al electrode 9 'is formed from the SiN film 17 to the anode diffusion region 5' and connected to the electrode T1. Further, as shown in FIG. 23, an Al wiring 10 for separating the left side and the right side of the bidirectional photothyristor is formed over the entire width on the SiN film 17 and connected to the N-type silicon substrate 1. ing. In this way, both ends and the center of the oxygen-doped semi-insulating polycrystalline silicon film 16 are brought into contact with the Al electrodes 9, 9 ', 10, and a potential gradient is formed between the Al electrodes 9, 9' and the Al electrode 10 to form Si. to relax the electric field concentration at -SiO ₂ interface. Thus, a field plate structure that can advantageously increase the breakdown voltage is obtained. Incidentally, 18 is an N + layer and 19 is a depletion layer.

  In general, a light ignition type coupler used in alternating current operates as follows. That is, in FIG. 25, under the condition that an AC voltage higher than the on-voltage (about 1.5 V) of the element is biased between the electrode T1 and the electrode T2, first, the electrode T1 side is more positive than the electrode T2 side. In some cases, when the bidirectional photothyristor 4 receives an optical signal from an LED (light emitting diode) (not shown), the NPN transistor Q2 on the CH1 side is turned on. Then, the base current of the PNP transistor Q1 on the CH1 side is drawn, and this PNP transistor Q1 is turned on. Subsequently, the base current is supplied to the NPN transistor Q2 on the CH1 side by the collector current of the PNP transistor Q1, and the PNPN part on the CH1 side is turned on by the positive feedback, and the load from the electrode T1 to the electrode T2 corresponds to the load of the AC circuit. On-current flows. In that case, on the CH2 side, since the direction of bias application is reverse, positive feedback of the PNPN portion does not occur and only the primary photocurrent flows. In the next half cycle, when the electrode T2 side is more positive than the electrode T1 side, the PNPN section on the CH2 side is turned on by positive feedback operation in the same manner as described above, and the primary side on the CH1 side. Only photocurrent flows.

  Thus, the bidirectional photothyristor 4 is turned on when light is continuously emitted from the LED. On the other hand, when there is no light from the LED, the LED is turned off at a holding current value (referred to as IH). Thus, it performs the function of a switch. Incidentally, as a prior art document relating to the bidirectional photothyristor used in the light ignition coupler as described above, for example, there is JP-A-10-242449 (Patent Document 1).

  However, the conventional bidirectional photothyristor has the following problems. That is, when the photosensitivity is increased and the sensitivity is increased, the commutation characteristics and the dv / dt characteristics, which are contradictory noise resistance characteristics, are degraded. That is, the commutation characteristics, dv / dt characteristics, and photosensitivity have a so-called trade-off relationship, which is the most important design issue in terms of the performance of the bidirectional photothyristor. Here, the dv / dt characteristic is a “critical off voltage increase rate”, and a critical off voltage increase rate of 1000 V / μs or more is necessary for the bidirectional photothyristor to function normally as a device.

  Note that the above high sensitivity has a merit of low power consumption and a direct drive from a microcomputer because it can be controlled with a small current when viewed from the device used, and is strongly demanded by users. It is an important characteristic.

  Here, the commutation characteristics will be described. In the case of normal operation, the commutation characteristic means that light is emitted during a half cycle of alternating current in which CH1 is turned on, as shown in FIG. When there is no incidence, the ON state continues during the half cycle period due to the current holding characteristics of the PNPN section. Then, as shown in FIG. 27 (the entire longitudinal sectional view including the anode diffusion region 5 and the cathode diffusion region 7 ′ in FIG. 23), when the next half cycle is entered, CH2 is not turned on unless light is incident. However, when there is an L load in the AC circuit to be switched, the phase of the on-voltage is delayed from the phase of the AC voltage applied between the electrode T1 and the electrode T2, so that the electrode T1 is already present when CH1 is turned off. A reverse phase AC voltage is applied between the electrodes T2. Therefore, when CH1 is turned off, a voltage having an opposite phase showing a steep rise is applied to the CH2 side.

  Therefore, the holes 11 remaining in the N-type silicon substrate 1 of the bidirectional photothyristor 4 are transferred to the P gate diffusion region 6 ′ on the photothyristor 3 side as indicated by an arrow (A) before disappearing. It moves to turn on the NPN transistor Q4 on the CH2 side and promote the positive feedback action on the CH2 side even though there is no light incident, thereby causing a malfunction (commutation failure) that the CH2 is turned on.

  That is, the “commutation characteristic” is a characteristic that represents the maximum operating current value Icom that can be controlled without causing the commutation failure as described above. Then, there is a trade-off correlation that the commutation characteristic is lowered as the sensitivity is increased, and how to improve the commutation characteristic is a problem in increasing the sensitivity.

By the way, in order to prevent the commutation failure, the holes 11 remaining in the N-type silicon substrate 1 move from the photothyristor 2 side to the P gate diffusion region 6 ′ on the photothyristor 3 side. It should be suppressed. However, in the conventional bidirectional photothyristor 4 having the structure as shown in FIGS. 23 to 25, as described above, the passivation structure has Al electrodes 9, 9 ′ and Al electrode 10 as shown in FIG. A field plate structure is formed in which a potential gradient is formed between them to relax the electric field concentration at the Si-SiO ₂ interface, thereby advantageously increasing the breakdown voltage. However, such a structure is not directly related to the improvement of the commutation characteristics, and the holes 11 generated on the photothyristor 2 side and remaining in the N-type silicon substrate 1 are converted to P on the photothyristor 3 side. The movement to the gate diffusion region 6 ′ cannot be suppressed.

Next, the critical off voltage rise rate dv / dt characteristic will be described. If a sudden voltage pulse is applied between the anode diffusion regions 5 and 5 'and the cathode diffusion regions 7 and 7', a malfunction occurs in which the bidirectional photothyristor 4 is turned on even if there is no optical signal. . This is because a displacement current flows into the P gate diffusion regions 6 and 6 ′ that should receive an optical signal, and this acts as a trigger current. Such a malfunction occurs particularly in a high temperature state. That is, the maximum voltage increase rate at which the malfunction does not occur is the critical off-voltage increase rate dv / dt. And there is a trade-off correlation that the critical off-voltage rise rate dv / dt characteristic also decreases as the sensitivity increases. That is, how to improve the dv / dt characteristic is a problem in increasing the sensitivity.
JP-A-10-242449

  Therefore, an object of the present invention is to provide a bidirectional photothyristor chip capable of improving the photosensitivity, the commutation characteristic having a trade-off relationship with the photosensitivity, and the critical off voltage increase rate dv / dt characteristic. It is to provide.

  In order to solve the above-mentioned problems, the present invention forms a second conductive type first diffusion layer, a second conductive type second diffusion layer, and a second conductive layer on the surface of a first conductive type substrate. A bidirectional photothyristor chip, which is a semiconductor chip provided with a pair of photothyristor portions including the third diffusion layer of the first conductivity type, wherein one of the pair of photothyristor portions is the above One of the semiconductor chips is disposed on one side, the other is disposed on the other side of the semiconductor chip, and the first diffusion layer constituting the one photothyristor portion constitutes the other photothyristor portion. The first diffusion layer facing the second diffusion layer and the third diffusion layer and constituting the other photothyristor part is the second diffusion layer and the third diffusion constituting the one photothyristor part. The two channels generated between the pair of photothyristor parts are parallel to each other without crossing each other, and the two second diffusion layers constituting the pair of photothyristor parts on the substrate are It is characterized in that it is provided with a carrier movement suppression region that is formed between them and suppresses carrier movement.

  According to the above configuration, in the half cycle of the applied AC voltage, when one of the two channels forming the pair is turned on by an optical signal, the carrier that has been generated and remained in the substrate is moved. These are suppressed by the carrier movement suppression region formed between the two second diffusion layers constituting the two photothyristor portions. As a result, in the next half cycle, the remaining carriers in the substrate move to the second diffusion layer of the photothyristor section constituting the other channel, and the other channel is turned on despite no light incidence. Is prevented. Therefore, malfunction due to commutation failure can be reduced, and commutation characteristics are improved.

  Here, the first conductivity type and the second conductivity type indicate N type or P type, and when the first conductivity type is N type, the second conductivity type is P type, and the first conductivity type When the conductivity type is P-type, the second conductivity type is N-type.

  In the bidirectional photothyristor chip of one embodiment, the carrier movement suppression region includes an oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus, and the oxygen-doped semi-insulating polycrystalline silicon doped with phosphorus. The film is electrically connected to the substrate by an Al electrode.

  According to this embodiment, when the first conductivity type is N type, the second conductivity type is P type, and the substrate is a silicon substrate, the carrier movement on the surface of the N type silicon substrate. The silicon interface state (Qss) in the suppression region increases. As a result, holes which are minority carriers in the N-type silicon substrate can be eliminated in the region of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus, and the lifetime of the holes can be reduced. . As a result, the commutation characteristics can be improved.

  Further, in the bidirectional photothyristor chip having a carrier movement suppression region including the phosphorus-doped oxygen-doped semi-insulating polycrystalline silicon film of one embodiment, the carrier movement suppression region is further formed on the surface of the substrate. Includes a short diode.

  According to this embodiment, holes which are minority carriers in the N-type silicon substrate are absorbed by the P-type diffusion region constituting the short diode, and the lifetime of the holes is reduced. Therefore, the commutation characteristic can be improved more reliably in combination with the above-described effect of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus.

  In the bidirectional photothyristor chip having a carrier movement suppression region including the short diode according to one embodiment, the short diode has an outer diameter smaller than the outer diameter of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus. In addition to having a diameter, one end is electrically connected to the substrate via the Al electrode.

  According to this embodiment, a region where the silicon interface state Qss increases due to the presence of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus can be provided on the surface of the N-type silicon substrate. Therefore, the effect of the short diode and the effect of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus can be effectively extracted.

  In the bidirectional photothyristor chip of one embodiment, the distance between the first electrode electrically connected to the first diffusion layer and the carrier movement suppression region and the third diffusion layer are electrically connected. Among the distances between the second electrode and the carrier movement suppression region, the narrower distance is at least 30 μm.

  According to this embodiment, a withstand voltage of 400 V or more can be obtained when the structure of the carrier movement suppression region is used.

  Further, in the bidirectional photothyristor chip having a carrier movement suppression region including the phosphorus-doped oxygen-doped semi-insulating polycrystalline silicon film of one embodiment, the carrier movement suppression region is provided between the two channels. It is formed so as not to cross the channel.

  According to this embodiment, by suppressing the carrier movement suppression region having a small area, it is possible to suppress the remaining carriers in the substrate from moving to the second diffusion layer of the photothyristor portion constituting the off-side channel, The commutation characteristics can be improved.

  In one embodiment, in the bidirectional photothyristor chip having a carrier movement suppression region including the phosphorus-doped oxygen-doped semi-insulating polycrystalline silicon film, the carrier movement suppression region intersects with each of the two channels. doing.

  According to this embodiment, when a sudden rising voltage pulse is applied between the first diffusion region and the third diffusion region, a displacement current flows into the second diffusion region that should originally receive an optical signal. This is suppressed by the carrier movement suppression region including the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus and the Al electrode formed so as to intersect with each of the two channels. As a result, even if there is no optical signal, the photothyristor section is prevented from being turned on, and the dv / dt characteristics can be improved.

  In the bidirectional photothyristor chip in which the carrier movement suppression region of one embodiment intersects with each of two channels, the first electrode electrically connected to the first diffusion layer and the carrier movement suppression region And the distance between the second electrode electrically connected to the third diffusion layer and the carrier movement suppression region, whichever is narrower is at least 30 μm.

  According to this embodiment, a withstand voltage of 400 V or more can be obtained when the structure of the carrier movement suppression region intersecting with each of the two channels is used.

  In the bidirectional photothyristor chip having the carrier movement suppression region including the short diode of one embodiment, the carrier movement suppression region intersects each of the two channels.

  According to this embodiment, when a sudden rising voltage pulse is applied between the first diffusion region and the third diffusion region, a displacement current flows into the second diffusion region that should originally receive an optical signal. This is suppressed by the carrier movement suppression region including the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus and the Al electrode formed so as to intersect with each of the two channels. As a result, even if there is no optical signal, the photothyristor section is prevented from being turned on, and the dv / dt characteristics can be improved.

  In a bidirectional photothyristor chip including the short diode of one embodiment and having a carrier movement suppression region intersecting with each of the two channels, a first electrically connected to the first diffusion layer is provided. Of the distance between the electrode and the carrier movement suppression region and the distance between the second electrode electrically connected to the third diffusion layer and the carrier movement suppression region, the smaller one is at least 30 μm. .

  According to this embodiment, when the structure of the carrier movement suppression region including the short diode and intersecting with each of the two channels is used, a breakdown voltage of 400 V or more can be obtained.

  In a bidirectional photothyristor chip including the short diode of one embodiment and having a carrier movement suppression region intersecting with each of the two channels, the short diode includes the oxygen-doped half-doped phosphorus. The insulating polycrystalline silicon film has an outer diameter smaller than the outer diameter, and one end is electrically connected to the substrate through the Al electrode.

  According to this embodiment, a region where the silicon interface state Qss increases due to the presence of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus can be provided on the surface of the N-type silicon substrate. Therefore, the effect of the short diode and the effect of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus can be effectively extracted.

  According to the present invention, the first conductivity type substrate is formed on the surface of the first conductivity type substrate, the second conductivity type first diffusion layer, the second conductivity type second diffusion layer, and the first diffusion layer formed in the second diffusion layer. A bidirectional photothyristor chip which is a semiconductor chip provided with a pair of photothyristor portions including a conductive type third diffusion layer, wherein one of the pair of photothyristor portions is one side of the semiconductor chip. The other diffusion layer is disposed on the other side of the semiconductor chip, and the first diffusion layer constituting the one photothyristor portion is the second diffusion layer constituting the other photothyristor portion. And the first diffusion layer that constitutes the other photothyristor portion is opposed to the second and third diffusion layers that constitute the one photothyristor portion. And Two channels generated between the pair of photothyristor parts are parallel to each other without crossing each other, and are on the substrate and the two first diffusion layers constituting the pair of photothyristor parts and the above In the vicinity of the junction with the substrate and in the vicinity of the junction between the two second diffusion layers constituting the pair of photothyristor portions and the substrate, the phosphor is formed so as to cross the channel and suppress the carrier movement. An oxygen-doped semi-insulating polycrystalline silicon film doped with is provided.

  According to the above configuration, the movement of the channel to be turned on next to the carrier remaining in the substrate to the second diffusion layer is caused between the two second diffusion layers constituting the two photothyristor portions. Suppressed by the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus. As a result, in the next half cycle, the channel is prevented from being turned on despite no light incidence, and the commutation characteristics are improved.

  Further, when a sudden rising voltage pulse is applied between the first diffusion region and the third diffusion region, a displacement current flows into the second diffusion region, crossing each of the two channels. This is suppressed by the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus. As a result, it is possible to prevent the photothyristor section from being turned on even without an optical signal, and to improve the dv / dt characteristics.

  In the bidirectional photothyristor chip of one embodiment, the two photothyristor parts forming the pair are formed of Al so as to cross each of the two channels and are electrically connected to the substrate. The Al guard ring is provided, and the distance between the oxygen-doped semi-insulating polycrystalline silicon film doped with each phosphorus and the Al guard ring is at least 30 μm.

  According to this embodiment, when the structure of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus is used, a breakdown voltage of 400 V or more can be obtained.

  According to the present invention, the first conductivity type substrate is formed on the surface of the first conductivity type substrate, the second conductivity type first diffusion layer, the second conductivity type second diffusion layer, and the first diffusion layer formed in the second diffusion layer. A bidirectional photothyristor chip which is a semiconductor chip provided with a pair of photothyristor portions including a conductive type third diffusion layer, wherein one of the pair of photothyristor portions is one side of the semiconductor chip. The other diffusion layer is disposed on the other side of the semiconductor chip, and the first diffusion layer constituting the one photothyristor portion is the second diffusion layer constituting the other photothyristor portion. And the first diffusion layer that constitutes the other photothyristor portion is opposed to the second and third diffusion layers that constitute the one photothyristor portion. And The two channels generated between the pair of photothyristor parts are parallel to each other without crossing each other, between the two second diffusion layers constituting the pair of photothyristor parts on the substrate, and , Oxygen doped with phosphorus that is formed in the vicinity of the junction between the two second diffusion layers and the substrate so as not to cross each channel between the two channels and suppresses carrier movement A doped semi-insulating polycrystalline silicon film is provided.

  According to the above configuration, the movement of the channel to be turned on next to the carrier remaining in the substrate to the second diffusion layer is caused between the two second diffusion layers constituting the two photothyristor portions. Suppressed by the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus. As a result, in the next half cycle, the channel is prevented from being turned on despite no light incidence, and the commutation characteristics are improved.

  In the bidirectional photothyristor chip of one embodiment, the distance between the first electrode electrically connected to the first diffusion layer and the phosphorus-doped oxygen-doped semi-insulating polycrystalline silicon film and the third Of the intervals between the second electrode electrically connected to the diffusion layer and the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus, the narrower interval is at least 30 μm, and the two The distance between each other in the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus is at least 30 μm.

  According to this embodiment, when the structure of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus is used, a breakdown voltage of 400 V or more can be obtained.

  Further, in the bidirectional photothyristor chip of one embodiment, with respect to each of the paired photothyristor portions on the substrate, the vicinity of the junction between the first diffusion layer and the substrate, the second diffusion layer, and the above A transparent guard ring made of an oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus is formed in an annular region including the vicinity of the junction with the substrate and surrounding the first diffusion layer and the second diffusion layer.

  According to this embodiment, the transparent guard ring is formed in the annular region surrounding the first diffusion layer and the second diffusion layer. Therefore, the light shielding area of the region surrounding the first diffusion layer and the second diffusion layer can be reduced, and the photosensitivity can be improved.

  In addition, the bidirectional photothyristor chip of one embodiment includes a Schottky barrier diode formed between the second diffusion layer and the substrate constituting each photothyristor portion forming the pair.

  According to this embodiment, at the time of commutation, minority carriers (holes) are injected from the second diffusion layer of the photothyristor portion constituting the turned-on channel into the N-type substrate by the Schottky barrier diode. It is suppressed. Therefore, the amount of residual carriers in the substrate is reduced, and the commutation characteristics can be further improved.

  In the bidirectional photothyristor chip of one embodiment, the first conductivity type is one of N-type and P-type, and the second conductivity type is the other of N-type and P-type. In the photothyristor portion, a gate resistance and a switching element are provided between the base and emitter electrodes of the NPN transistor comprising the third diffusion region and the second diffusion region and the substrate or the first diffusion region, the substrate and the second diffusion region. Connected in parallel, the control terminal of the switching element is connected to the base of a PNP transistor comprising the third diffusion region and the second diffusion region and the substrate or the first diffusion region, the substrate and the second diffusion region.

  According to this embodiment, in the vicinity of the zero cross point of the power supply voltage biased between the emitter electrode of the PNP transistor and the emitter electrode of the NPN transistor, the switching element is off, and the NPN transistor Is applied with a base-emitter voltage corresponding to the resistance value of the gate resistor. On the other hand, in the time away from the zero cross point of the power supply voltage, the switching element is turned on, so that the base and emitter of the NPN transistor are short-circuited, and the NPN transistor is turned on even when receiving an optical signal. become unable.

  Thus, a zero cross function for turning on the photothyristor section only in the vicinity of the zero cross point of the power supply voltage is realized.

  In addition, the light ignition coupler of the present invention is characterized by comprising the bidirectional photothyristor chip of the present invention and a light emitting diode.

  According to the said structure, it is comprised using the bidirectional | two-way photothyristor chip which can improve a commutation characteristic. Therefore, it is possible to provide an optical ignition coupler that is free from malfunction and has few malfunctions. In particular, oxygen doping doped with phosphorus formed to intersect the channel in the vicinity of the junction between the two first diffusion layers and the substrate and in the vicinity of the junction between the two second diffusion layers and the substrate. When it is configured using a bidirectional photothyristor chip having a semi-insulating polycrystalline silicon film, it is possible to further improve the dv / dt characteristics and provide a light ignition coupler with fewer malfunctions. it can.

  Further, the SSR of the present invention is characterized by comprising the light ignition coupler of the present invention and a snubber circuit.

  According to the above configuration, since an optical ignition coupler that does not fail to flow and has few malfunctions is used, an SSR with few malfunctions can be provided. In particular, oxygen doping doped with phosphorus formed to intersect the channel in the vicinity of the junction between the two first diffusion layers and the substrate and in the vicinity of the junction between the two second diffusion layers and the substrate. In the case of using an optical ignition coupler composed of a bidirectional photothyristor chip provided with a semi-insulating polycrystalline silicon film, the dv / dt characteristics of the bidirectional photothyristor chip can be improved, and more malfunctions can occur. Less SSR can be provided.

  As is clear from the above, the bidirectional photothyristor chip according to the present invention has carrier movement that suppresses carrier movement between the two second diffusion layers constituting the two photothyristor portions forming a pair on the substrate. Since the suppression region is provided, it is possible to suppress the remaining carriers in the substrate from moving to the second diffusion layer of the photothyristor part constituting the channel to be turned on next. Therefore, it is possible to prevent the channel from being turned on in spite of no light incident, and to improve the commutation characteristics.

  Further, the bidirectional photothyristor chip of the present invention is on the substrate and in the vicinity of the junction between the two first diffusion layers constituting the two photothyristor portions forming a pair and the substrate, and the two second photothyristor chips. Since the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus is provided in the vicinity of the junction between the diffusion layer and the substrate so as to cross the channel, the first conductivity type is the N type, and the second conductivity type. Increases the silicon interface state Qss in the region of the phosphorus-doped oxygen-doped semi-insulating polycrystalline silicon film on the surface of the N-type silicon substrate when the substrate is P-type and the substrate is a silicon substrate Can do. Therefore, holes that are minority carriers in the N-type silicon substrate can be eliminated, the lifetime of the holes can be reduced, and the commutation characteristics can be improved.

  Furthermore, when a voltage pulse is applied between the first diffusion region and the third diffusion region, the displacement current can be prevented from flowing into the second diffusion region. Therefore, it is possible to prevent the photothyristor portion from being turned on even without an optical signal, and to improve the dv / dt characteristics.

  Further, the bidirectional photothyristor chip of the present invention is provided between two second diffusion layers constituting two photothyristor portions forming a pair on the substrate, and between the two second diffusion layers and the substrate. Since each of the vicinity of the junction is provided with an oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus between two channels, the first conductivity type is N-type and the second conductivity type is P-type. If the substrate is a silicon substrate, the silicon interface state Qss in the region of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus on the surface of the N-type silicon substrate can be increased. Therefore, holes that are minority carriers in the N-type silicon substrate can be eliminated, the lifetime of the holes can be reduced, and the commutation characteristics can be improved.

  Further, in each of the bidirectional photothyristor chips, if a transparent guard ring is formed in the annular region surrounding the first diffusion layer and the second diffusion layer, the region surrounding the first diffusion layer and the second diffusion layer is formed. The light shielding area can be reduced and the photosensitivity can be improved.

  In addition, since the light ignition coupler of the present invention is composed of the bidirectional photothyristor chip and the light emitting diode with improved commutation characteristics of the present invention, there is no light flow failure and the light ignition coupler with few malfunctions. Can provide. In particular, by using the bidirectional photothyristor chip that can improve the dv / dt characteristics, it is possible to provide a light ignition coupler with fewer malfunctions.

  In addition, since the SSR of the present invention is composed of the light ignition coupler and the snubber circuit of the present invention with little failure of spilling, it is possible to provide an SSR with few malfunctions. In particular, when an optical ignition coupler composed of a bidirectional photothyristor chip capable of improving the dv / dt characteristics is used, an SSR with fewer malfunctions can be provided.

  Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments.

First Embodiment FIG. 1 is a pattern layout diagram showing a schematic configuration of a bidirectional photothyristor chip according to the present embodiment. 2 is a cross-sectional view taken along the line BB ′ in FIG. FIG. 3 is an equivalent circuit diagram of the bidirectional photothyristor chip according to the present embodiment. This equivalent circuit is the same as the conventional bidirectional photothyristor chip shown in FIG.

  In this bidirectional photothyristor chip 31, two anode diffusion regions (P-type) 22 and 22 ′ in FIG. 1 are provided on the surface side of the N-type silicon substrate 21 with respect to the center of the bidirectional photothyristor chip 31. It is a point-symmetrical position, and the anode diffusion region 22 is arranged on the left side and the anode diffusion region 22 ′ is arranged on the right side. Further, the two P gate diffusion regions (P-type) 23, 23 ′ are positioned substantially symmetrical with respect to the center, the P gate diffusion region 23 is on the left side, and the P gate diffusion region 23 ′ is Located on the right side. The anode diffusion region 22 and the P gate diffusion region 23 ′ are arranged to face each other, while the anode diffusion region 22 ′ and the P gate diffusion region 23 are arranged to face each other. Cathode diffusion regions (N-type) 24 and 24 'are provided on the anode diffusion regions 22'22 facing each other in the P gate diffusion regions 23 and 23'. Thus, the PNPN portion constituting the CH1 photothyristor 32 in FIG. 3 is formed from the anode diffusion region 22 ′ on the right side to the cathode diffusion region 24 on the left side. Further, a PNPN portion constituting a CH2 photothyristor 33 is formed from the anode diffusion region 22 on the left side to the cathode diffusion region 24 'on the right side in the drawing. That is, the two operation channels CH1 and CH2 are arranged separately from each other so as not to cross each other. The anode diffusion region 22 and the P gate diffusion region 23 are connected by a gate resistor 25, while the anode diffusion region 22 ′ and the P gate diffusion region 23 ′ are connected by a gate resistor 25 ′.

Here, the N-type impurity concentration in the N-type silicon substrate 21 is about 10 ¹⁴ cm ⁻³ , and the P-type impurity concentration in the P gate diffusion regions 23 and 23 ′ is about 10 ¹⁶ cm ⁻³ to 10 ¹⁸ cm ^−3. The N-type impurity concentration in the cathode diffusion regions 24, 24 ′ is about 10 ²⁰ cm ⁻³ to 10 ²¹ cm ⁻³ .

  The electrode T2 is formed immediately above the Al electrode 26 and connected to the anode diffusion region 22 and the cathode diffusion region 24 via the Al electrode 26. The electrode T1 is formed immediately above the Al electrode 26 'and connected to the anode diffusion region 22' and the cathode diffusion region 24 'via the Al electrode 26'. The right anode diffusion region 22 ', the N-type silicon substrate 21 and the left P gate diffusion region 23 constitute a CH1 side PNP transistor Q1, and the left cathode diffusion region 24 and P gate diffusion region 23 The N-type silicon substrate 21 constitutes an NPN transistor Q2 on the CH1 side. On the other hand, the left anode diffusion region 22, the N-type silicon substrate 21, and the right P gate diffusion region 23 'constitute a CH2 side PNP transistor Q3, and the right cathode diffusion region 24' and P gate diffusion region 23 ' The N-type silicon substrate 21 constitutes an NPN transistor Q4 on the CH2 side.

  As described above, in the present embodiment, the electrodes T1 and T2 are connected to the anode diffusion regions 22 'and 22 and the cathode diffusion regions 24' and 24 through one Al electrode 26 'and 26, respectively. doing. However, the present invention is not limited to this. For example, the electrode T2 is connected to the anode diffusion region 22 via the first electrode, and is connected to the cathode diffusion region 24 via a second electrode different from the first electrode. Further, the electrode T1 is connected to the anode diffusion region 22 'via a third electrode different from the first and second electrodes, while a fourth electrode different from the first to third electrodes is connected. The cathode diffusion region 24 'may be connected via

An N-type diffusion region 27 as a channel stopper is formed along the periphery of the chip. An SiO ₂ film (not shown) is formed on the surface of the N-type silicon substrate 27, and insulates the Al electrodes 26 and 26 ′ from where necessary. An Al electrode 28 is formed on the SiO ₂ film on the N-type diffusion region 27 as indicated by a broken line.

  In the present embodiment, a channel isolation region is formed between the left P gate diffusion region 23 and the right P gate diffusion region 23 'on the N-type silicon substrate 21 and between the CH1 and CH2. 29 is formed. The channel separation region 29 restricts the movement between channels by sucking holes that are minority carriers in the N-type silicon substrate 21 during the commutation.

In addition, on the back surface of the N-type silicon substrate 21, high concentration phosphorus is diffused simultaneously with the cathode diffusion to form an N + layer 30 as shown in FIG. Thus, by forming a high concentration (for example, about 10 ¹⁶ cm ⁻³ ) N + layer 30 on the back surface of the N-type silicon substrate 21, carrier reflection occurs in the N + layer 30. Photosensitivity is increased by the so-called BSF (Back Surface Field) effect that increases the lifetime. However, the current amplification factor Hfe (pnp) of the PNP transistor increases and the holding current value IH decreases, which is disadvantageous in the commutation characteristics. If the back surface of the N-type silicon substrate 21 is made N- (as it is as an N-type substrate) without adopting such a structure, the carriers can easily recombine on the back surface of the N-type silicon substrate 21, so Time becomes smaller.

The latter is advantageous in commutation characteristics when the constant design of the equivalent circuit of the photothyristor as shown in FIG. 3 is small because the equivalent lifetime is small, but the current amplification factor Hfe (pnp) decreases. Lowers the photosensitivity. In order to compensate for this, in circuit constant design, it is necessary to increase the current amplification factor Hfe (npn) of the gate resistors 25 and 25 'and the NPN transistor, and the critical off-voltage increase rate dv / dt characteristic is reduced. Problems arise that do not satisfy the main characteristics of the device. The critical off voltage rise rate dv / dt characteristic also depends on the lifetime of the N-type silicon substrate 21. (a) In the case of the back surface N-, the lifetime of the hole τ _p is small, and the anode diffusion region 22, As a result, the diffusion capacity of 22 'is lowered, the operation response of the PNP transistor is accelerated, and the critical off voltage increase rate dv / dt is reduced. On the other hand, in the case of (b) the back surface N +, the lifetime τ _{p of the} hole is large, the diffusion capacity of the anode diffusion regions 22 and 22 ′ increases, and the operation response of the PNP transistor becomes dull. / dt becomes large.

  Therefore, in order to satisfy the trade-off correlation between the commutation characteristic and the critical off-voltage rise rate dv / dt characteristic, the phosphorus concentration on the back surface of the N-type silicon substrate 21 is optimized, and the current amplification factor Hfe (pnp of the PNP transistor). ) Must be set to an arbitrary circuit constant.

FIG. 2 is a cross-sectional view of the vicinity of the channel isolation region 29 showing the passivation structure in the present embodiment. In FIG. 2, on the left side (that is, the CH1 side) and the right side (that is, the CH2 side) of the channel isolation region 29 on the N-type silicon substrate 21, the Pgate on the CH2 side from the Pgate diffusion region 23 on the CH1 side is provided. A SiO ₂ film 34 is formed over the diffusion region 23 ′. Further, an oxygen-doped semi-insulating polycrystalline silicon film 35 is formed on the SiO ₂ film 34, and phosphorus is doped in a region 35a in the vicinity of the channel isolation region 29 in the oxygen-doped semi-insulating polycrystalline silicon film 35. By doing so, the silicon interface level (Qss) of the channel isolation region 29 on the surface of the N-type silicon substrate 21 is increased.

Further, an SiN film 36 is formed on the oxygen-doped semi-insulating polycrystalline silicon film 35 on the region not doped with phosphorus by chemical vapor deposition. On the CH1 side, an Al electrode 26 is formed from the SiN film 36 to the P gate diffusion region 23 and connected to the electrode T2. On the other hand, on the CH2 side, an Al electrode 26 'is formed from the SiN film 36 to the P gate diffusion region 23' and is connected to the electrode T1. Further, an Al electrode 37 is formed on the phosphorus doped region 35 a in the oxygen-doped semi-insulating polycrystalline silicon film 35 from the CH1 side SiN film 36 to the CH2 side SiN film 36 and connected to the N-type silicon substrate 21. doing. Thus, both ends and the center of the oxygen-doped semi-insulating polycrystalline silicon film 35 are brought into contact with the Al electrodes 26, 26 ′ and the Al electrode 37, and a potential gradient is formed between the Al electrodes 26, 26 ′ and the Al electrode 37. Then, the electric field concentration at the Si-SiO ₂ interface is relaxed. Thus, a field plate structure that can advantageously increase the breakdown voltage is obtained. In FIG. 1, both ends of the Al electrode 37 intersect with CH1 and CH2 and extend over the entire width of the chip to constitute an Al guard ring 38.

  As described above, the structure of the channel isolation region 29 in the present embodiment is constituted by the oxygen-doped semi-insulating polycrystalline silicon film 35 a doped on the N-type silicon substrate 21 and doped with phosphorus. When phosphorus is doped into the oxygen-doped semi-insulating polycrystalline silicon film, the level in the oxygen-doped semi-insulating polycrystalline silicon film increases, and as a result, the silicon interface level Qss increases. Therefore, the holes 39, which are minority carriers in the N-type silicon substrate 21, can be eliminated in the channel separation region 29, and the lifetime of the holes 39 can be reduced. Reference numeral 40 denotes a depletion layer.

  In the present embodiment, the value of the distance L1 between the Al electrode 37 and the Al electrodes 26 and 26 'shown in FIG. 1 is set larger than 30 μm. The value of the distance L1 is the minimum distance necessary to obtain a desired withstand voltage of 400 V or higher using this field plate structure. When the breakdown voltage is further increased, the interval L1 value may be increased according to the breakdown voltage. At that time, as described above, the electrode T2 is connected to the anode diffusion region 22 through the first electrode, while the electrode T1 is connected to the cathode diffusion region 24 through the second electrode, In the case where the anode diffusion region 22 ′ is connected via the fourth electrode and the cathode diffusion region 24 ′ is connected via the fourth electrode, the first and third electrodes and the Al electrode 37 are connected to each other. Of the spacing and the spacing between the second and fourth electrodes and the Al electrode 37, the narrower spacing may be made larger than 30 μm.

  Further, in the actual wafer process, after the structure shown in FIG. 1 before forming the Al electrodes 26, 26 ′ and the Al electrode 37 is fabricated, phosphorus is partially applied to the oxygen-doped semi-insulating polycrystalline silicon film 35. I try to dope.

Second Embodiment The bidirectional photothyristor chip in the present embodiment has a structure in which a short diode is loaded on the channel isolation region 29 in the bidirectional photothyristor chip 31 in the first embodiment.

  FIG. 4 is a pattern layout diagram showing a schematic configuration of the bidirectional photothyristor chip according to the present embodiment. 5 is a cross-sectional view taken along the line CC ′ in FIG. FIG. 6 is an equivalent circuit diagram of the bidirectional photothyristor chip according to the present embodiment.

  In the bidirectional photothyristor chip 51 of the present embodiment, the N-type silicon substrate 41, anode diffusion regions 42 and 42 ′, P gate diffusion regions 43 and 43 ′, cathode diffusion regions 44 and 44 ′, gate resistors 45 and 45 ′, The Al electrodes 46 and 46 ', the Al electrode 47, the Al guard ring 48, the N + layer 49, the CH1 photothyristor 52, and the CH2 photothyristor 53 are the N-type silicon in the bidirectional photothyristor chip 31 of the first embodiment. Substrate 21, anode diffusion regions 22, 22 ′, P gate diffusion regions 23, 23 ′, cathode diffusion regions 24, 24 ′, gate resistors 25, 25 ′, Al electrodes 26, 26 ′, Al electrode 28, Al guard ring 38 , N + layer 30, CH1 photothyristor 32, and CH2 photothyristor 33. However, in this embodiment, an N-type diffusion region formed as a channel stopper along the periphery of the chip is omitted.

  Also in the bidirectional photothyristor chip 51 of the present embodiment, as in the case of the first embodiment, between the left anode diffusion region 42 and the right anode diffusion region 42 ′ on the N-type silicon substrate 41. Thus, a channel separation region 50 is formed between CH1 and CH2. Then, the channel separation region 50 restricts the movement between channels by sucking holes which are minority carriers in the N-type silicon substrate 41 during the commutation.

  FIG. 5 is a cross-sectional view of the N-type silicon substrate 41 in the vicinity of the channel isolation region 50 showing the passivation structure in the present embodiment. In FIG. 5, a P-type diffusion region 54 is formed in the region of the channel isolation region 50 on the surface of the N-type silicon substrate 41. An N-type diffusion region 55 as a channel stopper is formed from the silicon substrate 41 to the P-type diffusion region 54, and the N-type diffusion region 55 ′ is similarly applied to the position of the right side (that is, the CH 2 side) of the P-type diffusion region 54. Is formed.

On the CH1 side and the CH2 side, SiO ₂ films 56 and 56 ′ are formed from the P gate diffusion regions 43 and 43 ′ to the N type diffusion regions 55 and 55 ′, respectively. Then, oxygen-doped semi-insulating polycrystalline silicon films 57 and 57 ′ are formed from the vicinity of the P gate diffusion regions 43 and 43 ′ on the SiO ₂ films 56 and 56 ′ to the N-type diffusion regions 55 and 55 ′. Further, phosphorus is doped into the regions 57a and 57a ′ on the N-type diffusion regions 55 and 55 ′ side in the oxygen-doped semi-insulating polycrystalline silicon films 57 and 57 ′. Further, SiN films 58 and 58 'are formed on the oxygen-doped semi-insulating polycrystalline silicon films 57 and 57' by the chemical vapor deposition method on the regions not doped with phosphorus. Then, Al electrodes 46 and 46 'are formed from the surface of the P gate diffusion regions 43 and 43' to the surface of the SiN films 58 and 58 ', and the Al electrode 46' is connected to the electrode T1, while the Al electrode 46 'is connected to the electrode T2. Connect to. Further, an Al electrode 59 is formed from the surface of the Si1 film 58 on the CH1 side to the surface of the SiN film 58 'on the CH2 side, and is connected to the N-type diffusion regions 55 and 55' and the N-type silicon substrate 41. Thus, both ends of the oxygen-doped semi-insulating polycrystalline silicon films 57 and 57 ′ are brought into contact with the Al electrodes 46 and 46 ′ and the Al electrode 59, and a potential gradient is formed between the Al electrodes 46 and 46 ′ and the Al electrode 59. To reduce the electric field concentration at the Si-SiO ₂ interface. Thus, the field plate structure is also formed in this embodiment. Also in the case of the present embodiment, the value of the distance L1 between the Al electrode 59 and the Al electrodes 46, 46 ′ is set to be larger than 30 μm.

  With the above configuration, a short diode 60 short-circuited between the P-type diffusion region 54 and the N-type diffusion region 55 is formed in the channel isolation region 50 on the surface of the N-type silicon substrate 41. Therefore, the holes 61 which are minority carriers in the N-type silicon substrate 41 are absorbed by the P-type diffusion region 54 of the short diode 60, and the lifetime of the holes 61 is reduced. The regions 57a and 57a ′ on the N-type diffusion regions 55 and 55 ′ side in the oxygen-doped semi-insulating polycrystalline silicon films 57 and 57 ′ are doped with phosphorus. Therefore, the silicon interface level Qss immediately below the oxygen-doped semi-insulating polycrystalline silicon films 57a and 57a ′ doped with phosphorus on the surface of the N-type silicon substrate 41 increases. Therefore, the holes 61 can be extinguished even in the region where the silicon interface state Qss is increased, and coupled with the effect of the short diode 60, the lifetime of the holes 61 can be more reliably reduced. It is.

  In the case of this embodiment, as shown in FIG. 4, the outer diameter of the short diode 60 is set smaller than the outer diameter of the oxygen-doped semi-insulating polycrystalline silicon film 57a doped with phosphorus. As a result, as shown in FIG. 5, the silicon interface state Qss increases on the surface of the N-type silicon substrate 41 due to the oxygen-doped semi-insulating polycrystalline silicon films 57a and 57a 'doped with phosphorus. A region can be provided, and the effect of the short diode 60 and the effect of phosphorus-doped oxygen-doped semi-insulating polycrystalline silicon films 57a and 57a 'can be effectively extracted.

Third Embodiment The bidirectional photothyristor chip in the present embodiment further extends the channel isolation region 29 in the bidirectional photothyristor chip 31 of the first embodiment and crosses CH1 and CH2 to the full width of the chip. It has a structure formed over.

  FIG. 7 is a pattern layout diagram showing a schematic configuration in the bidirectional photothyristor chip 71 of the present embodiment. The cross-sectional view of the channel isolation region in the bidirectional photothyristor chip 71 is substantially the same as FIG. The equivalent circuit is the same as in FIG.

  Anode diffusion regions 72, 72 ′, P gate diffusion regions 73, 73 ′, cathode diffusion regions 74, 74 ′, gate resistors 75, 75 ′, Al electrodes 76, 76 ′ in the bidirectional photothyristor chip 71 of the present embodiment. The Al electrode 77 includes anode diffusion regions 22 and 22 ′, P gate diffusion regions 23 and 23 ′, cathode diffusion regions 24 and 24 ′, and gate resistors 25 and 25 in the bidirectional photothyristor chip 31 of the first embodiment. ', Al electrodes 26, 26' and Al electrodes 28 are the same. However, in the present embodiment, an N-type diffusion region formed as a channel stopper along the periphery of the chip, and an N + formed on the back surface of the N-type silicon substrate in order to increase the photosensitivity by the BSF effect. Layers are omitted.

  The channel isolation region 80 in the bidirectional photothyristor chip 71 of the present embodiment extends from the CH1 side P gate diffusion region 23 to the CH2 side P gate diffusion region 23 'shown in FIG. 2 in the first embodiment. The passivation structure is formed so as to extend across the entire width of the bidirectional photothyristor chip 71 across each of CH1 and CH2. Accordingly, as shown in FIG. 7, the oxygen-doped semi-insulating polycrystalline silicon film 78 doped with phosphorus and the Al electrode 79 are located at the position of the Al guard ring 38 in the bidirectional photothyristor chip 31 of the first embodiment. At the corresponding position, the bidirectional photothyristor chip 71 is formed over the entire width. Even in the case of the present embodiment, the value of the distance L1 between the Al electrode 79 and the Al electrodes 76, 76 ′ is set to be larger than 30 μm.

  Incidentally, as one method for improving the commutation characteristics, there is a method of increasing the holding current IH. This IH characteristic represents the minimum operating current value at which the bidirectional thyristor can be kept on, and can be said to be the maximum operating current that can be turned off. The greater the IH value, the better the commutation characteristics. This is because the IH value affects the time from when the half cycle operation on the CH1 side in the AC operation is turned off until the opposite half cycle operation on the CH2 side is turned on. The longer this time is, the longer it is possible to earn time until commutation failure occurs. Therefore, carriers that move to the reverse channel within this time can be effectively eliminated.

  As parameters of this IH characteristic, there are circuit constants of (1) current gain Hfe (pnp), (2) current gain Hfe (npn), and (3) RGK (gate resistance). Of these, reducing the current amplification factor Hfe (pnp) in (1) is the most effective way to increase the IH characteristics without significantly affecting the photosensitivity (IFT) that is in a trade-off relationship with the IH characteristics. It is a simple method. Although the IH characteristic can be improved by lowering the circuit constant of the current amplification factor Hfe (npn) of (2) and the RGK of (3), there is a disadvantage that the photosensitivity characteristic (IFT) is greatly reduced. is there.

In the present embodiment, an oxygen-doped semi-insulating polycrystalline silicon film 78 doped with phosphorus locally is formed on an N-type silicon substrate constituting the bases of PNP transistors Q1 and Q3. This phosphorus-doped oxygen-doped semi-insulating polycrystalline silicon film 78 has the effect of increasing the surface recombination in order to increase the level Qss of the Si-SiO ₂ interface, and the current amplification factor Hfe (pnp) is effective. Can be lowered.

  Therefore, time delay until commutation failure can be earned, and carriers moving to the reverse channel can be effectively eliminated. It should be noted that the higher the phosphorus concentration implanted into the oxygen-doped semi-insulating polycrystalline silicon film, the more effective the Qss increase, and therefore the lower the current amplification factor Hfe (pnp). It will have an adverse effect on sex.

  In the bidirectional photothyristor chip 71 in the present embodiment, the oxygen-doped semi-insulating polycrystalline silicon film 78 doped with phosphorus is formed across the entire width of the chip crossing CH1 and CH2. Therefore, when a sudden voltage pulse is applied between the anode diffusion regions 72 and 72 ′ and the cathode diffusion regions 74 ′ and 74, the displacement current is prevented from flowing into the P gate diffusion regions 73 and 73 ′. Is done. As a result, no malfunction occurs in which the bidirectional photothyristor 71 is turned on even if there is no optical signal. That is, according to this embodiment, the dv / dt characteristic can be improved.

Fourth Embodiment A bidirectional photothyristor chip according to the present embodiment is an oxygen-doped semi-insulating polycrystalline silicon film 57a doped with phosphorus in the channel isolation region 50 in the bidirectional photothyristor chip 51 of the second embodiment. Further, the Al electrode 59 is further extended and formed across the entire width of the chip crossing CH1 and CH2.

  FIG. 8 is a pattern layout diagram showing a schematic configuration in the bidirectional photothyristor chip 81 of the present embodiment. The cross-sectional view of the channel isolation region at the center of the bidirectional photothyristor chip 81 is substantially the same as FIG. The equivalent circuit is the same as in FIG.

  In the bidirectional photothyristor chip 81 of the present embodiment, anode diffusion regions 82 and 82 ′, P gate diffusion regions 83 and 83 ′, cathode diffusion regions 84 and 84 ′, gate resistors 85 and 85 ′, Al electrodes 86 and 86 ′. The Al electrode 87 includes anode diffusion regions 22 and 22 ', P gate diffusion regions 23 and 23', cathode diffusion regions 24 and 24 ', and gate resistors 25 and 25 in the bidirectional photothyristor chip 31 of the first embodiment. ', Al electrodes 26, 26' and Al electrodes 28 are the same. However, in the present embodiment, an N-type diffusion region formed as a channel stopper along the periphery of the chip, and an N + formed on the back surface of the N-type silicon substrate in order to increase the photosensitivity by the BSF effect. Layers are omitted.

  The channel isolation region in the bidirectional photothyristor chip 81 of the present embodiment is an oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus in the channel isolation region 50 shown in FIGS. 4 and 5 in the second embodiment. 57a and Al electrode 59 extend across the entire width of bidirectional photothyristor chip 51 across each of CH1 and CH2. Therefore, as shown in FIG. 8, the oxygen-doped semi-insulating polycrystalline silicon film 88 doped with phosphorus and the Al electrode 89 are located at the position of the Al guard ring 48 in the bidirectional photothyristor chip 51 of the second embodiment. The bidirectional photothyristor chip 81 is formed at the corresponding position over the entire width. Even in the case of the present embodiment, the value of the distance L1 between the Al electrode 89 and the Al electrodes 86, 86 ′ is set to be larger than 30 μm.

  However, as in the case of the short diode 59 in the bidirectional photothyristor chip 51 of the second embodiment, the short diode 90 includes the left anode diffusion region 82 and the right anode diffusion region 82 ′ on the N-type silicon substrate. And between CH1 and CH2.

  Therefore, according to the present embodiment, as in the case of the bidirectional photothyristor chip 71 of the third embodiment, the time until the commutation failure is caused by effectively reducing the current amplification factor Hfe (pnp). The carrier moving to the reverse channel can be effectively eliminated in the region where the silicon interface state Qss on the surface of the N-type silicon substrate is increased. In addition, holes which are minority carriers in the N-type silicon substrate are absorbed by the P-type diffusion region of the short diode 90, and the lifetime of the holes is reduced.

  In the bidirectional photothyristor chip 81 in the present embodiment, the oxygen-doped semi-insulating polycrystalline silicon film 88 doped with phosphorus is formed across the entire width of the chip crossing CH1 and CH2. Therefore, when a sudden rising voltage pulse is applied between the anode diffusion regions 82 and 82 'and the cathode diffusion regions 84' and 84, the displacement current is prevented from flowing into the P gate diffusion regions 83 and 83 '. It is possible to prevent a malfunction in which the bidirectional photothyristor 81 is turned on even without an optical signal. That is, according to this embodiment, the dv / dt characteristic can be improved.

Fifth Embodiment The bidirectional photothyristor chip in the present embodiment further extends the short diode 90 in the bidirectional photothyristor chip 81 of the fourth embodiment and crosses CH1 and CH2 over the entire width of the chip. It has a structure formed by

  FIG. 9 is a pattern layout diagram showing a schematic configuration in the bidirectional photothyristor chip 91 of the present embodiment. The cross-sectional view of the channel isolation region in the bidirectional photothyristor chip 91 is substantially the same as FIG. The equivalent circuit is the same as in FIG.

  In the bidirectional photothyristor chip 91 of the present embodiment, anode diffusion regions 92 and 92 ′, P gate diffusion regions 93 and 93 ′, cathode diffusion regions 94 and 94 ′, gate resistances 95 and 95 ′, Al electrodes 96 and 96 ′. The Al electrode 97 includes anode diffusion regions 22, 22 ', P gate diffusion regions 23, 23', cathode diffusion regions 24, 24 ', gate resistors 25, 25 in the bidirectional photothyristor chip 31 of the first embodiment. ', Al electrodes 26, 26' and Al electrodes 28 are the same. However, in the present embodiment, an N-type diffusion region formed as a channel stopper along the periphery of the chip, and an N + formed on the back surface of the N-type silicon substrate in order to increase the photosensitivity by the BSF effect. Layers are omitted.

  The channel isolation region 101 of the bidirectional photothyristor chip 91 of the present embodiment is different from the channel isolation region 50 shown in FIGS. 4 and 5 in the second embodiment in the bidirectional photothyristor chip crossing CH1 and CH2. It has the structure extended over 91 full width. Therefore, as shown in FIG. 9, the oxygen-doped semi-insulating polycrystalline silicon film 98 doped with phosphorus, the Al electrode 99 and the short diode 100 are formed over the entire width of the bidirectional photothyristor chip 91. Also in the case of the present embodiment, the value of the distance L1 between the Al electrode 99 and the Al electrodes 96, 96 ′ is set to be larger than 30 μm.

  Therefore, according to the present embodiment, holes that are minority carriers in the N-type silicon substrate can be absorbed more effectively than in the case of the bidirectional photothyristor chip 81 of the fourth embodiment, The lifetime of holes can be reduced.

  Further, in the bidirectional photothyristor chip 91 in the present embodiment, the oxygen-doped semi-insulating polycrystalline silicon film 98 doped with phosphorus is formed across the entire width of the chip crossing CH1 and CH2. Therefore, it is possible to prevent displacement current from flowing into the P gate diffusion regions 93 and 93 ′ when a sudden rising voltage pulse is applied between the anode diffusion regions 92 and 92 ′ and the cathode diffusion regions 94 ′ and 94. It is possible to prevent a malfunction in which the bidirectional photothyristor 91 is turned on even without an optical signal. That is, according to the present embodiment, the dv / dt characteristics can be improved.

Sixth Embodiment FIG. 10 is a pattern layout diagram showing a schematic configuration of a bidirectional photothyristor chip according to the present embodiment. FIG. 11 is a cross-sectional view taken along the line DD ′ in FIG. The equivalent circuit is the same as in FIG.

  N-type silicon substrate 111, anode diffusion regions 112 and 112 ′, P gate diffusion regions 113 and 113 ′, cathode diffusion regions 114 and 114 ′, gate resistors 115 and 115 ′, and the like in bidirectional photothyristor chip 120 of the present embodiment. The Al electrodes 116, 116 ′, the Al electrode 117, the Al guard ring 118, and the N + layer 119 are formed of the N-type silicon substrate 21, anode diffusion regions 22, 22 ′, P in the bidirectional photothyristor chip 31 according to the first embodiment. This is the same as the gate diffusion regions 23, 23 ′, the cathode diffusion regions 24, 24 ′, the gate resistors 25, 25 ′, the Al electrodes 26, 26 ′, the Al electrode 28, the Al guard ring 38 and the N + layer 30. However, in this embodiment, an N-type diffusion region formed as a channel stopper along the periphery of the chip is omitted.

  In the bidirectional photothyristor chip 120 of the present embodiment, the opposing sides of the P gate diffusion region 113 and the anode diffusion region 112 ′ facing each other, and the anode diffusion region 112 and the P gate diffusion region 113 ′ Along the opposite side, in other words, near the junction between the two anode diffusion regions 112 and 112 ′ and the N-type silicon substrate 111, and between the two P-gate diffusion regions 113 and 113 ′ and the N-type silicon substrate 111. Oxygen-doped semi-insulating polycrystalline silicon films 122a, 122a ′, 124, and 124 ′ doped with phosphorus are formed in the vicinity of the junction.

Hereinafter, the opposing sides of the P gate diffusion region 113 and the anode diffusion region 112 ′ will be described with reference to FIG. In FIG. 11, an SiO ₂ film 121 is formed on the N-type silicon substrate 111 from the cathode diffusion region 114 on the left side of the Al guard ring 118 to the anode diffusion region 112 ′ on the right side. Further, an oxygen-doped semi-insulating polycrystalline silicon film 122 is formed outside the P-gate diffusion region 113 and the anode diffusion region 112 ′ on the SiO ₂ film 121, and the P-gate diffusion region in the oxygen-doped semi-insulating polycrystalline silicon film 122 is formed. The regions 122a and 122a ′ near 113 and the anode diffusion region 112 ′ are doped with phosphorus. By doing so, the silicon interface level (Qss) immediately below the oxygen-doped semi-insulating polycrystalline silicon films 122a and 122a ′ doped with phosphorus on the surface of the N-type silicon substrate 21 increases.

Further, a SiN film 123 is formed on the oxygen-doped semi-insulating polycrystalline silicon film 122 on the region not doped with phosphorus by chemical vapor deposition. On the left side, an Al electrode 116 is formed on the oxygen-doped semi-insulating polycrystalline silicon film 122a doped with phosphorus and on the P-gate diffusion region 113 and connected to the electrode T2. On the other hand, on the right side, an Al electrode 116 'is formed over the oxygen-doped semi-insulating polycrystalline silicon film 122a' doped with phosphorus and over the anode diffusion region 112 'and connected to the electrode T1. Further, an Al electrode is formed so as to divide the SiN film 123 into two parts, and is connected to the N-type silicon substrate 111 to form an Al guard ring 118. In this way, both ends and the center of the oxygen-doped semi-insulating polycrystalline silicon film 122 are brought into contact with the Al electrodes 116, 116 ′ and the Al electrode 118, and a potential gradient is formed between the Al electrodes 116, 116 ′ and the Al electrode 118. Then, the electric field concentration at the Si-SiO ₂ interface is relaxed. Thus, a field plate structure that can advantageously increase the breakdown voltage is obtained.

  As described above, in this bidirectional photothyristor chip 120, the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus along the opposing sides of the P gate diffusion region 113 and the anode diffusion region 112 ′ facing each other. 122a and 122a ′ are formed. Further, the phosphorus-doped oxygen-doped semi-insulating polycrystalline silicon films 124 and 124 ′ are formed along the opposing sides of the anode diffusion region 112 and the P gate diffusion region 113 ′ facing each other. Therefore, the silicon interface states (Qss) in the vicinity of the opposite side between the P gate diffusion region 113 and the anode diffusion region 112 ′ and in the vicinity of the opposite side between the anode diffusion region 112 and the P gate diffusion region 113 ′ on the surface of the N-type silicon substrate 111. ) Can be increased.

  That is, according to the present embodiment, as in the case of the bidirectional photothyristor chip 71 of the third embodiment, the time until the commutation failure is caused by effectively reducing the current amplification factor Hfe (pnp). The carrier moving to the reverse channel can be effectively eliminated in the regions 122a, 122a ′, 124, and 124 ′ in which the silicon interface states Qss on the surface of the N-type silicon substrate 111 are increased. It is. Reference numeral 125 denotes a depletion layer.

  Further, in the bidirectional photothyristor chip 120 in the present embodiment, the oxygen-doped semi-insulating polycrystalline silicon films 122a, 122a ′, 124, and 124 ′ doped with phosphorus are formed so as to intersect with the CH1 and CH2. doing. Therefore, when a sudden rising voltage pulse is applied between the anode diffusion regions 112 and 112 ′ and the cathode diffusion regions 114 ′ and 114, the displacement current is prevented from flowing into the P gate diffusion regions 113 and 113 ′. It is possible to prevent a malfunction in which the bidirectional photothyristor 120 is turned on even without an optical signal. That is, according to this embodiment, the dv / dt characteristic can be improved.

  In the present embodiment, the distance L2 between the Al guard ring 118 shown in FIG. 10 and the phosphorus-doped oxygen-doped semi-insulating polycrystalline silicon films 122a, 122a ′, 124, 124 ′ shown in FIG. It is also bigger. The value of the distance L2 is the minimum distance necessary to obtain a desired withstand voltage of 400 V or higher using this field plate structure. When the breakdown voltage is further increased, the interval L2 value may be increased according to the breakdown voltage.

  The oxygen-doped semi-insulating polycrystalline silicon films 122a, 122a ', 124, 124' doped with phosphorus are connected to the electrode T1 (anode electrode) and the electrode T2 (cathode electrode) to form a field plate structure. It is also a transparent electrode constituting the part. Accordingly, the light receiving sensitivity can be increased because there is nothing to block light compared to the case where an Al film is employed instead of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus.

Seventh Embodiment FIG. 12 is a pattern layout diagram showing a schematic configuration of a bidirectional photothyristor chip according to the present embodiment. The equivalent circuit is the same as in FIG.

  Anode diffusion regions 132 and 132 ′, P gate diffusion regions 133 and 133 ′, cathode diffusion regions 134 and 134 ′, gate resistors 135 and 135 ′, and Al electrodes 136 and 136 ′ in the bidirectional photothyristor chip 131 of the present embodiment. The Al electrode 137 includes anode diffusion regions 22 and 22 ', P gate diffusion regions 23 and 23', cathode diffusion regions 24 and 24 ', and gate resistors 25 and 25 in the bidirectional photothyristor chip 31 of the first embodiment. ', Al electrodes 26, 26' and Al electrodes 28 are the same. However, in the present embodiment, an N-type diffusion region formed as a channel stopper along the periphery of the chip, and an N + formed on the back surface of the N-type silicon substrate in order to increase the photosensitivity by the BSF effect. Layers are omitted.

  In the bidirectional photothyristor chip 131 of the present embodiment, it is on a line connecting the P gate diffusion regions 133 and 133 ′ arranged at point-symmetric positions with respect to the chip center and separates CH1 and CH2. Oxygen-doped semi-insulating polycrystalline silicon films 138 and 138 ′ doped with phosphorus are formed point-symmetrically with respect to the chip center. Therefore, the silicon interface state (Qss) of the phosphorus-doped oxygen-doped semi-insulating polycrystalline silicon films 138 and 138 ′ on the surface of the N-type silicon substrate can be increased.

  That is, according to the present embodiment, holes that are minority carriers in the N-type silicon substrate can be eliminated in the region where the silicon interface state Qss is increased, and the lifetime of the holes can be reliably reduced. It can be promoted.

  In the present embodiment, the value of the distance L3 between the oxygen-doped semi-insulating polycrystalline silicon films 138, 138 ′ doped with phosphorus and the Al electrodes 136, 136 ′ shown in FIG. The value of the distance L4 between the doped oxygen-doped semi-insulating polycrystalline silicon films 138, 138 ′ is set to be larger than 30 μm. The values of the distance L3 and the distance L4 are the minimum distance necessary to obtain a desired withstand voltage of 400 V or higher using the field plate structure. When the breakdown voltage is further increased, the values of the interval L3 and the interval L4 may be increased according to the breakdown voltage.

Eighth Embodiment The bidirectional photothyristor chip in the present embodiment is an oxygen-doped semi-insulating material in which phosphorus is also doped around the Al electrodes 86 and 86 ′ in the bidirectional photothyristor chip 81 in the fourth embodiment. It has a structure in which a polycrystalline silicon film is formed.

  FIG. 13 is a pattern layout diagram showing a schematic configuration in the bidirectional photothyristor chip 152 of the present embodiment. FIG. 14 is a cross-sectional view taken along the line EE ′ in FIG. The equivalent circuit is the same as in FIG.

  N-type silicon substrate 141, anode diffusion regions 142 and 142 ′, P gate diffusion regions 143 and 143 ′, cathode diffusion regions 144 and 144 ′, gate resistors 145 and 145 ′, and the like in bidirectional photothyristor chip 152 of the present embodiment. The Al electrode 147 and the N + layer 151 are formed of the N-type silicon substrate 21, anode diffusion regions 22 and 22 ′, P gate diffusion regions 23 and 23 ′, and cathode diffusion region 24 in the bidirectional photothyristor chip 31 of the first embodiment. , 24 ′, gate resistors 25, 25 ′, Al electrode 28 and N + layer 30. Further, the oxygen-doped semi-insulating polycrystalline silicon film 148 doped with phosphorus, the Al electrode 149 and the short diode 150 are the oxygen-doped semi-insulating polycrystalline silicon doped with phosphorus in the bidirectional photothyristor chip 81 of the fourth embodiment. This is the same as the silicon film 88, the Al electrode 89, and the short diode 90. However, in this embodiment, an N-type diffusion region formed as a channel stopper along the periphery of the chip is omitted.

In the present embodiment, as shown in FIG. 13, the Al electrodes 146 and 146 ′ are completely covered with the P gate diffusion regions 143 and 143 ′, the gate resistors 145 and 145 ′, and the anode diffusion regions 142 and 142 ′. Is formed in the smallest possible rectangular shape. That is, it is formed smaller than the Al electrodes 26, 46, 76, 86, 96, 116, 136 in the above embodiments. Then, as shown in FIG. 14, an oxygen-doped semi-insulating polycrystalline silicon film 148 is formed on the SiO ₂ film 155 formed on the surface of the N-type silicon substrate 141 and partially doped with phosphorus. In the oxygen-doped semi-insulating polycrystalline silicon film 156, phosphorus is doped into a region 156a having a predetermined width surrounding the Al electrode 146. Then, SiN films 157 and 158 are formed on the oxygen-doped semi-insulating polycrystalline silicon film 156 in a region not doped with phosphorus by chemical vapor deposition. Further, an Al guard ring 159 is formed from the SiN film 157 to the oxygen-doped semi-insulating polycrystalline silicon film 156a doped with phosphorus. In the present embodiment, the value of the distance L1 between the Al electrode 149 and the Al guard rings 159, 159 ′ is set to be larger than 30 μm.

  As described above, in the bidirectional photothyristor chip 152 of this embodiment, the oxygen-doped semi-insulating polycrystalline silicon film 148 doped with phosphorus is formed across the entire width of the chip crossing CH1 and CH2. . Therefore, commutation characteristics can be improved. Further, the Al electrodes 146 and 146 ′ are formed in a minimum rectangular shape capable of completely covering the P gate diffusion regions 143 and 143 ′, the gate resistors 145 and 145 ′, and the anode diffusion regions 142 and 142 ′. A transparent guard ring and Al guard rings 159 and 159 ′ made of oxygen-doped semi-insulating polycrystalline silicon films 156a and 156a ′ doped with phosphorus surrounding the electrodes 146 and 146 ′ and a double guard ring structure are formed. It is said. Therefore, the light shielding area of the junction region between the P gate diffusion regions 143 and 143 ′ and the N-type silicon substrate 141 is reduced, and the photosensitivity can be improved.

  Further, an oxygen-doped semi-insulating polycrystalline silicon film 148 doped with phosphorus is formed so as to intersect with CH1 and CH2. Therefore, when a voltage pulse is applied between the anode diffusion regions 142 and 142 ′ and the cathode diffusion regions 144 ′ and 144, it is possible to prevent a malfunction in which the bidirectional photothyristor 152 is turned on even if there is no optical signal. That is, according to this embodiment, the dv / dt characteristic can be improved.

  In the present embodiment, the Al electrodes 146 and 146 ′ are surrounded by a double layer composed of oxygen-doped semi-insulating polycrystalline silicon films 156a and 156a ′ doped with phosphorus and Al guard rings 159 and 159 ′. The guard ring structure is applied to the bidirectional photothyristor chip 81 of the fourth embodiment. However, it is possible to improve the photosensitivity by applying to other embodiments.

Ninth Embodiment The bidirectional photothyristor chip in the present embodiment has a structure in which Schottky barrier diodes are formed in the P gate diffusion regions 83 and 83 ′ in the bidirectional photothyristor chip 81 in the fourth embodiment. Have. In the following description, the same members as the bidirectional photothyristor chip 81 of the fourth embodiment are given the same member numbers as those of the fourth embodiment, and the description thereof is omitted.

  FIG. 15 is a pattern layout diagram showing a schematic configuration in the bidirectional photothyristor chip 161 of the present embodiment. FIG. 16 is an equivalent circuit diagram.

In the region where the cathode diffusion regions 84 and 84 ′ are not formed in the P gate diffusion regions 83 and 83 ′, a rectangular opening (in which P-type impurities are not diffused in parallel with the cathode diffusion regions 84 and 84 ′). (Not shown). Further, an opening (not shown) is formed at the position of the opening of the P gate diffusion regions 84 and 84 ′ in the SiO ₂ film 56 (see FIG. 5) so as to surround the opening. Further, openings 164 and 164 ′ are formed at the positions of the openings of the SiO ₂ film 56 in the Al electrodes 86 and 86 ′ so as to surround the openings. Then, in and within the opening of the SiO ₂ film 56 in the 'opening 164, 164 of' Al electrodes 86, 86, along the 'opening 164, 164 of' Al electrodes 86, 86, a rectangular Al electrode 165, 165 ′. At that time, an electrically insulating space is formed between the Al electrodes 86 and 86 ′ and the Al electrodes 165 and 165 ′.

As described above, the Al electrodes 165 and 165 ′ are in direct contact with the N-type silicon substrate (not shown) in the openings of the P gate diffusion regions 83 and 83 ′ through the openings of the SiO ₂ film 56. ing. Thus, Schottky barrier diodes 166 and 166 ′ are formed between the P gate diffusion regions 83 and 83 ′ and the N-type silicon substrate. Here, at the time of commutation (a process in which the load current is attenuated in response to the alternating voltage and the photothyristor is turned off at the timing of the holding current IH), the P gate diffusion region (NPN transistor Q2, NPN transistor Q2, immediately before the photothyristor is turned off). (Q4 base region) 83, 83 ′ is in a saturated state, but in this state, injection of minority carriers (holes) from the P gate diffusion regions 83, 83 ′ to the N-type silicon substrate is performed by Schottky barrier diodes 166, 166. Suppressed by '. Therefore, the amount of remaining carriers in the N-type silicon substrate is reduced, and the commutation characteristics can be further improved. However, since the light receiving area of the P gate diffusion regions 83 and 83 ′ is reduced, there is a demerit that the photosensitivity is lowered.

  In the above description, Al is used as the metal material constituting the Schottky barrier diodes 166 and 166 ′. However, metal materials such as Cr, Mo, Ti, and Pt may be used instead of Al.

Tenth Embodiment A bidirectional photothyristor chip according to the present embodiment has a structure in which Schottky barrier diodes are formed in the P gate diffusion regions 143 and 143 ′ of the bidirectional photothyristor chip 152 according to the eighth embodiment. Have. In the following description, the same members as the bidirectional photothyristor chip 152 of the eighth embodiment are given the same member numbers as those of the eighth embodiment, and the description thereof is omitted.

  FIG. 17 is a pattern layout diagram showing a schematic configuration of the bidirectional photothyristor chip 171 of the present embodiment. The equivalent circuit is the same as in FIG.

  In the present embodiment, similarly to the case of the bidirectional photothyristor chip 152 of the eighth embodiment, the Al electrodes 146 and 146 ′ are formed in a rectangular shape having a minimum size, and the Al electrode 146 is formed. , 146 ′ and a transparent ring guard ring made of oxygen-doped semi-insulating polycrystalline silicon films 156a, 156a ′ doped with phosphorus. Therefore, it is possible to reduce the light shielding area of the junction region between the P gate diffusion regions 143 and 143 ′ and the N-type silicon substrate 141, thereby improving the photosensitivity.

  Further, Schottky barrier diodes 172 and 172 ′ having the same configuration as in the ninth embodiment are formed in regions where the cathode diffusion regions 144 and 144 ′ are not formed in the P gate diffusion regions 143 and 143 ′. ing. Therefore, injection of minority carriers (holes) from the P gate diffusion regions 143 and 143 ′ to the N-type silicon substrate is suppressed. As a result, the amount of remaining carriers in the N-type silicon substrate is reduced, and the commutation characteristics can be further improved.

  Further, an oxygen-doped semi-insulating polycrystalline silicon film 148 doped with phosphorus is formed so as to intersect with CH1 and CH2. Therefore, when a voltage pulse is applied between the anode diffusion regions 142 and 142 ′ and the cathode diffusion regions 144 ′ and 144, it is possible to prevent a malfunction in which the bidirectional photothyristor 171 is turned on even if there is no optical signal. That is, according to the present embodiment, the dv / dt characteristics can be improved.

  As described above, according to the present embodiment, it is possible to improve the commutation characteristics and improve both the dv / dt characteristics and the photosensitivity.

Eleventh Embodiment The present embodiment relates to a bidirectional photothyristor chip having a zero cross function. FIG. 18 is an equivalent circuit diagram of an optical ignition coupler using the bidirectional photothyristor chip of the present embodiment. Similar to the bidirectional photothyristor chip 51 of the second embodiment, the bidirectional photothyristor chip 181 of the present embodiment includes a CH1 side photothyristor 182 having a PNP transistor Q1 and an NPN transistor Q2, and a PNP transistor. A CH2 side photothyristor 183 having Q3 and an NPN transistor Q4 is provided, and a short diode 184 is connected to the bases of the PNP transistors Q1 and Q3.

  An N-type FET (field effect transistor) 186 is connected in parallel with the gate resistor 185 between the base of the NPN transistor Q2 on the CH1 side and the electrode T2. Similarly, an N-type FET 188 is connected in parallel with the gate resistor 187 between the base of the CH2 side NPN transistor Q4 and the electrode T1. The gate of the N-type FET 186 is connected to the base of the PNP transistor Q1, while the gate of the N-type FET 187 is connected to the base of the PNP transistor Q3. Reference numeral 189 denotes an LED.

  Therefore, the N-type FETs 186 and 188 are off in the vicinity of the zero cross point of the power supply voltage biased between the electrodes T1 and T2, and the resistance values of the gate resistors 185 and 187 are set to the NPN transistors Q2 and Q4. When a corresponding base-emitter voltage is applied and an optical signal from the LED 189 is received, the NPN transistors Q2 and Q4 are turned on by the contribution of the photocurrent generated in the P gate diffusion region. On the other hand, since the N-type FETs 186 and 188 are turned on during the time away from the zero cross point of the power supply voltage, the bases and emitters of the NPN transistors Q2 and Q4 are short-circuited, and an optical signal from the LED 189 is received. However, the NPN transistors Q2 and Q4 cannot be turned on.

  Thus, a zero cross function for turning on the photothyristors 182 and 183 is realized only in the vicinity of the zero cross point of the power supply voltage biased between the electrodes T1 and T2. Furthermore, the bidirectional photothyristor chip 51 of the second embodiment that can improve the commutation characteristic Icom to about 100 mArms or more is used. Accordingly, it is possible to eliminate the failure of the light ignition coupler and reduce the malfunction.

  Incidentally, in the configuration of the bidirectional photothyristor chip 181 having the zero cross function shown in FIG. 18, a Schottky barrier diode is formed between the base and collector of the NPN transistors Q2 and Q4, and the Schottky barrier diode is formed. It is also possible to constitute a bidirectional photothyristor chip having a function.

  The N-type FETs 186 and 188 may be composed of other switching elements having a control terminal.

  The light ignition coupler in the eleventh embodiment uses the bidirectional photothyristor chip 51 of the second embodiment, but the first embodiment, the third embodiment to the tenth embodiment. Any one of the bidirectional photothyristor chips 31, 71, 81, 91, 120, 131, 152, 161, 171 may be used.

  19 to 21 show the bidirectional photothyristor chips 31, 51, 71, 81, 91, 120, 131, 152, 161, 171 in the first to tenth embodiments and FIGS. 23 and 24. The commutation characteristic Icom, the dv / dt characteristic, and the photosensitivity IFT are compared with the conventional bidirectional photothyristor chip 4 shown in FIG.

  FIG. 19 is a diagram showing the relationship between the photosensitivity IFT and the commutation characteristic Icom. The numbers in the figure represent the numbers of the embodiment. For example, “1” means “the first embodiment”. The conventional bidirectional photothyristor chip 4 is indicated by Δ. Table 1 shows values of photosensitivity IFT, commutation characteristics Icom, and dv / dt characteristics for each embodiment and the conventional bidirectional photothyristor chip 4.

Table 1

  As can be seen from FIG. 19, in all the embodiments, the commutation characteristic value Icom is increased as compared with the conventional bidirectional photothyristor chip 4. In all the embodiments, this is because the P1 diffusion regions 23, 43, 73, 83, 93, 113, 133, 143 on the CH1 side and the P gate diffusion regions 23 ', 43', 73 'on the CH2 side are used. , 83 ′, 93 ′, 113 ′, 133 ′, 143 ′, oxygen-doped semi-insulating polycrystalline silicon films 35 a, 57 a, 78, 88, 98, 122 a, 124, 138, 138 doped with phosphorus ', 148,156a, 156a' is formed. Accordingly, the silicon interface level (Qss) between the CH1 side P gate diffusion region and the CH2 side P gate diffusion region on the surface of the N type silicon substrate increases, and minority carriers in the N type silicon substrate increase. Can be eliminated in the region of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus, and the lifetime of the holes can be reduced. Therefore, the commutation characteristic is improved as a result.

  In the eighth and tenth embodiments, the photosensitivity value IFT is decreased. This is because the Al electrodes 146 and 146 ′ are formed in a minimum rectangular shape capable of completely covering the P gate diffusion region, the gate resistance and the anode diffusion region, and the Al electrodes 146 and 146 ′ are surrounded by phosphorus. A transparent film guard ring made of doped oxygen-doped semi-insulating polycrystalline silicon films 156a and 156a 'is formed. Therefore, the light shielding area around the Al electrodes 146 and 146 ′ can be reduced, and as a result, the photosensitivity is improved.

  FIG. 20 is a diagram showing the relationship between the photosensitivity IFT and the dv / dt characteristic. In addition, the number in a figure represents the number of embodiment. As can be seen from FIG. 20, the dv / dt characteristic value is increased in the third, fourth, fifth, sixth, eighth, ninth and tenth embodiments. This is because in the third, fourth, fifth, sixth, eighth, ninth, and tenth embodiments, phosphorus-doped oxygen-doped semi-insulating polycrystalline silicon on the N-type silicon substrate crossing the CH1 and CH2. Films 78, 88, 98, 122a, 122a ', 124, 124', 148, 156a and 156a 'are formed. Therefore, when a sudden voltage pulse is applied between the anode diffusion region and the cathode diffusion region, it is possible to suppress the displacement current from flowing into the P gate diffusion region that should originally receive an optical signal. As a result, even if there is no optical signal, there is no malfunction in which the bidirectional photothyristors 71, 81, 91, 120, 152, 161, 171 are turned on, and the dv / dt characteristics can be improved.

  FIG. 21 is a diagram showing the relationship between the commutation characteristic Icom and the dv / dt characteristic. In addition, the number in a figure represents the number of embodiment. As can be seen from FIG. 21, the commutation characteristic value Icom increases in all the embodiments, and the dv / dt characteristic value increases in the third, fourth, fifth, sixth, eighth, ninth, and tenth embodiments. doing.

Twelfth Embodiment The present embodiment relates to an SSR using a light ignition coupler composed of a bidirectional photothyristor chip and an LED according to the first to eleventh embodiments.

  FIG. 22 is an equivalent circuit diagram of the SSR. The SSR 198 includes a light ignition coupler 193 including a light emitting element 191 such as an LED and a bidirectional photothyristor 192 for ignition, a bidirectional thyristor (main thyristor) 194 for actually controlling a load, a resistor 195, And a snubber circuit 197 including a capacitor 196 and the like. Here, as the bidirectional photothyristor 192 for firing, the bidirectional photothyristor chips 31, 51, 71, 81, 91, 120, 131, 152, 161 of the first to eleventh embodiments are used. 171 and 181 are used. In the above circuit configuration, it is the main thyristor 194 that actually controls the load current, and the bidirectional photothyristor 192 is used to ignite the main thyristor 194 with light.

  In the present embodiment, as the bidirectional photothyristor 192 for firing, the bidirectional photothyristor of the first to eleventh embodiments capable of improving the commutation characteristic Icom to about 100 mArms or more. Chips 31, 51, 71, 81, 91, 120, 131, 152, 161, 171, and 181 are used. Therefore, it is possible to obtain the SSR 198 with few malfunctions using the light ignition coupler 193 that does not fail in spilling.

  Further, as the bidirectional photothyristor 192 for firing, the dv / dt characteristics of the third to sixth embodiments and the eighth to tenth embodiments are improved. If the photothyristor chips 71, 81, 91, 120, 152, 161, 171 are used, the SSR 198 with fewer malfunctions can be obtained. Furthermore, as the bidirectional photothyristor 192 for firing, the bidirectional photothyristor chips 152 and 171 in which the commutation characteristics and the photosensitivity of the eighth and tenth embodiments are improved are provided. If used, the SSR 198 with higher photosensitivity can be obtained.

It is a pattern layout diagram in the bidirectional photothyristor chip of the present invention. It is BB 'arrow sectional drawing in FIG. FIG. 2 is an equivalent circuit diagram of the bidirectional photothyristor chip shown in FIG. 1. FIG. 2 is a pattern layout diagram of a bidirectional photothyristor chip different from FIG. 1. It is CC 'arrow sectional drawing in FIG. FIG. 5 is an equivalent circuit diagram of the bidirectional photothyristor chip shown in FIG. 4. FIG. 5 is a pattern layout diagram of a bidirectional photothyristor chip different from those in FIGS. 1 and 4. FIG. 8 is a pattern layout diagram of a bidirectional photothyristor chip different from those in FIGS. 1, 4, and 7. FIG. 9 is a pattern layout diagram of a bidirectional photothyristor chip different from those in FIGS. 1, 4, 7, and 8. FIG. 10 is a pattern layout diagram of a bidirectional photothyristor chip different from those in FIGS. 1, 4, and 7 to 9. It is DD 'arrow sectional drawing in FIG. FIG. 11 is a pattern layout diagram of a bidirectional photothyristor chip different from those in FIGS. 1, 4, and 7 to 10. FIG. 13 is a pattern layout diagram of a bidirectional photothyristor chip different from those in FIGS. 1, 4, 7 to 10 and 12. It is EE 'arrow sectional drawing in FIG. FIG. 14 is a pattern layout diagram of a bidirectional photothyristor chip different from those of FIGS. 1, 4, 7 to 10, 12, and 13. FIG. 16 is an equivalent circuit diagram of the bidirectional photothyristor chip shown in FIG. 15. FIG. 16 is a pattern layout diagram of a bidirectional photothyristor chip different from those in FIGS. 1, 4, 7 to 10, 12, 13, and 15. FIG. 18 is an equivalent circuit diagram of an optical ignition coupler using a bidirectional photothyristor chip different from those in FIGS. 1, 4, 7 to 10, 12, 13, 15, and 17. It is a figure which shows the relationship between optical sensitivity IFT and the commutation characteristic Icom. It is a figure which shows the relationship between optical sensitivity IFT and dv / dt characteristic. It is a figure which shows the relationship between the commutation characteristic Icom and dv / dt characteristic. It is an equivalent circuit diagram of SSR. It is a pattern layout diagram in a conventional bidirectional photothyristor. It is AA 'arrow sectional drawing in FIG. FIG. 24 is an equivalent circuit diagram of the bidirectional photothyristor chip shown in FIG. 23. It is sectional drawing which shows the state which is turned on by light input. FIG. 6 is a cross-sectional view showing a state in which CH2 is turned on (commutation failure) without light input.

Explanation of symbols

21, 41, 111, 141 ... N-type silicon substrate,
22, 22 ', 42, 42', 72, 72 ', 82, 82', 92, 92 ', 112, 112', 132, 132 ', 142, 142' ... Anode diffusion region (P type),
23, 23 ', 43, 43', 73, 73 ', 83, 83', 93, 93 ', 113, 113', 133, 133 ', 143, 143' ... P gate diffusion region (P type),
24, 24 ', 44, 44', 74, 74 ', 84, 84', 94, 94 ', 114, 114', 134, 134 ', 144, 144' ... cathode diffusion region (N type),
25, 25 ', 45, 45', 75, 75 ', 85, 85', 95, 95 ', 115, 115', 135, 135 ', 145, 145', 185, 187 ... gate resistance,
26, 26 ', 37, 46, 46', 59, 76, 76 ', 79, 86, 86', 89, 96, 96 ', 99, 116, 116', 136, 136 ', 146, 146', 149, 165, 165 '... Al electrode,
29, 50, 80, 101 ... channel separation region,
30, 49, 119, 151 ... N + layer,
31, 51, 71, 81, 91, 120, 131, 152, 161, 171, 181, 192 ... Bidirectional photothyristor chip,
32,52,162,182 ... CH1 photothyristor,
33,53,163,183 ... CH2 photothyristor,
34, 56, 56 ', 121, 155 ... SiO ₂ film,
35, 57, 57 ', 122, 156 ... oxygen-doped semi-insulating polycrystalline silicon film,
35a, 57a, 57a ', 78, 88, 98, 122a, 122a', 124, 124 ', 138, 138', 148, 156a, 156a '... Phosphorus / oxygen-doped semi-insulating polycrystalline silicon film,
36, 58, 58 ', 123, 157, 158 ... SiN film,
38,48,118,159 ... Al guard ring,
39, 61 ... holes,
54 ... P-type diffusion region,
55, 55 '... N-type diffusion region,
60, 90, 100, 184, 150 ... short diode,
166, 166 ', 172, 172' ... Schottky barrier diode,
186,188 ... N-type FET,
189,191 ... LED,
193: Light ignition coupler,
194 ... Main thyristor,
197 ... snubber circuit,
198 ... SSR.

Claims (20)

On the surface of the first conductivity type substrate,
A pair of photons including a first diffusion layer of the second conductivity type, a second diffusion layer of the second conductivity type, and a third diffusion layer of the first conductivity type formed in the second diffusion layer. A bidirectional photothyristor chip that is one semiconductor chip provided with a thyristor section,
One of the pair of photothyristor portions is disposed on one side of the semiconductor chip, while the other is disposed on the other side of the semiconductor chip,
The first diffusion layer constituting the one photothyristor portion is opposed to the second diffusion layer and the third diffusion layer constituting the other photothyristor portion,
The first diffusion layer constituting the other photothyristor part faces the second diffusion layer and the third diffusion layer constituting the one photothyristor part,
Two channels generated between the pair of photothyristor parts are parallel without crossing each other,
A bidirectional photothyristor chip comprising a carrier movement suppression region which is formed between the two second diffusion layers constituting the pair of photothyristor portions on the substrate and suppresses carrier movement. . The bidirectional photothyristor chip according to claim 1,
The carrier movement suppression region includes an oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus,
The bidirectional photothyristor chip, wherein the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus is electrically connected to the substrate by an Al electrode. The bidirectional photothyristor chip according to claim 2,
The bidirectional photothyristor chip, wherein the carrier movement suppression region further includes a short diode formed on the surface of the substrate. The bidirectional photothyristor chip according to claim 3,
The short diode has an outer diameter smaller than the outer diameter of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus, and one end thereof is electrically connected to the substrate through the Al electrode. Bidirectional photothyristor chip characterized by The bidirectional photothyristor chip according to claim 1,
The distance between the first electrode electrically connected to the first diffusion layer and the carrier movement suppression region and the distance between the second electrode electrically connected to the third diffusion layer and the carrier movement suppression region A bidirectional photothyristor chip characterized in that the narrower one of them is at least 30 μm. The bidirectional photothyristor chip according to claim 2,
The bidirectional photothyristor chip, wherein the carrier movement suppression region is formed so as not to intersect each channel between the two channels. The bidirectional photothyristor chip according to claim 2,
The bidirectional photothyristor chip, wherein the carrier movement suppression region intersects each of the two channels. The bidirectional photothyristor chip according to claim 7,
The distance between the first electrode electrically connected to the first diffusion layer and the carrier movement suppression region and the distance between the second electrode electrically connected to the third diffusion layer and the carrier movement suppression region A bidirectional photothyristor chip characterized in that the narrower one of them is at least 30 μm. The bidirectional photothyristor chip according to claim 3,
The bidirectional photothyristor chip, wherein the carrier movement suppression region intersects each of the two channels. The bidirectional photothyristor chip according to claim 9,
The distance between the first electrode electrically connected to the first diffusion layer and the carrier movement suppression region and the distance between the second electrode electrically connected to the third diffusion layer and the carrier movement suppression region A bidirectional photothyristor chip characterized in that the narrower one of them is at least 30 μm. The bidirectional photothyristor chip according to claim 9,
The short diode has an outer diameter smaller than the outer diameter of the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus, and one end thereof is electrically connected to the substrate through the Al electrode. Bidirectional photothyristor chip characterized by On the surface of the first conductivity type substrate,
A pair of photons including a first diffusion layer of the second conductivity type, a second diffusion layer of the second conductivity type, and a third diffusion layer of the first conductivity type formed in the second diffusion layer. A bidirectional photothyristor chip that is one semiconductor chip provided with a thyristor section,
One of the pair of photothyristor portions is disposed on one side of the semiconductor chip, while the other is disposed on the other side of the semiconductor chip,
The first diffusion layer constituting the one photothyristor portion is opposed to the second diffusion layer and the third diffusion layer constituting the other photothyristor portion,
The first diffusion layer constituting the other photothyristor part faces the second diffusion layer and the third diffusion layer constituting the one photothyristor part,
Two channels generated between the pair of photothyristor parts are parallel without crossing each other,
The two second diffusion layers on the substrate and in the vicinity of the junction between the two first diffusion layers and the substrate constituting the pair of photothyristor portions and the pair of photothyristor portions. And an oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus, which is formed in the vicinity of the junction between the substrate and the substrate and intersects with the channel and suppresses carrier movement. Thyristor chip. The bidirectional photothyristor chip according to claim 12,
An Al guard ring formed by Al intersecting each of the two channels and electrically connected to the substrate is provided between the two photothyristor portions forming the pair.
A bidirectional photothyristor chip, wherein a distance between the oxygen-doped semi-insulating polycrystalline silicon film doped with each phosphorus and the Al guard ring is at least 30 μm. On the surface of the first conductivity type substrate,
A pair of photons including a first diffusion layer of the second conductivity type, a second diffusion layer of the second conductivity type, and a third diffusion layer of the first conductivity type formed in the second diffusion layer. A bidirectional photothyristor chip that is one semiconductor chip provided with a thyristor section,
One of the pair of photothyristor portions is disposed on one side of the semiconductor chip, while the other is disposed on the other side of the semiconductor chip,
The first diffusion layer constituting the one photothyristor portion is opposed to the second diffusion layer and the third diffusion layer constituting the other photothyristor portion,
The first diffusion layer constituting the other photothyristor part faces the second diffusion layer and the third diffusion layer constituting the one photothyristor part,
Two channels generated between the pair of photothyristor parts are parallel without crossing each other,
Between the two second diffusion layers constituting the pair of photothyristor portions on the substrate and in the vicinity of the junction between the two second diffusion layers and the substrate, the two A bidirectional photothyristor chip comprising an oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus that suppresses carrier movement and is formed so as not to intersect each channel between channels. The bidirectional photothyristor chip according to claim 14,
A distance between the first electrode electrically connected to the first diffusion layer and the oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus, and a second electrode electrically connected to the third diffusion layer; Among the intervals between the phosphorus-doped oxygen-doped semi-insulating polycrystalline silicon film, the narrower interval is at least 30 μm,
The bidirectional photothyristor chip, characterized in that an interval between the two phosphorus-doped oxygen-doped semi-insulating polycrystalline silicon films is at least 30 μm. The bidirectional photothyristor chip according to any one of claims 1, 12, and 14,
On the substrate, each of the paired photothyristor portions includes the vicinity of the junction between the first diffusion layer and the substrate and the vicinity of the junction between the second diffusion layer and the substrate, and the first diffusion. A bidirectional photothyristor chip, wherein a transparent guard ring made of an oxygen-doped semi-insulating polycrystalline silicon film doped with phosphorus is formed in an annular region surrounding the layer and the second diffusion layer. The bidirectional photothyristor chip according to any one of claims 1, 12, and 14,
A bidirectional photothyristor chip comprising a Schottky barrier diode formed between a second diffusion layer constituting each photothyristor section and a substrate. The bidirectional photothyristor chip according to any one of claims 1, 12, and 14,
The first conductivity type is either N type or P type,
The second conductivity type is the other of N type and P type,
In each of the photothyristor sections, a gate resistance and a gate resistance are provided between the third diffusion region and the second diffusion region and the substrate or between the base and emitter electrodes of the NPN transistor including the first diffusion region, the substrate and the second diffusion region. Connect the switching element in parallel,
The bidirectional photo, wherein a control terminal of the switching element is connected to a base of a PNP transistor comprising the third diffusion region and the second diffusion region and the substrate or the first diffusion region, the substrate and the second diffusion region. Thyristor chip. An optical ignition coupler comprising the bidirectional photothyristor chip according to any one of claims 1, 12, and 14, and a light emitting diode. 20. A solid state relay comprising the light ignition coupler according to claim 19 and a snubber circuit.

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