CN100424635C - 验证将加载作业的推测结果连结到缓存器值的存储档案的系统及方法 - Google Patents
验证将加载作业的推测结果连结到缓存器值的存储档案的系统及方法 Download PDFInfo
- Publication number
- CN100424635C CN100424635C CNB2004800429401A CN200480042940A CN100424635C CN 100424635 C CN100424635 C CN 100424635C CN B2004800429401 A CNB2004800429401 A CN B2004800429401A CN 200480042940 A CN200480042940 A CN 200480042940A CN 100424635 C CN100424635 C CN 100424635C
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- China
- Prior art keywords
- load
- store
- speculative
- register
- data
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3842—Speculative instruction execution
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
- G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
- G06F9/383—Operand prefetching
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
- G06F9/383—Operand prefetching
- G06F9/3832—Value prediction for operands; operand history buffers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
- G06F9/3834—Maintaining memory consistency
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
- G06F9/384—Register renaming
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/839,474 US7263600B2 (en) | 2004-05-05 | 2004-05-05 | System and method for validating a memory file that links speculative results of load operations to register values |
| US10/839,474 | 2004-05-05 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1954290A CN1954290A (zh) | 2007-04-25 |
| CN100424635C true CN100424635C (zh) | 2008-10-08 |
Family
ID=34959784
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004800429401A Expired - Lifetime CN100424635C (zh) | 2004-05-05 | 2004-12-17 | 验证将加载作业的推测结果连结到缓存器值的存储档案的系统及方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7263600B2 (https=) |
| JP (1) | JP2007536626A (https=) |
| CN (1) | CN100424635C (https=) |
| DE (1) | DE112004002848B4 (https=) |
| GB (1) | GB2429557B (https=) |
| TW (1) | TWI362613B (https=) |
| WO (1) | WO2005111794A1 (https=) |
Families Citing this family (45)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US7571304B2 (en) * | 2005-03-18 | 2009-08-04 | Sun Microsystems, Inc. | Generation of multiple checkpoints in a processor that supports speculative execution |
| US7376817B2 (en) * | 2005-08-10 | 2008-05-20 | P.A. Semi, Inc. | Partial load/store forward prediction |
| US20080010440A1 (en) * | 2006-07-05 | 2008-01-10 | International Business Machines Corporation | Means for supporting and tracking a large number of in-flight stores in an out-of-order processor |
| US20080010441A1 (en) * | 2006-07-05 | 2008-01-10 | International Business Machines Corporation | Means for supporting and tracking a large number of in-flight loads in an out-of-order processor |
| US7624253B2 (en) * | 2006-10-25 | 2009-11-24 | Arm Limited | Determining register availability for register renaming |
| US20080162889A1 (en) * | 2007-01-03 | 2008-07-03 | International Business Machines Corporation | Method and apparatus for implementing efficient data dependence tracking for multiprocessor architectures |
| US7689812B2 (en) * | 2007-02-14 | 2010-03-30 | International Business Machines Corporation | Method and system for restoring register mapper states for an out-of-order microprocessor |
| US9069672B2 (en) * | 2009-06-12 | 2015-06-30 | Intel Corporation | Extended fast memory access in a multiprocessor computer system |
| US8521992B2 (en) * | 2009-12-22 | 2013-08-27 | International Business Machines Corporation | Predicting and avoiding operand-store-compare hazards in out-of-order microprocessors |
| US8468325B2 (en) | 2009-12-22 | 2013-06-18 | International Business Machines Corporation | Predicting and avoiding operand-store-compare hazards in out-of-order microprocessors |
| US9135014B2 (en) * | 2012-02-15 | 2015-09-15 | Freescale Semiconductor, Inc | Data processing system with latency tolerance execution |
| US9996348B2 (en) * | 2012-06-14 | 2018-06-12 | Apple Inc. | Zero cycle load |
| US9436476B2 (en) | 2013-03-15 | 2016-09-06 | Soft Machines Inc. | Method and apparatus for sorting elements in hardware structures |
| US10467010B2 (en) * | 2013-03-15 | 2019-11-05 | Intel Corporation | Method and apparatus for nearest potential store tagging |
| US10152327B2 (en) | 2013-03-15 | 2018-12-11 | Intel Corporation | Apparatus for gating a load operation based on entries of a prediction table |
| US9471480B2 (en) | 2013-12-02 | 2016-10-18 | The Regents Of The University Of Michigan | Data processing apparatus with memory rename table for mapping memory addresses to registers |
| GB2518022B (en) * | 2014-01-17 | 2015-09-23 | Imagination Tech Ltd | Stack saved variable value prediction |
| US11068271B2 (en) | 2014-07-28 | 2021-07-20 | Apple Inc. | Zero cycle move using free list counts |
| GB2532232A (en) * | 2014-11-12 | 2016-05-18 | Ibm | Verifying a graph-based coherency verification tool |
| US9575897B2 (en) | 2015-07-09 | 2017-02-21 | Centipede Semi Ltd. | Processor with efficient processing of recurring load instructions from nearby memory addresses |
| US20170010973A1 (en) * | 2015-07-09 | 2017-01-12 | Centipede Semi Ltd. | Processor with efficient processing of load-store instruction pairs |
| CN107710153B (zh) * | 2015-07-09 | 2022-03-01 | 森蒂彼得塞米有限公司 | 具有有效的存储器访问的处理器 |
| US10185561B2 (en) * | 2015-07-09 | 2019-01-22 | Centipede Semi Ltd. | Processor with efficient memory access |
| US10331357B2 (en) * | 2016-08-19 | 2019-06-25 | Advanced Micro Devices, Inc. | Tracking stores and loads by bypassing load store units |
| US10908911B2 (en) | 2017-08-18 | 2021-02-02 | International Business Machines Corporation | Predicting and storing a predicted target address in a plurality of selected locations |
| US10884747B2 (en) | 2017-08-18 | 2021-01-05 | International Business Machines Corporation | Prediction of an affiliated register |
| US11150908B2 (en) | 2017-08-18 | 2021-10-19 | International Business Machines Corporation | Dynamic fusion of derived value creation and prediction of derived values in a subroutine branch sequence |
| US10534609B2 (en) | 2017-08-18 | 2020-01-14 | International Business Machines Corporation | Code-specific affiliated register prediction |
| US10719328B2 (en) | 2017-08-18 | 2020-07-21 | International Business Machines Corporation | Determining and predicting derived values used in register-indirect branching |
| US10884745B2 (en) | 2017-08-18 | 2021-01-05 | International Business Machines Corporation | Providing a predicted target address to multiple locations based on detecting an affiliated relationship |
| US10884746B2 (en) | 2017-08-18 | 2021-01-05 | International Business Machines Corporation | Determining and predicting affiliated registers based on dynamic runtime control flow analysis |
| US11150904B2 (en) | 2017-08-18 | 2021-10-19 | International Business Machines Corporation | Concurrent prediction of branch addresses and update of register contents |
| US10705973B2 (en) | 2017-09-19 | 2020-07-07 | International Business Machines Corporation | Initializing a data structure for use in predicting table of contents pointer values |
| US10620955B2 (en) | 2017-09-19 | 2020-04-14 | International Business Machines Corporation | Predicting a table of contents pointer value responsive to branching to a subroutine |
| US11061575B2 (en) | 2017-09-19 | 2021-07-13 | International Business Machines Corporation | Read-only table of contents register |
| US10896030B2 (en) | 2017-09-19 | 2021-01-19 | International Business Machines Corporation | Code generation relating to providing table of contents pointer values |
| US10725918B2 (en) | 2017-09-19 | 2020-07-28 | International Business Machines Corporation | Table of contents cache entry having a pointer for a range of addresses |
| US10884929B2 (en) | 2017-09-19 | 2021-01-05 | International Business Machines Corporation | Set table of contents (TOC) register instruction |
| US10713050B2 (en) | 2017-09-19 | 2020-07-14 | International Business Machines Corporation | Replacing Table of Contents (TOC)-setting instructions in code with TOC predicting instructions |
| US10620961B2 (en) * | 2018-03-30 | 2020-04-14 | Intel Corporation | Apparatus and method for speculative conditional move operation |
| US11334485B2 (en) * | 2018-12-14 | 2022-05-17 | Eta Scale Ab | System and method for dynamic enforcement of store atomicity |
| US11061683B2 (en) * | 2019-06-13 | 2021-07-13 | Microsoft Technology Licensing, Llc | Limiting replay of load-based control independent (CI) instructions in speculative misprediction recovery in a processor |
| US11200062B2 (en) | 2019-08-26 | 2021-12-14 | Apple Inc. | History file for previous register mapping storage and last reference indication |
| US11416254B2 (en) | 2019-12-05 | 2022-08-16 | Apple Inc. | Zero cycle load bypass in a decode group |
| US11392387B2 (en) | 2020-11-04 | 2022-07-19 | Microsoft Technology Licensing, Llc | Predicting load-based control independent (CI) register data independent (DI) (CIRDI) instructions as CI memory data dependent (DD) (CIMDD) instructions for replay in speculative misprediction recovery in a processor |
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| CN1136182A (zh) * | 1995-01-24 | 1996-11-20 | 国际商业机器公司 | 对推测性指令中例外情况的处理 |
| US5751983A (en) * | 1995-10-03 | 1998-05-12 | Abramson; Jeffrey M. | Out-of-order processor with a memory subsystem which handles speculatively dispatched load operations |
| US6065103A (en) * | 1997-12-16 | 2000-05-16 | Advanced Micro Devices, Inc. | Speculative store buffer |
| WO2003093982A1 (en) * | 2002-04-30 | 2003-11-13 | Advanced Micro Devices, Inc. | System and method for linking speculative results of load operations to register values |
| US6662280B1 (en) * | 1999-11-10 | 2003-12-09 | Advanced Micro Devices, Inc. | Store buffer which forwards data based on index and optional way match |
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| DE10121792C2 (de) * | 2000-05-26 | 2003-09-25 | Ibm | Universelle Ladeadresse/Wertevorhersageschema |
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-
2004
- 2004-05-05 US US10/839,474 patent/US7263600B2/en not_active Expired - Lifetime
- 2004-12-17 CN CNB2004800429401A patent/CN100424635C/zh not_active Expired - Lifetime
- 2004-12-17 WO PCT/US2004/042683 patent/WO2005111794A1/en not_active Ceased
- 2004-12-17 JP JP2007511351A patent/JP2007536626A/ja active Pending
- 2004-12-17 DE DE112004002848T patent/DE112004002848B4/de not_active Expired - Lifetime
- 2004-12-17 GB GB0622878A patent/GB2429557B/en not_active Expired - Fee Related
-
2005
- 2005-05-03 TW TW094114201A patent/TWI362613B/zh not_active IP Right Cessation
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1136182A (zh) * | 1995-01-24 | 1996-11-20 | 国际商业机器公司 | 对推测性指令中例外情况的处理 |
| US5751983A (en) * | 1995-10-03 | 1998-05-12 | Abramson; Jeffrey M. | Out-of-order processor with a memory subsystem which handles speculatively dispatched load operations |
| US6065103A (en) * | 1997-12-16 | 2000-05-16 | Advanced Micro Devices, Inc. | Speculative store buffer |
| US6662280B1 (en) * | 1999-11-10 | 2003-12-09 | Advanced Micro Devices, Inc. | Store buffer which forwards data based on index and optional way match |
| WO2003093982A1 (en) * | 2002-04-30 | 2003-11-13 | Advanced Micro Devices, Inc. | System and method for linking speculative results of load operations to register values |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI362613B (en) | 2012-04-21 |
| US7263600B2 (en) | 2007-08-28 |
| GB2429557B (en) | 2007-09-05 |
| CN1954290A (zh) | 2007-04-25 |
| WO2005111794A1 (en) | 2005-11-24 |
| GB0622878D0 (en) | 2006-12-27 |
| DE112004002848B4 (de) | 2010-06-17 |
| GB2429557A (en) | 2007-02-28 |
| JP2007536626A (ja) | 2007-12-13 |
| TW200606709A (en) | 2006-02-16 |
| US20050247774A1 (en) | 2005-11-10 |
| DE112004002848T5 (de) | 2007-04-05 |
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| CX01 | Expiry of patent term |
Granted publication date: 20081008 |
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| CX01 | Expiry of patent term |