CN100382243C - Control method for raising consistence of silicon epitaxial resistivity - Google Patents
Control method for raising consistence of silicon epitaxial resistivity Download PDFInfo
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- CN100382243C CN100382243C CNB2006100143053A CN200610014305A CN100382243C CN 100382243 C CN100382243 C CN 100382243C CN B2006100143053 A CNB2006100143053 A CN B2006100143053A CN 200610014305 A CN200610014305 A CN 200610014305A CN 100382243 C CN100382243 C CN 100382243C
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Abstract
The present invention relates to a control method for improving the epitaxial resistivity consistence of P-type silicon. The present invention has the steps that (1) after a silicon wafer is polished and cleaned, back seal is carried out for the silicon wafer, namely that the silicon wafer is soaked in pure water with hydrogen peroxide or ozone; a clean oxidizing layer is generated on the surface of the silicon wafer; (2) before epitaxial operation, gas-expelling temperature rises to 80 DEG C to 120 DEG C; the flow speed of gas is quickly changed; four to twelve cycles are changed repeatedly so the impurity concentration in a stagnant layer is lowered by three to six magnitude orders; (3) after gas is expelled by speed change, temperature immediately drops to growth temperature; an intrinsic layer grows; the positive surface and the side surface of a graphite base substrate, and the contact edge of graphite are fully sealed; (4) gas expelling by temperature change is carried out in three to six cycles; (5) according to required doping concentration, an epitaxial system is doped in advance; doping gas is introduced in the epitaxial system for 0.5 minutes to 3 minutes; therefore, the impurity concentration of the epitaxial system is saturated. By the preprocessing of the epitaxial system and the preparation of the surface intrinsic layer, the method realizes the control of the concentration of the doping impurity, and effectively prevents autodoping effect.
Description
Technical field
The invention belongs to the growth technique method of silicon epitaxy, relate in particular to the conforming control method of a kind of raising P type silicon epitaxial resistivity.
Background technology
Silicon epitaxial material has not only solved the affected layer problem of silicon single crystal flake well, can obtain one and be tending towards perfect surface, can also solve the insurmountable problem of many silicon single crystal flakes.As improved integrated level, minority carrier life time, circuit speed, and reduce the soft error of cell leakage current, α particle, improve the power characteristic and the frequency characteristic of circuit.Along with speed and the integrated level of IC further improves, harsh more requirement has just been proposed for the quality and the performance of silicon epitaxial wafer.When on the heavy doping substrate, carrying out epitaxial growth, resistivity vertically, radial distribution uniformity consistency and controllability variation thereof.The main cause that produces is an auto-doping phenomenon, it makes the epilayer resistance rate parameter that departs from objectives, increase unevenness, show as intuitively in the stove between the sheet and sheet and inhomogeneous with resistivity in a slice, in the gradual impurity transition region that forms at the interface than broad, it can cause buried regions pattern drifting and P-N knot to pass to epitaxial loayer, when serious even form the transoid interlayer, cause the device deviation characteristic, reliability reduces, and hampers the raising of bipolar integrated circuit speed and microwave device frequency.
When the substrate of heavy doping (B) carried out epitaxial growth, auto-doping phenomenon was serious, thereby the resistivity consistency is difficult to control, the following measure of external at present employing:
1. reduced pressure epitaxy also can effectively reduce autodoping effect, but its shortcoming is that defectives such as higher dislocation and fault are arranged, and for the P/P+ extension of boron-doping, and the autodoping of boron reduces with pressure and increases, and has so just limited the practicality of low pressure extension.
2.IBM company adopts low pressure normal pressure dual system, and carry out low pressure and catch up with gas, the normal pressure growth, system complex like this, it is very inconvenient to grow.
3. substrate back carries out polysilicon sealing or SiN sealing, restrains the effusion of substrate back impurity.Owing to technologic reason, domestic seldom the employing carried on the back mounting, but adopts the back of the body to inhale technology.
4. secondary epitaxy growth method, promptly thin epitaxial loayer of growth one deck on substrate earlier covers substrate by it, continue evaporation to stop impurity from substrate, but this skim itself has serious autodoping, and technology is very complicated.
5. when growing lightly-doped layer on heavily doped boron substrate, the suitable certain density HCl of admixture can eliminate the autodoping of boron to a certain extent in the atmosphere.This may be volatilizedly because HCl is easy to form boron-chlorine compound with boron reaction to fall, but can reduce epitaxially grown speed like this.
6. improve the prebake temperature, strengthen gas flow rate etc.,, can prolong process cycle, increase cost though can improve autodoping.
Summary of the invention
The objective of the invention is to overcome above-mentioned weak point, for solving P type silicon epitaxy because the technical problem of the resistivity consistency difference that autodoping causes provides a kind of raising P type silicon epitaxial resistivity conforming control method.
Implementation of the present invention is as follows for achieving the above object:
The conforming control method of a kind of raising P type silicon epitaxial resistivity, implementation step is:
(1) silicon wafer polishing is carried on the back envelope after cleaning, and promptly is soaked in the pure water that contains hydrogen peroxide or ozone, makes silicon chip surface generate clean oxide layer;
(2) raising catches up with the temperature degree to make it than the high 80-120 of growing epitaxial silicon temperature ℃ before the extension, change gas flow rate, the 0.05-1.2 of gas flow rate doubly when making gas flow rate be controlled at growing epitaxial silicon, change 4-12 cycle repeatedly, each cycle is 10-30s, makes the impurity concentration in the detention layer reduce 3-6 the order of magnitude; The setting in cycle is to keep initial setting by temperature, and promptly alternating temperature is meant and is different from epitaxial growth temperature, and speed change is meant that gas flow rate is two values, a low height, and alternate, the 0.05-1.2 of gas flow rate was doubly when the flow velocity span was growing epitaxial silicon;
(3) after alternating temperature, speed change are caught up with gas, be cooled to growth temperature immediately,, all seal with graphite base and substrate front with the graphite engagement edge at silicon chip and graphite base superficial growth intrinsic layer;
(4) alternating temperature, the speed change of carrying out step (a 2) described 3-6 cycle again caught up with gas;
(5) by required doping content epitaxial system is mixed in advance, in epitaxial system, feed impurity gas 0.5-3min, make the impurity concentration in the epitaxial system reach consistent with required doping content.
The clean oxide layer that described silicon chip surface generates is 3-5nm.
Described hydrogen peroxide content is 0.1-1%.
The feeding amount of described ozone is 50-150ml/min, ventilation 10-15min.
The thickness of described growth intrinsic layer is 0.1-0.5 μ m.
Promptly feed impurity gas before the described beginning epitaxial growth, make impurity concentration in the epitaxial system reach the predetermined dopant concentration of epitaxial loayer to epitaxial system.
Beneficial effect of the present invention and advantage are:
This method is according to the process characteristic of CMP polished silicon slice extension, the utilization temperature-speed-changing catches up with the gas method at first epitaxial device to be carried out preliminary treatment, then after speed change is caught up with gas at silicon substrate superficial growth intrinsic layer, guarantee that the impurity in substrate and the environment is closed, can in epitaxial process, not spread to epitaxial loayer, earlier logical impurity gas makes the impurity concentration in the epitaxial system reach consistent or close with the impurity concentration of setting before beginning at last to grow, guarantee that the impurity concentration in the epitaxial process is constant, by carrying out epitaxial growth again behind the three step pretreatment process, can make doping impurity even, obtain the P type epitaxial silicon chip of resistivity unanimity.By to the preliminary treatment of epitaxial system and the preparation of surperficial intrinsic layer, realize the control of impurity concentration, effectively avoided the generation of autodoping effect, technology is simple and compatible mutually with original technology.This method is simple to operate, and cost is low, efficient is high, pollution-free, can obviously improve device performance, improves rate of finished products.
Embodiment
Below in conjunction with preferred embodiment, to details are as follows according to embodiment provided by the invention:
Silicon chip back of the body envelope: silicon wafer polishing is soaked in 1-3min in the pure water after cleaning, and to hydrogen peroxide that wherein adds 0.1-1% or feeding ozone 50-150ml/min, ventilation 10-15min makes silicon chip surface generate the clean oxide layer of 3-5nm.Can realize sealing, make that the impurity in the heavy doping substrate can not volatilize in the epitaxial process of postorder in epitaxial loayer the silicon chip back side and side.
The preliminary treatment of epitaxial system: catch up with the gas method to eliminate the substrate impurity that remains in the detention layer by temperature-speed-changing, obtain clean epitaxial system.Because absorption is exothermic process, improve before the extension and catch up with 80-120 ℃ of temperature degree, the outdiffusion of absorption impurity increases by one makes adsorbance reduce with index more than the order of magnitude, but the desorption quantity index increases.Detention layer thickness by the stagnant-film model derivation
, υ is a gas flow rate, promptly when flow velocity increases, and the corresponding attenuate of thickness, when flow velocity reduced, detention layer is corresponding to be thickened, and changes rapidly as flow velocity, then caused the also corresponding rapid change of detention layer thickness, and the detention layer of relative like this " static " becomes dynamically.Change 4-8 cycle so repeatedly, each cycle is 10-30s, and then the impurity concentration in the detention layer reduces 3-6 the order of magnitude; the impurity that is adsorbed on the surface is rapidly by desorb; and in time take out of outside the reative cell, and the position that was adsorbed is originally replaced by harmless protective gas hydrogen.
Growth intrinsic layer: for evaporating again in the dorsal part, the front that prevent substrate, after the high temperature speed change is caught up with gas, be cooled to growth temperature immediately, growth 0.1-0.5 μ m intrinsic layer, with graphite base substrate front and totally-enclosed with the graphite engagement edge, to carry out again 3-6 cycle subsequently, each cycle is 10-30s, basically do not overflow again, eliminate the substrate impurity that remains in the detention layer with being effective.Make the outdiffusion coefficient of substrate impurity reduce an order of magnitude, the thin intrinsic layer of this layer is subjected to the influence of autodoping effect very little, and in addition, the effect of this thin intrinsic layer also has the autodoping that compensation back normal epitaxially grown substrate solid-state diffusion of one step causes.
The control of growth atmosphere: before the beginning epitaxial growth, by required doping content epitaxial system is mixed in advance, in epitaxial system, feed impurity gas 0.5-3min, impurity concentration in the epitaxial system is reached capacity begin growth again after stable, keep constant to guarantee the impurity concentration in the epitaxial process.
Embodiment 1
1, the silicon chip after the polished and cleaned is put into the pure water that adds 1% hydrogen peroxide, places 3 minutes, and the surface generates the clean oxide layer of 5nm;
2, silicon chip is put into epitaxial furnace, by the logical successively nitrogen of traditional handicraft, hydrogen, carry out the original position polishing with high-purity hydrogen chloride again, be warming up to 1220 degree, catch up with gas 4 times with nitrogen unsteady flow amount, each 30s, big flow is the normal growth ventilation flow rate, low discharge is 1/10 of a normal growth ventilation flow rate, makes the impurity concentration in the detention layer reduce 3-6 the order of magnitude;
3, be cooled to 1100 degree, logical silicon source gas grown silicon intrinsic layer, thickness is 0.5 μ m;
4, catch up with gas 4 times with nitrogen unsteady flow amount, each 30s, big flow is the normal growth ventilation flow rate, low discharge is 1/10 of a normal growth ventilation flow rate;
5, by required doping content epitaxial system is mixed in advance, in epitaxial system, feed impurity gas 0.5-3min, make the impurity concentration in the epitaxial system consistent with required doping content;
6, carry out growing epitaxial silicon.
The resistivity homogeneity is 4.36% in the sheet, and interface resistance rate consistency is 2.23%.
Experimental results show that: the unsteady flow amount catches up with the gas method to improve the resistivity consistency effectively.
Embodiment 2
1, the silicon chip after the polished and cleaned is put into the pure water that adds 0.5% hydrogen peroxide, places 3 minutes, and the surface generates the clean oxide layer of 3nm.
2, silicon chip is put into epitaxial furnace, by the logical successively nitrogen of traditional handicraft, hydrogen, carries out the original position polishing with high-purity hydrogen chloride again, be warming up to 1230 degree, catch up with gas 10 times, each 20s with nitrogen unsteady flow amount, big flow is the normal growth ventilation flow rate, and low discharge is 1/10 of a normal growth ventilation flow rate.
3, be cooled to 1150 degree, logical silicon source gas grown silicon intrinsic layer, thickness is 0.3 μ m.
4, catch up with gas 6 times with nitrogen unsteady flow amount, each 20s, big flow is the normal growth ventilation flow rate, low discharge is 1/10 of a normal growth ventilation flow rate.
5, by required doping content epitaxial system is mixed in advance, in epitaxial system, feed impurity gas 0.5-3min, make the impurity concentration in the epitaxial system consistent with required doping content;
6, carry out growing epitaxial silicon.
Embodiment 3
1, silicon wafer polishing is soaked in 3min in the pure water that contains ozone after cleaning, and the feeding amount of ozone is 50-150ml/min, and ventilation 10-15min makes silicon chip surface generate the clean oxide layer of 4nm;
2, silicon chip is put into epitaxial furnace, by the logical successively nitrogen of traditional handicraft, hydrogen, carry out the original position polishing with high-purity hydrogen chloride again, be warming up to 1250 degree, catch up with gas 6 times with nitrogen unsteady flow amount, each 15s, big flow is the normal growth ventilation flow rate, low discharge is 1/10 of a normal growth ventilation flow rate, makes the impurity concentration in the detention layer reduce 3-6 the order of magnitude;
3, be cooled to 1160 degree, logical silicon source gas grown silicon intrinsic layer, thickness is 0.2 μ m, all seals with graphite base substrate front with the graphite engagement edge;
4, catch up with gas 3 times with nitrogen unsteady flow amount, each 30s, big flow is the normal growth ventilation flow rate, low discharge is 1/10 of a normal growth ventilation flow rate;
5, by required doping content epitaxial system is mixed in advance, in epitaxial system, feed impurity gas 0.5-3min, make the impurity concentration in the epitaxial system consistent with required doping content;
6, carry out growing epitaxial silicon.
Above-mentioned detailed description of the conforming control method of raising P type silicon epitaxial resistivity being carried out with reference to embodiment; be illustrative rather than determinate; can list several embodiment according to institute's limited range; therefore in the variation and the modification that do not break away under the general plotting of the present invention, should belong within protection scope of the present invention.
Claims (6)
1. one kind is improved the conforming control method of P type silicon epitaxial resistivity, and implementation step is:
(1) silicon wafer polishing is carried on the back envelope after cleaning, and promptly is soaked in the pure water that contains hydrogen peroxide or ozone, makes silicon chip surface generate clean oxide layer;
(2) raising catches up with the temperature degree to make it than the high 80-120 of growing epitaxial silicon temperature ℃ before the extension, change gas flow rate, the 0.05-1.2 of gas flow rate doubly when making gas flow rate be controlled at growing epitaxial silicon, change 4-12 cycle repeatedly, each cycle is 10-30s, makes the impurity concentration in the detention layer reduce 3-6 the order of magnitude; The setting in cycle is to keep initial setting by temperature, and promptly alternating temperature is meant and is different from epitaxial growth temperature, and speed change is meant that gas flow rate is two values, a low height, and alternate, the 0.05-1.2 of gas flow rate was doubly when the flow velocity span was growing epitaxial silicon;
(3) after alternating temperature, speed change are caught up with gas, be cooled to growth temperature immediately,, all seal with graphite base and substrate front with the graphite engagement edge at silicon chip and graphite base superficial growth intrinsic layer;
(4) alternating temperature, the speed change of carrying out step (a 2) described 3-6 cycle again caught up with gas;
(5) by required doping content epitaxial system is mixed in advance, in epitaxial system, feed impurity gas 0.5-3min, make the impurity concentration in the epitaxial system reach consistent with required doping content.
2. the conforming control method of raising P type silicon epitaxial resistivity according to claim 1 is characterized in that: the clean oxide layer that described silicon chip surface generates is 3-5nm.
3. the conforming control method of raising P type silicon epitaxial resistivity according to claim 1, it is characterized in that: described hydrogen peroxide content is 0.1-1%.
4. the conforming control method of raising P type silicon epitaxial resistivity according to claim 1, it is characterized in that: the feeding amount of described ozone is 50-150ml/min, ventilation 10-15min.
5. the conforming control method of raising P type silicon epitaxial resistivity according to claim 1, it is characterized in that: the thickness of described growth intrinsic layer is 0.1-0.5 μ m.
6. the conforming control method of raising P type silicon epitaxial resistivity according to claim 1, it is characterized in that: promptly feed impurity gas before the described beginning epitaxial growth, make impurity concentration in the epitaxial system reach the predetermined dopant concentration of epitaxial loayer to epitaxial system.
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| CN101752213B (en) * | 2008-12-08 | 2011-09-07 | 北京有色金属研究总院 | Low temperature heat-treatment process for eliminating water mist on silicon chip surface |
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| CN102290337B (en) * | 2011-09-26 | 2013-04-03 | 南京国盛电子有限公司 | Manufacturing method for silicon epitaxial wafer of low-voltage TVS (transient voltage suppressor) |
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| CN103854970B (en) * | 2012-12-04 | 2018-05-01 | 中芯国际集成电路制造(上海)有限公司 | Membrane deposition method and semiconductor devices |
| CN104241450B (en) * | 2014-09-29 | 2016-08-17 | 白茹 | A kind of diffusion method of crystal silicon solar energy battery |
| CN107305839B (en) * | 2016-04-18 | 2020-07-28 | 中芯国际集成电路制造(上海)有限公司 | Method for preventing self-doping effect |
| CN106252213B (en) * | 2016-08-22 | 2019-01-18 | 上海华力微电子有限公司 | The method for preventing the ion releasing at the silicon substrate edge of heavy doping |
| CN113496869A (en) * | 2020-04-03 | 2021-10-12 | 重庆超硅半导体有限公司 | Back film layer of silicon wafer for epitaxial substrate and manufacturing method thereof |
| CN112663137B (en) * | 2020-12-28 | 2022-07-05 | 中电晶华(天津)半导体材料有限公司 | Preparation method of silicon anti-epitaxial wafer |
| CN114628243A (en) * | 2022-03-10 | 2022-06-14 | 河北普兴电子科技股份有限公司 | Preparation method of double-layer silicon epitaxial wafer for fast recovery epitaxial diode |
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| US5281543A (en) * | 1991-05-17 | 1994-01-25 | International Business Machines Corporation | Fabrication method for quantum devices in compound semiconductor layers |
| US5916822A (en) * | 1995-08-10 | 1999-06-29 | Alcatel Optronics | Method of etching a substrate by means of chemical beams |
| CN1145224C (en) * | 1998-05-08 | 2004-04-07 | 三星电子株式会社 | Method of activating compound semiconductor layer to P-type compound semiconductor layer |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5281543A (en) * | 1991-05-17 | 1994-01-25 | International Business Machines Corporation | Fabrication method for quantum devices in compound semiconductor layers |
| US5916822A (en) * | 1995-08-10 | 1999-06-29 | Alcatel Optronics | Method of etching a substrate by means of chemical beams |
| CN1145224C (en) * | 1998-05-08 | 2004-04-07 | 三星电子株式会社 | Method of activating compound semiconductor layer to P-type compound semiconductor layer |
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