CN108767053A - A kind of manufacturing method of novel infrared detector BIB silicon epitaxial wafers - Google Patents

A kind of manufacturing method of novel infrared detector BIB silicon epitaxial wafers Download PDF

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CN108767053A
CN108767053A CN201810244500.8A CN201810244500A CN108767053A CN 108767053 A CN108767053 A CN 108767053A CN 201810244500 A CN201810244500 A CN 201810244500A CN 108767053 A CN108767053 A CN 108767053A
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layer
intrinsic
low
bib
substrate
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CN108767053B (en
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张峰
王银海
杨帆
孙健
骆红
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NANJING GUOSHENG ELECTRONIC CO Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/2205Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Light Receiving Elements (AREA)

Abstract

The present invention relates to a kind of manufacturing methods of novel infrared detector BIB silicon epitaxial wafers, select the N-type of heavily doped As<100>Polished silicon wafer, the Ω .cm of resistivity≤0.004, does not carry on the back envelope substrate.It is influenced to reduce back side auto-dope, takes packet silicon technology.It is polished by HCl in-situ high temperatures, to remove surface impurity and defect, improves substrate surface quality.Technique is blown down by big flow high temperature, reduces substrate auto-dope.Using two step epitaxys, low-resistance absorbed layer and intrinsic layer are separately grown, big flow H2 coolings blowing between two steps;Big flow gas corruption cavity before intrinsic layer extension load, outer delay low speed low-temperature epitaxy.The present invention is by controlling auto-dope, and absorbed layer and substrate transition region are steep, the areas intrinsic blocking layer You compare Kuan Ping, meets the requirement of BIB devices design.

Description

A kind of manufacturing method of novel infrared detector BIB silicon epitaxial wafers
Technical field
The invention belongs to semiconductor basis material silicon epitaxial wafer fields, specifically, being detected about a kind of new infrared The manufacturing method of device BIB (preventing impurity band infrared detector) silicon epitaxial wafer.
Background technology
Stop that impurity (BIB) detector is wide with covering wavelength, dark current is low, photoconductive gain is high, fast response time, resist The high advantage of irradiation behaviour.It is realized using impurity photoconductivity and is detected, since impurity ionization energy is smaller, therefore can be to longer Wave is infrared response.Photoconductive (ESPC) infrared detector of traditional extrinsic type needs high doping concentration to improve absorbability Can, but its maximum dopant concentration is limited by excessive dark current caused by resulting impurity band conductance, the infrared spies of BIB It surveys device and dexterously introduces an intrinsic layer (barrier layer) between electrode and infrared absorption layer to block dark current in impurity band Conduction, enables have higher doping concentration.The structure design on BIB devices barrier layer greatly reduces the dark current of device, Also therefore the impurity concentration of BIB device infrared absorption layers can 2 orders of magnitude higher than ESPC device (reachable 1017The order of magnitude), amount Sub- efficiency is significantly improved.On the other hand, the promotion of BIB devices doping concentration and volume greatly reducing compared with ESPC devices, Its regulating power impacted to interplanetary particle is enhanced, space-based astronomy infrared acquisition is conducive to.Further, since heavy doping effect, Impurity energy level in BIB devices is expanded into impurity band, further reduces impurity ionization energy, it may be achieved more long wavelength's is infrared Line detects.
The doped semiconductor of BIB detectors is mainly silicon, germanium and GaAs.Because silicon materials are easy to get major diameter high-purity Uniform silicon single crystal, and silicon device technical maturity has better uniformity, stability, and covering wavelength is wide so that silicon class BIB Focal plane device ranks among 5 μm astronomical or more mainstream detector.
Most important structure is barrier layer and infrared absorption layer in BIB detectors, and infrared absorption layer is clipped in low-resistance silicon substrate Between nearly intrinsic blocking layer.The doping concentration of absorbed layer is usually 1017~1018cm-3, in order to greatly improve quantum efficiency, Infrared absorption layer thickness generally takes 10~45 μm;Ideal barrier layer must be as pure as possible, but the practical layer can generally reach 1013cm-3Magnitude, thickness is between 3~6 μm.These thin layer generally use ion implantings, the method for neutron transmutation adulterate shape At absorbed layer, but in order to reduce lattice damage, doping concentration generally will not be too high;And by the method for extension, it can grow High-concentration dopant is introduced in journey.Since growing epitaxial silicon is more complicated, 5 quantity of low-resistance absorbed layer and intrinsic layer resisitivity Grade, the influence of interlayer auto-dope and cavity environment auto-dope to intrinsic layer resistivity are very big;And novel B IB infrared acquisitions Device (prevent impurity band infrared detector) is in order to ensure the accuracy of detection, it is desirable that absorbed layer and intrinsic layer transition region are as far as possible Width, intrinsic resistivity are as high as possible;The high resistivity of the auto-dope of high-concentration absorbent layer and intrinsic layer requirement, narrow transition region exist Consumingly conflict, it is difficult to grow the wider barrier layer in high-purity flat area on the absorbed layer of heavy doping.
Therefore need a kind of new technical solution to solve the above problems.
Invention content
Goal of the invention:A kind of technology of manufacture infrared detector BIB silicon epitaxial wafers is provided
Technical solution:In order to achieve the above objectives, following technical solution can be used in the present invention:
A kind of manufacturing method of novel infrared detector BIB silicon epitaxial wafers, concrete scheme are:
The BIB infrared detectors N-type that substrate slice is size diameter 15cm, the partly flat heavily doped As for spending≤3 μm<100> Polished silicon wafer, the Ω .cm of and resistivity≤0.004, does not carry on the back envelope substrate,
The selection of gas corruption condition:It is polished by HCl in-situ high temperatures, 1160 DEG C of gas corruption temperature;
Using two step epitaxys, low-resistance absorbed layer and intrinsic layer are separately grown, that is,
First step extension grows for N-type low-resistance absorbed layer:Use trichlorosilane for raw material, 1030 DEG C of growth temperature~ 1060 DEG C, growth rate is 0.7~1.1 μm/min, and obstructed dilution, it is 30~60sccm/min, phase to be passed through phosphine doping flow It is 10 to answer epi dopant concentration17~1018cm-3, low-resistance absorbed layer is prepared on substrate slice;Absorbed layer slowly drops after preparing Temperature arrive room temperature, while be passed through H2 purging, low-resistance absorb layer surface formed concentration less than low-resistance absorbed layer concentration buffer layer with Reduce influence of the absorbed layer auto-dope to second step intrinsic epitaxial;
Second step extension:Before growing intrinsic blocking layer, first gas corruption cavity takes away remaining impurity with gas;Outer delay, 980~1020 DEG C of growth temperature, growth rate are controlled in 0.1~0.2 μm/min, and intrinsic layer is divided to two sections of growths;First segment is grown 0.5 μm, inhibit cavity and edges of substrate auto-dope, two sections of centres that the H2 of 3~6min is added to blow down by resistive formation, is absorbed in low-resistance It is further formed high resistance buffer layer between layer and intrinsic layer;Second segment continued growth intrinsic layer, until ultimate density is 1012~ 1013cm-3
Advantageous effect:
The present invention prevents the manufacturing method of impurity band infrared detector silicon epitaxial wafer, is that comprehensive a variety of auto-dopes inhibit Technique:Suitable polished silicon wafer technical parameter;Take HCl polishing processes and big flow H2 purging, reduce N-type impurity to N-type outside Prolong the autodoping effect of layer;Two step epitaxys are taken, big flow gas corruption cavity after low-resistance absorbed layer has been grown, then low temperature low speed is given birth to The process of long intrinsic blocking layer;It realizes high-concentration absorbent layer and low concentration intrinsic layer transition region is as wide as possible, intrinsic electricity Resistance rate extension parameter as high as possible, has reached the device parameter requirements of BIB infrared detectors.
Description of the drawings
Fig. 1 is schematic device of the present invention.
Fig. 2 is the silicon epitaxy layer longitudinal resistivity typical profile grown using the present invention.
Fig. 3 is the vertical structure figure of the present invention.
Fig. 4 is the process flow chart of the present invention.
Specific implementation mode
Refering to Figure 1, the present invention uses equipment for Italy PE-2061S normal pressure growing epitaxial silicon equipment, Gao Chunshi For black pedestal as high-frequency induction heating body, main carrier gas H2 purity is 99.9999% or more.
The preparation of equipment includes,
Reactor cleans:The silica article used in quartz bell cover and reative cell must be carefully clear before carrying out extension It washes, substrate removes the deposit residue on quartz bell cover inner wall and quartz piece, reduces cavity auto-dope.
Reative cell high-temperature process:Before epitaxial growth, graphite base must carry out HCl high-temperature process, remove pedestal and chamber The Residual reactants of body absorption, and deposit one layer of intrinsic polysilicon.
Please in conjunction with shown in Fig. 3 and Fig. 4, the step of manufacturing method of novel infrared detector BIB silicon epitaxial wafers, includes:
A, to meet the requirement of BIB devices design, the N-type of heavily doped As is selected<100>Polished silicon wafer, resistivity≤0.004, directly Partly flat degree≤3 μm of diameter 15cm, do not carry on the back envelope substrate;It is influenced to reduce back side auto-dope, takes packet silicon technology, reduce lining Influence of the bottom auto-dope to subsequent growth BIB high resistant intrinsic layers.
B, the original positions HCl polishing process:Surface clean before extension in order to obtain ensures the lattice quality of epitaxial layer, suitably Increase polishing time and improve technological temperature and selects suitable HCl flows 3L/min, polishing time 8mim at 1160 DEG C;Polishing After high temperature big flow H2 purge 10min or more, to exclude N-type impurity remaining in reactor, when reducing epitaxial growth Autodoping effect.
C, two step epitaxy first step extension:Consider auto-dope, lattice quality, resistivity control and growth efficiency Etc. factors, using ultra-pure trichlorosilane (TCS), 1030 DEG C~1060 DEG C of growth temperature, growth rate is controlled in 0.7~1.1 μ M/min, obstructed dilution, doping 30~60sccm/min of setting, concentration accomplish 1017~1018Cm-3 is prepared on heavily doped substrate Go out low-resistance absorbed layer;Absorbed layer is slow cooling to room temperature, while big flow H2 purgings after preparing, pass through big flow process annealing Technique absorbs layer surface in BIB low-resistances and forms the relatively low buffer layer of concentration, it is intrinsic to second step to reduce absorbed layer auto-dope The influence of extension.
D, two step epitaxy second step extension:To reduce the high concentration auto-dope for the cavity attachment that is delayed outside absorbed layer to BIB The influence of intrinsic layer, before long intrinsic blocking layer, first gas corruption cavity takes away the remaining impurity amount of following the trend gas;Outer delay, it is raw 980~1020 DEG C of long temperature, growth rate are controlled in 0.1~0.2 μm/min, and intrinsic layer is divided to two sections of growths;First segment growth 0.5 μm, inhibit cavity and edges of substrate auto-dope, two sections of centres that 3~6min big flows H2 is added to blow down by resistive formation, is inhaled in low-resistance It receives and is further formed high resistance buffer layer between layer and intrinsic layer;Second segment continued growth intrinsic layer, ultimate density accomplish 1012~ 1013cm-3。
The present invention manufacturing method of impurity band infrared detector silicon epitaxial wafer " a kind of prevent " is comprehensive a variety of from mixing Miscellaneous inhibition technique:Suitable polished silicon wafer technical parameter;HCl polishing processes and big flow H2 purgings are taken, N-type impurity pair is reduced The autodoping effect of N-type epitaxy layer;Two step epitaxys are taken, have grown big flow gas corruption cavity after low-resistance absorbed layer, then low temperature The process of bradyauxesis intrinsic blocking layer;Realize high-concentration absorbent layer and low concentration intrinsic layer transition region it is as wide as possible, Intrinsic resistivity extension parameter as high as possible, has reached the device parameter requirements of BIB infrared detectors.As shown in Fig. 2, to adopt The silicon epitaxy layer longitudinal resistivity typical profile grown with the present invention, can verify that above-mentioned advantageous effect can pass through by Fig. 2 Technical scheme of the present invention is realized:Epitaxial layer longitudinal resistivity exemplary distribution absorbed layer and substrate transition region are steep, intrinsic blocking The areas floor You compare Kuan Ping.
In addition, there are many concrete methods of realizing and approach of the present invention, the above is only a preferred embodiment of the present invention. It should be pointed out that for those skilled in the art, without departing from the principle of the present invention, can also do Go out several improvements and modifications, these improvements and modifications also should be regarded as protection scope of the present invention.What is be not known in the present embodiment is each The available prior art of component part is realized.

Claims (5)

1. a kind of manufacturing method of novel infrared detector BIB silicon epitaxial wafers, it is characterised in that:
The BIB infrared detectors N-type that substrate slice is size diameter 15cm, the partly flat heavily doped As for spending≤3 μm<100>Polishing Piece, the Ω .cm of and resistivity≤0.004, does not carry on the back envelope substrate,
The selection of gas corruption condition:It is polished by HCl in-situ high temperatures, 1160 DEG C of gas corruption temperature;
Using two step epitaxys, low-resistance absorbed layer and intrinsic layer are separately grown, that is,
First step extension grows for N-type low-resistance absorbed layer:Use trichlorosilane for raw material, 1030 DEG C~1060 DEG C of growth temperature, Growth rate is 0.7~1.1 μm/min, and obstructed dilution, it is 30~60sccm/min to be passed through phosphine doping flow, and corresponding extension is mixed Miscellaneous a concentration of 1017~1018cm-3, low-resistance absorbed layer is prepared on substrate slice;Absorbed layer is slow cooling to room temperature after preparing, It is passed through H2 purgings simultaneously, absorbing layer surface in low-resistance forms the buffer layer that concentration is less than low-resistance absorbed layer concentration, is absorbed to reduce Influence of the layer auto-dope to second step intrinsic epitaxial;
Second step extension:Before growing intrinsic blocking layer, first gas corruption cavity takes away remaining impurity with gas;Outer delay, growth 980~1020 DEG C of temperature, growth rate are controlled in 0.1~0.2 μm/min, and intrinsic layer is divided to two sections of growths;First segment grows 0.5 μ M inhibits cavity and edges of substrate auto-dope, two sections of centres that the H2 of 3~6min is added to blow down by resistive formation, low-resistance absorbed layer with High resistance buffer layer is further formed between intrinsic layer;Second segment continued growth intrinsic layer, until ultimate density is 1012~1013cm-3
2. silicon epitaxy manufacturing method according to claim 1, it is characterised in that:The epitaxial conditions of first layer epitaxially grown: Packet silicon 8min, 1160 DEG C of gas corruption temperature, HCl flow 3L/min, polishing time 8mim, epitaxial growth temperature 1030 DEG C~1060 DEG C, growth rate control is 30~60sccm/min in 0.7~1.1 μm/min, obstructed dilution, doping flow.
3. silicon epitaxy manufacturing method according to claim 1, it is characterised in that:The epitaxial conditions of second layer epitaxially grown: Gas corruption cavity before extension is taken away the remaining impurity amount of following the trend gas, 980~1020 DEG C of epitaxial growth temperature, growth rate In 0.1~0.2 μm/min, obstructed doping is divided to two sections of growth intrinsic layers, centre plus 3~6min big flows H2 to blow down for control.
4. silicon epitaxy manufacturing method according to claim 1, it is characterised in that:In the selection of gas corruption condition, HCl flows 3L/min, polishing time 8mim.
5. silicon epitaxy manufacturing method according to claim 1 or 2 or 3, it is characterised in that:By controlling auto-dope, absorb Layer, intrinsic blocking layer You Kuanping area steep with substrate transition region.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109509702A (en) * 2018-11-30 2019-03-22 上海晶盟硅材料有限公司 Preparation method, equipment and the two-layer epitaxial piece of two-layer epitaxial piece
CN111384212A (en) * 2020-02-21 2020-07-07 南京国盛电子有限公司 Manufacturing method of silicon epitaxial wafer of back-illuminated BIB infrared detector

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CN1845303A (en) * 2006-04-17 2006-10-11 南京国盛电子有限公司 Silicon epitaxial wafer manufacturing method for 5'' power MOS tube
CN102157359A (en) * 2011-01-30 2011-08-17 福建福顺微电子有限公司 Method for manufacturing 6-inch POWERMOS transistor epitaxial layer
CN102453958A (en) * 2010-10-21 2012-05-16 上海华虹Nec电子有限公司 Method for reducing epitaxy auto-doping effect
CN104103499A (en) * 2014-07-31 2014-10-15 南京国盛电子有限公司 Production method of silicon epitaxial wafer for 8' schottky diode
CN104851784A (en) * 2015-05-29 2015-08-19 中国电子科技集团公司第四十六研究所 Method for growing high-resistance thick layer silicon epitaxy on 6-inch heavily As-doped silicon substrate
CN106057650A (en) * 2016-08-01 2016-10-26 中国电子科技集团公司第四十六研究所 Preparation method of silicon epitaxial wafer for LDMOS transistor
CN107017315A (en) * 2017-02-17 2017-08-04 中国电子科技集团公司第五十研究所 The stop impurity band detector and its manufacture method of back electrode structure

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US4962304A (en) * 1988-12-23 1990-10-09 Rockwell International Corporation Intrinsic impurity band conduction detectors
CN1248788A (en) * 1998-07-23 2000-03-29 佳能株式会社 Method for making semiconductor substrate parts
CN1845303A (en) * 2006-04-17 2006-10-11 南京国盛电子有限公司 Silicon epitaxial wafer manufacturing method for 5'' power MOS tube
CN102453958A (en) * 2010-10-21 2012-05-16 上海华虹Nec电子有限公司 Method for reducing epitaxy auto-doping effect
CN102157359A (en) * 2011-01-30 2011-08-17 福建福顺微电子有限公司 Method for manufacturing 6-inch POWERMOS transistor epitaxial layer
CN104103499A (en) * 2014-07-31 2014-10-15 南京国盛电子有限公司 Production method of silicon epitaxial wafer for 8' schottky diode
CN104851784A (en) * 2015-05-29 2015-08-19 中国电子科技集团公司第四十六研究所 Method for growing high-resistance thick layer silicon epitaxy on 6-inch heavily As-doped silicon substrate
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CN107017315A (en) * 2017-02-17 2017-08-04 中国电子科技集团公司第五十研究所 The stop impurity band detector and its manufacture method of back electrode structure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109509702A (en) * 2018-11-30 2019-03-22 上海晶盟硅材料有限公司 Preparation method, equipment and the two-layer epitaxial piece of two-layer epitaxial piece
CN109509702B (en) * 2018-11-30 2024-05-28 上海晶盟硅材料有限公司 Preparation method and equipment of double-layer epitaxial wafer and double-layer epitaxial wafer
CN111384212A (en) * 2020-02-21 2020-07-07 南京国盛电子有限公司 Manufacturing method of silicon epitaxial wafer of back-illuminated BIB infrared detector

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