CN108767053B - Manufacturing method of novel infrared detector BIB silicon epitaxial wafer - Google Patents
Manufacturing method of novel infrared detector BIB silicon epitaxial wafer Download PDFInfo
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 25
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 25
- 239000010703 silicon Substances 0.000 title claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 238000010521 absorption reaction Methods 0.000 claims abstract description 34
- 239000012535 impurity Substances 0.000 claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 238000000034 method Methods 0.000 claims abstract description 20
- 230000004888 barrier function Effects 0.000 claims abstract description 14
- 238000005498 polishing Methods 0.000 claims abstract description 12
- 230000007797 corrosion Effects 0.000 claims abstract description 8
- 238000005260 corrosion Methods 0.000 claims abstract description 8
- 230000007704 transition Effects 0.000 claims abstract description 7
- 238000007664 blowing Methods 0.000 claims abstract description 5
- 238000011065 in-situ storage Methods 0.000 claims abstract description 4
- 238000000576 coating method Methods 0.000 claims abstract description 3
- 238000000407 epitaxy Methods 0.000 claims description 20
- 239000010453 quartz Substances 0.000 claims description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 239000006096 absorbing agent Substances 0.000 claims description 5
- 230000000694 effects Effects 0.000 claims description 5
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 238000010790 dilution Methods 0.000 claims description 4
- 239000012895 dilution Substances 0.000 claims description 4
- 238000010926 purge Methods 0.000 claims description 4
- ZDHXKXAHOVTTAH-UHFFFAOYSA-N trichlorosilane Chemical compound Cl[SiH](Cl)Cl ZDHXKXAHOVTTAH-UHFFFAOYSA-N 0.000 claims description 4
- 239000005052 trichlorosilane Substances 0.000 claims description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 3
- 229910002804 graphite Inorganic materials 0.000 claims description 3
- 239000010439 graphite Substances 0.000 claims description 3
- 239000005922 Phosphane Substances 0.000 claims description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 claims description 2
- 238000004140 cleaning Methods 0.000 claims description 2
- 238000001816 cooling Methods 0.000 claims description 2
- 238000000151 deposition Methods 0.000 claims description 2
- 230000008021 deposition Effects 0.000 claims description 2
- 229910000064 phosphane Inorganic materials 0.000 claims description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 2
- 238000002360 preparation method Methods 0.000 claims description 2
- 239000002994 raw material Substances 0.000 claims description 2
- 239000000376 reactant Substances 0.000 claims description 2
- 239000011248 coating agent Substances 0.000 claims 1
- 238000005530 etching Methods 0.000 claims 1
- 230000008569 process Effects 0.000 abstract description 10
- 230000007547 defect Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 70
- 239000007789 gas Substances 0.000 description 8
- 235000012431 wafers Nutrition 0.000 description 8
- 238000001514 detection method Methods 0.000 description 4
- 230000000903 blocking effect Effects 0.000 description 3
- 238000007517 polishing process Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005764 inhibitory process Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000001174 ascending effect Effects 0.000 description 1
- JJWKPURADFRFRB-UHFFFAOYSA-N carbonyl sulfide Chemical compound O=C=S JJWKPURADFRFRB-UHFFFAOYSA-N 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000009377 nuclear transmutation Methods 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/2205—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The invention relates to a manufacturing method of a novel silicon epitaxial wafer for an infrared detector BIB, which selects an N-type 100 polished wafer heavily doped with As, has the resistivity less than or equal to 0.004 omega-cm, and does not seal a substrate. In order to reduce the influence of back self-doping, a silicon-coating process is adopted. And (3) removing surface impurities and defects by HCl in-situ high-temperature polishing, and improving the surface quality of the substrate. And the self-doping of the substrate is reduced by a large-flow high-temperature blowing process. A two-step epitaxial method is used, the low-resistance absorption layer and the intrinsic layer grow separately, and the high flow H2 is cooled and blown off between the two steps; the large flow gas corrosion cavity before the epitaxial wafer mounting of the intrinsic layer grows at low speed and low temperature during the epitaxial process. The invention meets the design requirement of the BIB device by controlling the self-doping, the transition region between the absorption layer and the substrate is steep, and the intrinsic barrier layer has a wider flat region.
Description
Technical Field
The invention belongs to the field of semiconductor base material silicon epitaxial wafers, and particularly relates to a manufacturing method of a novel infrared detector BIB (impurity band blocking infrared detector) silicon epitaxial wafer.
Background
The Blocking Impurity (BIB) detector has the advantages of wide covering wavelength, low dark current, high photoconductive gain, high response speed and high radiation resistance. It uses the photoconduction of impurity to implement detection, and because the ionization energy of impurity is less, it can respond to the infrared ray of longer wave. The BIB infrared detector skillfully introduces an intrinsic layer (barrier layer) between an electrode and an infrared absorption layer to block the conduction of dark current in an impurity band, so that the BIB infrared detector can have higher doping concentration. The structural design of the BIB device barrier layer greatly reduces the dark current of the device, so that the impurity concentration of the infrared absorption layer of the BIB device can be 2 orders of magnitude higher (up to 10) than that of an ESPC device17Order of magnitude), the quantum efficiency is significantly improved. On the other hand, the doping concentration of the BIB device is improved, the volume of the BIB device is greatly reduced compared with that of an ESPC device, the capacity of adjusting impact of the BIB device on cosmic particles is enhanced, and the BIB device is beneficial to the skyBasic astronomical infrared detection. In addition, due to the heavy doping effect, the impurity energy level in the BIB device is expanded into an impurity band, so that the impurity ionization energy is further reduced, and the infrared detection with longer wavelength can be realized.
The doped semiconductors of the BIB detector are mainly silicon, germanium and gallium arsenide. The silicon material is easy to obtain large-diameter high-purity uniform silicon single crystals, and the silicon device has mature process, better uniformity and stability and wide coverage wavelength, so that the silicon type BIB focal plane device is an ascending astronomical main flow detector with the particle size of more than 5 mu m.
The most important structures in a BIB detector are a barrier layer and an infrared absorbing layer sandwiched between a low resistance silicon substrate and a near intrinsic barrier layer. The doping concentration of the absorber layer is typically 1017～1018cm-3In order to greatly improve the quantum efficiency, the thickness of the infrared absorption layer is generally 10-45 μm; the ideal barrier layer must be as pure as possible, but in practice this layer will generally be up to 1013cm-3The thickness is 3-6 μm. The thin layers are doped to form an absorption layer by adopting an ion implantation and neutron transmutation method, but the doping concentration is not too high in order to reduce lattice damage; and high-concentration doping can be introduced in the growth process by an epitaxial method. Because the epitaxial growth of silicon is complex, the resistivity difference between the low-resistance absorption layer and the intrinsic layer is 5 orders of magnitude, and the influence of interlayer autodoping and cavity environment autodoping on the resistivity of the intrinsic layer is very large; in order to ensure the detection accuracy, the novel BIB infrared detector (impurity band blocking infrared detector) requires that the transition region of the absorption layer and the intrinsic layer is as wide as possible, and the intrinsic resistivity is as high as possible; the self-doping of the highly doped absorber layer strongly conflicts with the high resistivity, narrow transition region required by the intrinsic layer, making it difficult to grow a high purity, flat, wider barrier layer on the heavily doped absorber layer.
Therefore, a new technical solution is needed to solve the above problems.
Disclosure of Invention
The purpose of the invention is as follows: provides a process technology for manufacturing a silicon epitaxial wafer for an infrared detector BIB
The technical scheme is as follows: in order to achieve the purpose, the invention can adopt the following technical scheme:
a manufacturing method of a novel infrared detector BIB silicon epitaxial wafer comprises the following specific scheme:
the substrate slice for the BIB infrared detector is an N-type 100 polished slice heavily doped with As, the size diameter of which is 15cm, the local flatness of which is less than or equal to 3 mu m, the resistivity of which is less than or equal to 0.004 omega-cm, and the substrate is not sealed,
selection of gas corrosion conditions: performing in-situ high-temperature polishing by HCl at the gas corrosion temperature of 1160 ℃;
using a two-step epitaxy method, the low resistance absorber layer and the intrinsic layer are grown separately, i.e.,
the first step of epitaxy is growth of an N-type low-resistance absorption layer: trichlorosilane is adopted as a raw material, the growth temperature is 1030-1060 ℃, the growth rate is 0.7-1.1 mu m/min, dilution is not needed, the doping flow of the introduced phosphane is 30-60 sccm/min, and the corresponding epitaxial doping concentration is 1017～1018cm-3Preparing a low-resistance absorption layer on the substrate; after the absorption layer is prepared, slowly cooling to room temperature, simultaneously introducing H2 for blowing, and forming a buffer layer with the concentration lower than that of the low-resistance absorption layer on the surface of the low-resistance absorption layer so as to reduce the influence of the self-doping of the absorption layer on the intrinsic epitaxy in the second step;
and a second step of epitaxy: before growing the intrinsic barrier layer, the cavity is corroded by gas, and residual impurities are taken away along with the gas; external time delay, wherein the growth temperature is 980-1020 ℃, the growth rate is controlled to be 0.1-0.2 mu m/min, and the intrinsic layer grows in two sections; the first section grows to be 0.5 mu m, the self-doping of the cavity and the edge of the substrate is inhibited through the high-resistance layer, H2 for 3-6 min is added between the two sections for blowing, and a high-resistance buffer layer is further formed between the low-resistance absorption layer and the intrinsic layer; the second stage continues to grow the intrinsic layer to a final concentration of 1012～1013cm-3。
Has the advantages that:
the invention discloses a manufacturing method of a silicon epitaxial wafer for an infrared detector for preventing impurity bands, which integrates a plurality of self-doping inhibition processes: appropriate polishing pad specifications; the HCl polishing process and high-flow H2 purging are adopted to reduce the self-doping effect of N-type impurities on the N-type epitaxial layer; a two-step epitaxy method is adopted, a high-flow gas corrosion cavity is formed after a low-resistance absorption layer is grown, and then an intrinsic barrier layer is grown at a low temperature and a low speed; the epitaxial parameters of the transition region of the high-concentration absorption layer and the low-concentration intrinsic layer are as wide as possible and the intrinsic resistivity is as high as possible, and the device parameter requirements of the BIB infrared detector are met.
Drawings
FIG. 1 is a schematic view of the apparatus used in the present invention.
Fig. 2 is a graph showing a typical longitudinal resistivity profile of a silicon epitaxial layer grown using the present invention.
Fig. 3 is a longitudinal structural view of the present invention.
FIG. 4 is a process flow diagram of the present invention.
Detailed Description
Referring to fig. 1, the equipment adopted in the invention is italian PE-2061S atmospheric silicon epitaxial growth equipment, a high-purity graphite base is used as a high-frequency induction heating body, and the purity of a main carrier gas H2 is more than 99.9999%.
The preparation of the device includes the steps of,
cleaning a reactor: the quartz bell jar and quartz parts used in the reaction chamber need to be carefully cleaned before epitaxy is carried out, and the substrate removes deposition residues on the inner wall of the quartz bell jar and the quartz parts, thereby reducing the self-doping of the cavity.
High-temperature treatment of the reaction chamber: before epitaxial growth, the graphite susceptor must be subjected to HCl high temperature treatment to remove residual reactants adsorbed by the susceptor and the chamber, and to deposit a layer of intrinsic polysilicon.
Referring to fig. 3 and 4, the steps of the method for manufacturing the BIB silicon epitaxial wafer of the novel infrared detector include:
a. in order to meet the design requirement of the BIB device, an N-type 100 polishing sheet heavily doped with As is selected, the resistivity is less than or equal to 0.004, the local flatness with the diameter of 15cm is less than or equal to 3 mu m, and a substrate is not sealed; in order to reduce the influence of back self-doping, a silicon-coating process is adopted to reduce the influence of substrate self-doping on the subsequent growth of the BIB high-resistance intrinsic layer.
b. An HCl in-situ polishing process: in order to obtain a clean surface before epitaxy, ensure the lattice quality of the epitaxial layer, properly increase the polishing time and improve the process temperature, at 1160 ℃, selecting a proper HCl flow rate of 3L/min, and polishing time of 8 mim; and after polishing, purging with high-temperature high-flow H2 for more than 10min to remove residual N-type impurities in the reactor and reduce the self-doping effect during epitaxial growth.
c. Two-step epitaxy method first step epitaxy: comprehensively considering factors such as self-doping, lattice quality, resistivity control, growth efficiency and the like, adopting ultra-pure Trichlorosilane (TCS), controlling the growth temperature to be 1030-1060 ℃, the growth rate to be 0.7-1.1 mu m/min without dilution, setting the doping to be 30-60 sccm/min, and achieving the concentration to be 1017～1018cm-3, preparing a low-resistance absorption layer on the heavily doped substrate; after the absorption layer is prepared, the temperature is slowly reduced to the room temperature, meanwhile, the high-flow H2 is blown, and a buffer layer with relatively low concentration is formed on the surface of the low-resistance absorption layer of the BIB through a high-flow low-temperature annealing process, so that the influence of the self-doping of the absorption layer on the intrinsic epitaxy of the second step is reduced.
d. Two-step epitaxy method second step epitaxy: in order to reduce the influence of high-concentration self-doping attached to the outer delay cavity of the absorption layer on the BIB intrinsic layer, the cavity is corroded by gas before the intrinsic barrier layer is lengthened, and residual impurities are taken away along with large-flow gas; external time delay, wherein the growth temperature is 980-1020 ℃, the growth rate is controlled to be 0.1-0.2 mu m/min, and the intrinsic layer grows in two sections; the first section grows to be 0.5 mu m, the self-doping of the cavity and the edge of the substrate is inhibited through the high-resistance layer, the high-flow H2 is blown off in 3-6 min between the two sections, and a high-resistance buffer layer is further formed between the low-resistance absorption layer and the intrinsic layer; the second stage continues to grow the intrinsic layer to a final concentration of 1012～1013cm-3。
The invention relates to a manufacturing method of a silicon epitaxial wafer for an infrared detector for preventing impurity bands, which integrates a plurality of self-doping inhibition processes: appropriate polishing pad specifications; the HCl polishing process and high-flow H2 purging are adopted to reduce the self-doping effect of N-type impurities on the N-type epitaxial layer; a two-step epitaxy method is adopted, a high-flow gas corrosion cavity is formed after a low-resistance absorption layer is grown, and then an intrinsic barrier layer is grown at a low temperature and a low speed; the epitaxial parameters of the transition region of the high-concentration absorption layer and the low-concentration intrinsic layer are as wide as possible and the intrinsic resistivity is as high as possible, and the device parameter requirements of the BIB infrared detector are met. As shown in fig. 2, a typical distribution diagram of the longitudinal resistivity of the epitaxial layer of silicon grown by the present invention is shown, and it can be verified from fig. 2 that the above beneficial effects can be achieved by the technical solution of the present invention: the transition region between the absorption layer and the substrate is steep, and the intrinsic barrier layer has a wider flat region.
In addition, the present invention has many specific implementations and ways, and the above description is only a preferred embodiment of the present invention. It should be noted that, for those skilled in the art, without departing from the principle of the present invention, several improvements and modifications can be made, and these improvements and modifications should also be construed as the protection scope of the present invention. All the components not specified in the present embodiment can be realized by the prior art.
Claims (4)
1. A manufacturing method of a novel infrared detector BIB silicon epitaxial wafer is characterized by comprising the following steps:
the preparation of the device includes:
cleaning a reactor: quartz bell jar and quartz parts used in the reaction chamber must be carefully cleaned before epitaxy, deposition residues on the inner wall of the quartz bell jar and the quartz parts are thoroughly removed, and self-doping of the cavity is reduced;
high-temperature treatment of the reaction chamber: before epitaxial growth, the graphite base is required to be subjected to HCl high-temperature treatment, residual reactants absorbed by the base and the cavity are removed, and a layer of intrinsic polycrystalline silicon is deposited;
the manufacturing method comprises the following steps:
the substrate slice for the BIB infrared detector is an N-type 100 polished slice heavily doped with As, the size diameter of which is 15cm, the local flatness of which is less than or equal to 3 mu m, the resistivity of which is less than or equal to 0.004 omega-cm, and the substrate is not sealed; silicon is coated for 8min, so that the influence of substrate autodoping on the subsequent growth of the BIB high-resistance intrinsic layer is reduced;
selection of gas corrosion conditions: performing in-situ high-temperature polishing by HCl at the gas corrosion temperature of 1160 ℃, the HCl flow rate of 3L/min and the polishing time of 8 mim; purging with high-temperature high-flow H2 for more than 10min after polishing is finished to remove residual N-type impurities in the reactor and reduce the self-doping effect during epitaxial growth;
using a two-step epitaxy method, the low resistance absorber layer and the intrinsic layer are grown separately, i.e.,
the first step of epitaxy is growth of an N-type low-resistance absorption layer: trichlorosilane is adopted as a raw material, the growth temperature is 1030-1060 ℃, the growth rate is 0.7-1.1 mu m/min, dilution is not needed, the doping flow of the introduced phosphane is 30-60 sccm/min, and the corresponding epitaxial doping concentration is 1017～1018cm-3Preparing a low-resistance absorption layer on the substrate; after the absorption layer is prepared, slowly cooling to room temperature, simultaneously introducing H2 for blowing, and forming a buffer layer with the concentration lower than that of the low-resistance absorption layer on the surface of the low-resistance absorption layer so as to reduce the influence of the self-doping of the absorption layer on the intrinsic epitaxy in the second step;
and a second step of epitaxy: before growing the intrinsic barrier layer, the cavity is corroded by gas, and residual impurities are taken away along with the gas; external time delay, wherein the growth temperature is 980-1020 ℃, the growth rate is controlled to be 0.1-0.2 mu m/min, the intrinsic layer grows in two sections without doping, the first section grows 0.5 mu m, the self-doping of the cavity and the edge of the substrate is inhibited through the high-resistance layer, H2 for 3-6 min is added between the two sections for blowing off, and a high-resistance buffer layer is further formed between the low-resistance absorption layer and the intrinsic layer; the second stage continues to grow the intrinsic layer to a final concentration of 1012～1013cm-3。
2. A silicon epitaxial manufacturing method according to claim 1, characterized in that: epitaxial conditions for epitaxial growth of the first layer: silicon coating is carried out for 8min, the gas corrosion temperature is 1160 ℃, the HCl flow is 3L/min, the polishing time is 8min, the epitaxial growth temperature is 1030-1060 ℃, the growth rate is controlled to be 0.7-1.1 mu m/min, dilution is not needed, and the doping flow is 30-60 sccm/min.
3. A silicon epitaxial manufacturing method according to claim 1, characterized in that: epitaxial conditions for epitaxial growth of the second layer: and (3) etching the cavity with gas before epitaxy to take away residual impurities along with the gas with large flow, wherein the temperature of epitaxy growth is 980-1020 ℃, the growth rate is controlled at 0.1-0.2 mu m/min, the intrinsic layer grows in two sections without doping, and the middle is blown off by adding 3-6 min of H2 with large flow.
4. A silicon epitaxial manufacturing process according to claim 1 or 2 or 3, characterized in that: by controlling the self-doping, the transition region between the absorption layer and the substrate is steep, and the intrinsic barrier layer has a wide flat region.
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| CN111384212A (en) * | 2020-02-21 | 2020-07-07 | 南京国盛电子有限公司 | Manufacturing method of silicon epitaxial wafer of back-illuminated BIB infrared detector |
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