CN100364110C - Thin-film transistor array substrate structure - Google Patents
Thin-film transistor array substrate structure Download PDFInfo
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- CN100364110C CN100364110C CNB031430139A CN03143013A CN100364110C CN 100364110 C CN100364110 C CN 100364110C CN B031430139 A CNB031430139 A CN B031430139A CN 03143013 A CN03143013 A CN 03143013A CN 100364110 C CN100364110 C CN 100364110C
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Abstract
The present invention relates to an array base plate structure of a thin film transistor. The array base plate structure is mainly composed of a transparent base plate, a plurality of thin film transistors, a plurality of scanning wires, a plurality of data wires, one or a plurality of hydrogen-containing dielectric layers and a pattern conducting layer, wherein the thin film transistors are configured on the transparent base plate; the hydrogen-containing dielectric layers are configured on the transparent base plate, and cover the thin film transistors; the pattern conductor layer is configured on the hydrogen-containing dielectric layers. Each thin film transistor comprises a gate electrode, a source electrode and a drain electrode, wherein the gate electrode is electrically connected with the scanning wires; the source electrode and the drain electrode are electrically connected with the data wires and the pattern conducting layer. The single hydrogen-containing dielectric layer or multiple hydrogen-containing dielectric layers are configured between a gate electrode metal layer and the metal layer on the gate electrode metal layer, a gate electrode insulation layer is mended by the hydrogen atoms in the hydrogen-containing dielectric layer, and thus, the efficiency of assemblies can be increased. The array base plate structure is practical, and has the utilization values in industry.
Description
Technical field
The present invention relates to a kind of liquid crystal display device structure of Digital Data Processing Equipment field of electricity, particularly relate to a kind of at gate metal layer and configuration one deck of the metal interlevel above it or the hydrogeneous dielectric layer of multilayer, by the hydrogen atom in the hydrogeneous dielectric layer gate insulator is repaired, and then the usefulness that can promote assembly, thereby be suitable for practical film transistor array base plate structure (TFT array, i.e. electric crystal array film substrate structure) more.
Background technology
At improving rapidly of multimedia society, be indebted to the tremendous progress of semiconductor subassembly or man-machine display device mostly.With regard to display, (Cathode Ray Tube CRT) because have excellent display quality and its economy, monopolizes monitor market in recent years to cathode ray tube always.Yet, the environment of most terminating machine/display equipments of operating on the table for the individual, or with the viewpoint of environmental protection, if predicted with the trend of saving the energy, cathode ray tube is because still have a lot of problems in space utilization and the energy resource consumption, and can't effectively provide solution for the demand of light, thin, short, little and low consumpting power.Therefore, have that high image quality, space utilization efficient are good, the Thin Film Transistor-LCD (Thin Film TransistorLiquid Crystal Display, TFT LCD) of low consumpting power, advantageous characteristic such as radiationless becomes the main flow in market gradually.
Thin-film transistor array base-plate (is an electric crystal array film substrate, TFT array) on, thin-film transistor arranged into an array mainly is to be connected in series with data wiring (dataline) by scan wiring (scan line), and each thin-film transistor in the thin film transistor (TFT) array is in order to control the pixel electrode of a correspondence.Thin-film transistor herein is one to have the switch module of grid, three terminals of source/drain, and the grid of this thin-film transistor is and scan wiring electrically connects, the source/drain of thin-film transistor then can with data wiring and pixel electrode electric connection.In addition, in thin-film transistor, semiconductor layer (amorphous silicon material or polysilicon material) corresponding to grid between source electrode, the drain electrode is channel layer (channel), normally dispose a gate insulator (gateinsulating layer) between this channel layer and the grid, and the membrane quality of this layer gate insulator will directly have influence on the usefulness (performance) of whole thin-film transistor.
Existing known thin-film transistor array base-plate after the gate insulator making finishes, still must carry out other etched step usually in manufacturing process, these etching step regular meetings damage gate insulator.Thin-film transistor with top electrode kenel (top gate) is an example, and the etch process that is carried out when forming grid just probably damages the membrane quality of gate insulator; And be example with the thin-film transistor of hearth electrode kenel (bottom gate), though grid is to have made to finish before gate insulator, but during the channel layer above the definition gate insulator, the etch process that is carried out still can damage the membrane quality of gate insulator.
Yet; existing known techniques is after thin-film transistor completes; then just carry out the making of subsequent film; making as dielectric layer (inorganics such as SiOx, SiNx), pixel electrode; the not action that gate insulator is repaired; so it is not good to have the membrane quality of the gate insulator in the known thin-film transistor now, regular meeting has influence on the running of assembly.
This shows that above-mentioned existing film transistor array base plate structure still has many defectives, and demands urgently further being improved.
In order to solve the problem that film transistor array base plate structure exists, relevant manufacturer there's no one who doesn't or isn't seeks solution painstakingly, but do not see always that for a long time suitable design finished by development, and common product does not have appropriate structure to address the above problem, and this obviously is the problem that the anxious desire of relevant dealer solves.
Because the defective that above-mentioned existing film transistor array base plate structure exists, the inventor is based on abundant practical experience and professional knowledge, actively studied innovation, through constantly research, design, and after studying sample and improvement repeatedly, create the present invention who has practical value finally.
Summary of the invention
Main purpose of the present invention is, overcome the defective that above-mentioned existing film transistor array base plate structure exists, and provide a kind of novel film transistor array base plate structure, technical problem underlying to be solved is to make it at gate metal layer and configuration one deck of the metal interlevel above it or the hydrogeneous dielectric layer of multilayer, by the hydrogen atom in the hydrogeneous dielectric layer gate insulator is repaired, and then the usefulness that can promote assembly, thereby be suitable for practicality more, and have the value on the industry.
Purpose of the present invention and to solve its technical problem underlying be to adopt following technical scheme to realize.According to a kind of film transistor array base plate structure that the present invention proposes, it comprises: a transparency carrier; A plurality of thin-film transistors, these thin-film transistors are disposed on this transparency carrier, and wherein each these thin-film transistor comprises a grid and source; A plurality of scan wirings are disposed on this transparency carrier, and these scan wirings are connected with these grids; A plurality of data wirings are disposed on this transparency carrier, and these data wirings and the electric connection of these source/drains; At least one dielectric layer, this dielectric layer is disposed on this transparency carrier, and covers these thin-film transistors; And a patterning conductor layer, this patterning conductor layer is disposed on this dielectric layer, and this patterning conductor layer is and these source/drains electrically connect; This dielectric layer contains the protium that is useful on the reparation gate insulator.
The object of the invention to solve the technical problems can also be further achieved by the following technical measures.
Aforesaid film transistor array base plate structure, wherein said hydrogeneous dielectric layer are to be selected from by organic material layer, moisture spin-on glasses, oxygen silicide, and the group that formed of nitrogen silicide.
Aforesaid film transistor array base plate structure, wherein said hydrogeneous dielectric layer are to contain the Si-H bond or the film of Si-OH bond for one.
Aforesaid film transistor array base plate structure, wherein said hydrogeneous dielectric layer are to be an inner-dielectric-ayer.
Aforesaid film transistor array base plate structure, wherein said hydrogeneous dielectric layer are to be a flatness layer.
Aforesaid film transistor array base plate structure, wherein said hydrogeneous dielectric layer are to be a reflection projection layer.
Aforesaid film transistor array base plate structure, wherein said hydrogeneous dielectric layer are to be a wide viewing angle projection layer.
Aforesaid film transistor array base plate structure, wherein said these thin-film transistors be amorphous silicon film transistor and polycrystalline SiTFT one of them.
Aforesaid film transistor array base plate structure, wherein said these thin-film transistors be top electrode kenel thin-film transistor and hearth electrode kenel thin-film transistor one of them.
Aforesaid film transistor array base plate structure, wherein said patterning conductor layer comprises a plurality of pixel electrodes, and these pixel electrodes be penetration electrode and reflective electrode one of them.
The present invention compared with prior art has tangible advantage and beneficial effect.By above technical scheme as can be known, in order to reach aforementioned goal of the invention, major technique of the present invention thes contents are as follows:
The present invention proposes a kind of film transistor array base plate structure, mainly be the hydrogeneous dielectric layer by a transparency carrier, a plurality of thin-film transistor, a plurality of scan wiring, a plurality of data wiring, one deck or multilayer, and a patterned conductive layer constitutes; Wherein, thin-film transistor is to be disposed on the transparency carrier, and hydrogeneous dielectric layer is to be disposed on the transparency carrier, and covers above-mentioned thin-film transistor, and patterning conductor layer then is to be disposed on the hydrogeneous dielectric layer.Each thin-film transistor has all comprised grid, three terminals of source/drain, and grid is to electrically connect with scan wiring, and source/drain is to electrically connect with data wiring and patterning conductor layer.
Among the present invention, the material of hydrogeneous dielectric layer for example is organic material layer (organic film), moisture spin-on glasses (Spin On Glass, SOG), the mixture of organic material layer and oxygen silicide/nitrogen silicide, or the mixture of moisture spin-on glasses and oxygen silicide/nitrogen silicide.In addition, the material of hydrogeneous dielectric layer also can be for example for containing the Si-H bond or the So-gel film of Si-OH bond.
Among the present invention, hydrogeneous dielectric layer for example can be used as inner-dielectric-ayer (interlayerdielectric), flatness layer (planarization layer), reflection projection layer (reflectorbump layer), or wide viewing angle projection layer (wide view angle bump layer).
Among the present invention, the thin-film transistor on the transparency carrier can be amorphous silicon membrane transistor (a-SiTFT) or polycrystalline SiTFT (p-Si TFT).In addition, above-mentioned thin-film transistor for example is the thin-film transistor of top electrode kenel or the thin-film transistor of hearth electrode kenel.
Among the present invention, the patterning conductor layer on the hydrogeneous dielectric layer is a plurality of pixel electrodes for example, and these pixel electrodes for example are penetration electrode (transparent pixel electrode) or reflective electrode (reflective pixel electrode).
By said structure, film transistor array base plate structure of the present invention has following advantage at least:
1, thin-film transistor array base-plate of the present invention adds protium especially in dielectric layer, utilizes its hydrogen atom that discharges to repair gate insulator effectively, thereby promotes the usefulness of assembly.
2, in the film transistor array base plate structure of the present invention, hydrogeneous dielectric layer can be used as inner-dielectric-ayer, flatness layer, reflection projection layer, or wide viewing angle projection layer, and it is applicable to the panel of various kenels (penetration, reflective).
In sum, the film transistor array base plate structure of special construction of the present invention, mainly be hydrogeneous dielectric layer, and a patterned conductive layer constitute by a transparency carrier, a plurality of thin-film transistor, a plurality of scan wiring, a plurality of data wiring, one deck or multilayer.Wherein, thin-film transistor is to be disposed on the transparency carrier, and hydrogeneous dielectric layer is to be disposed on the transparency carrier, and covers above-mentioned thin-film transistor, and patterning conductor layer then is to be disposed on the hydrogeneous dielectric layer.This each thin-film transistor all includes grid, three terminals of source/drain, and grid is to electrically connect with scan wiring, and source/drain is to electrically connect with data wiring and patterning conductor layer.The present invention is at gate metal layer and configuration one deck of the metal interlevel above it or the hydrogeneous dielectric layer of multilayer, by the hydrogen atom in the hydrogeneous dielectric layer gate insulator is repaired, and then the usefulness that can promote assembly, thereby be suitable for practicality more, have the value on the industry.It has above-mentioned many advantages and practical value, and having there is no similar structural design in like product publishes or uses, no matter it structurally or bigger improvement all arranged on the function, and have technically than much progress, and produced handy and practical effect, and have the effect of enhancement really, thus be suitable for practicality more, really be a new and innovative, progressive, practical new design.
Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of specification, below with preferred embodiment of the present invention and conjunction with figs. describe in detail as after.
Description of drawings
Fig. 1 is the schematic layout pattern according to the thin-film transistor array base-plate of a preferred embodiment of the present invention.
Fig. 2 is the generalized section according to the penetration thin-film transistor array base-plate of a preferred embodiment of the present invention.
Fig. 3 is the generalized section according to the reflective thin-film transistor array base-plate of a preferred embodiment of the present invention.
100: transparency carrier 102: thin-film transistor
104: scan wiring 106: data wiring
108: pixel electrode 200,300: transparency carrier
202,302: thin-film transistor
204,304: island polysilicon (polysilicon island)
204a, 304a: channel layer 204b, 304b: source electrode territory
206,306: gate insulator 208,308: grid
210,310: hydrogeneous dielectric layer
212,312a: source/drain metal layer (S/D metal)
214: flatness layer 215: opening
216,312: patterning conductor layer 310a: the reflection projection
312b: reflective pixel electrodes
Embodiment
Below in conjunction with accompanying drawing and preferred embodiment, to its embodiment of film transistor array base plate structure, structure, feature and the effect thereof that foundation the present invention proposes, describe in detail as after.
The general known dielectric layer that covers one deck inorganic above thin-film transistor is as SiOx, SiNx etc.Though above-mentioned inorganic has the effect of protection to thin-film transistor itself, its membrane quality for gate insulator in the thin-film transistor there is no benefits.Therefore, present embodiment uses inner-dielectric-ayer, flatness layer, the reflection projection layer of hydrogeneous dielectric layer as thin-film transistor top, or wide viewing angle projection layer etc., reaches the purpose of repairing gate insulating barrier by hydrogeneous dielectric layer.
Present embodiment is following to be that example describes with the polycrystalline SiTFT of top electrode kenel only, but and non-limiting the present invention only can use in the polycrystalline silicon thin film transistor structure of top electrode kenel, the application of the hydrogeneous dielectric layer of present embodiment also can be applicable to the polycrystalline SiTFT of hearth electrode kenel, the amorphous silicon film transistor of top electrode kenel, and in the amorphous silicon film transistor structure of hearth electrode.In addition, be familiar with this operator and should know, that present embodiment also can be applicable to is reflective, in penetration or the LCD of semi-penetration, semi-reflective (transflective).
Seeing also shown in Figure 1ly, is the schematic layout pattern according to a preferred embodiment of the present invention thin-film transistor array base-plate.In this preferred embodiment, film transistor array base plate structure of the present invention, mainly be by a transparency carrier 100, a plurality of thin-film transistor 102, a plurality of scan wiring 104, a plurality of data wiring (data wiring) 106, and a pixel electrode 108 constitute, wherein:
The bearing of trend of the bearing of trend of this scan wiring 104 and data wiring 106 is orthogonal, and disposes thin-film transistor 102 and pixel electrode 108 on the zone that surrounded of adjacent two scan wirings 104 and adjacent two materials and pictures lines 106.
Each thin-film transistor 102 on this transparency carrier 100 has all comprised grid, three terminals of source/drain, and grid is to electrically connect with scan wiring 104, and source/drain then electrically connects with data wiring 106 and pixel electrode 108.
This scan wiring 104 is the ON/OFF in order to control TFT 102, and when thin-film transistor 102 is "open" state, and data wiring 106 can write image information in the pixel electrode 108 that thin-film transistor 102 controlled.
Seeing also shown in Figure 2ly, is the generalized section according to a preferred embodiment of the present invention penetration thin-film transistor array base-plate.Disposing the thin-film transistor 202 of a plurality of arrayed on this transparency carrier 200, is example with the polycrystalline SiTFT 202 of top electrode kenel, and it mainly is by an island polysilicon 204, a gate insulator 206, and a grid 208 constitutes, wherein:
This island polysilicon 204, a channel layer 204a and two source electrode territory 204b have been comprised, gate insulator 206 is disposed on the transparency carrier 200, and covers island polysilicon 204, then disposes grid 208 on the gate insulator 206 corresponding to channel layer 204a.
In addition, this thin-film transistor 202 is covered by a hydrogeneous dielectric layer 210, source/drain metal 212 then is to run through this hydrogeneous dielectric layer 210 to electrically connect with source electrode territory 204b, so that source electrode territory 204b is able to external connection.
From the above, the material of this hydrogeneous dielectric layer 210 for example is organic material layer (organicfilm), moisture spin-on glasses (Spin On Glass, SOG), the mixture of organic material layer and oxygen silicide/nitrogen silicide, or the mixture of moisture spin-on glasses and oxygen silicide/nitrogen silicide.In addition, the material of hydrogeneous dielectric layer 210 also can for example be to contain the Si-H bond or the So-gel film of Si-OH bond.
See also shown in Figure 2ly equally, for example dispose a flatness layer 214 on the hydrogeneous dielectric layer 210, the material of this flatness layer 214 for example can be identical with the material of above-mentioned hydrogeneous dielectric layer 210, can also be inorganic dielectric materials such as oxygen silicide, nitrogen silicide.Then dispose patterning conductor layer 216 on flatness layer 214, this patterning conductor layer 216 for example is to electrically connect by an opening 215 and source/drain metal layer 212, so that patterning conductor layer 216 can be subjected to the control of thin-film transistor 202.In other words, patterning conductor layer 216 is so-called penetration pixel electrode, and in the present embodiment, conductor layer 216 for example is transparent materials such as tin indium oxide (ITO), indium zinc oxide.
See also shown in Figure 3ly, be generalized section according to the reflective thin-film transistor array base-plate of a preferred embodiment of the present invention.Disposing the thin-film transistor 302 of a plurality of arrayed on this transparency carrier 300, is example with the polycrystalline SiTFT 302 of top electrode kenel, and it mainly is by an island polysilicon 304, a gate insulator 306, and a grid 308 constitutes, wherein:
This island polysilicon 304, a channel layer 304a and two source electrode territory 304b have been comprised, gate insulator 306 is disposed on the transparency carrier 300, and covers island polysilicon 304, then disposes grid 308 on the gate insulator 306 corresponding to channel layer 304a.
In addition, thin-film transistor 302 is covered by a hydrogeneous dielectric layer 310, and patterning conductor layer 312 then is to be covered on the hydrogeneous dielectric layer 310.
This hydrogeneous dielectric layer 310 is in order to conduct reflection projection layer, it has a plurality of reflection projection 310a from the teeth outwards, the patterning conductor layer 312 that is configured on the hydrogeneous dielectric layer 310 then comprises source/drain metal 312a and reflective pixel electrodes 312b two parts, this source/drain metal 312a runs through hydrogeneous dielectric layer 310 and electrically connects with source electrode territory 304b, so that source electrode territory 304b is able to external connection.In addition, because the surface of hydrogeneous dielectric layer 310 has reflection projection 310a, so reflective pixel electrodes 312b can be more effective and equably with the external world or the light of front light-source (front light) reflects, to reach the purpose of demonstration.
In the foregoing description, the inner-dielectric-ayer of hydrogeneous dielectric layer on can be used as array base palte, flatness layer (hydrogeneous dielectric layer 210), the reflection projection layer (hydrogeneous dielectric layer 310), also can be used as wide viewing angle projection layer.These retes not only have its function separately, and have had the effect of repairing gate insulating barrier simultaneously concurrently, and from the above, present embodiment can be integrated with the processing procedure of thin-film transistor array base-plate effectively, and can improve the usefulness of assembly.
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the technology contents that can utilize above-mentioned announcement is made a little change or is modified to the equivalent embodiment of equivalent variations, but every content that does not break away from technical solution of the present invention, according to technical spirit of the present invention to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solution of the present invention.
Claims (10)
1. film transistor array base plate structure comprises:
One transparency carrier;
A plurality of thin-film transistors, these thin-film transistors are disposed on this transparency carrier, and wherein each these thin-film transistor comprises a grid and source;
A plurality of scan wirings are disposed on this transparency carrier, and these scan wirings are connected with these grids;
A plurality of data wirings are disposed on this transparency carrier, and these data wirings and the electric connection of these source/drains;
At least one dielectric layer, this dielectric layer is disposed on this transparency carrier, and covers these thin-film transistors; And
One patterning conductor layer, this patterning conductor layer is disposed on this dielectric layer, and this patterning conductor layer is to electrically connect with these source/drains;
It is characterized in that this dielectric layer contains the protium that is useful on the reparation gate insulator.
2. film transistor array base plate structure according to claim 1 is characterized in that wherein said dielectric layer is to be selected from by organic material layer, moisture spin-on glasses, oxygen silicide
And the nitrogen silicide one of them.
3. film transistor array base plate structure according to claim 1 is characterized in that wherein said dielectric layer is to contain the Si-H bond or the film of Si-OH bond for one.
4. film transistor array base plate structure according to claim 1 is characterized in that wherein said dielectric layer is to be an inner-dielectric-ayer.
5. film transistor array base plate structure according to claim 1 is characterized in that wherein said dielectric layer is to be a flatness layer.
6. film transistor array base plate structure according to claim 1 is characterized in that wherein said dielectric layer is to be a reflection projection layer.
7. film transistor array base plate structure according to claim 1 is characterized in that wherein said dielectric layer is to be a wide viewing angle projection layer.
8. film transistor array base plate structure according to claim 1, it is characterized in that wherein said these thin-film transistors be amorphous silicon film transistor and polycrystalline SiTFT one of them.
9. film transistor array base plate structure according to claim 1, it is characterized in that wherein said these thin-film transistors be top electrode kenel thin-film transistor and hearth electrode kenel thin-film transistor one of them.
10. film transistor array base plate structure according to claim 1 is characterized in that wherein said patterning conductor layer comprises a plurality of pixel electrodes, and these pixel electrodes be penetration electrode and reflective electrode one of them.
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| CNB031430139A CN100364110C (en) | 2003-06-07 | 2003-06-07 | Thin-film transistor array substrate structure |
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| CNB031430139A CN100364110C (en) | 2003-06-07 | 2003-06-07 | Thin-film transistor array substrate structure |
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| CN1553518A CN1553518A (en) | 2004-12-08 |
| CN100364110C true CN100364110C (en) | 2008-01-23 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2007242895A (en) | 2006-03-08 | 2007-09-20 | Mitsubishi Electric Corp | Thin-film transistor device and its manufacturing method |
| CN100426490C (en) * | 2006-07-25 | 2008-10-15 | 友达光电股份有限公司 | Active element substrate and forming method thereof |
| CN101304018B (en) * | 2007-05-09 | 2011-11-30 | 奇美电子股份有限公司 | Image display system |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6094250A (en) * | 1997-12-08 | 2000-07-25 | Hyundai Electronics Industries Co., Ltd. | IPS mode TFT-LCD and method for fabricating the same |
| JP2000216403A (en) * | 1994-07-30 | 2000-08-04 | Semiconductor Energy Lab Co Ltd | Active matrix circuit |
| US6297867B1 (en) * | 1997-11-12 | 2001-10-02 | Nec Corporation | Wide view angle LCD operable in IPS mode which uses a pixel electrode as a shield to prevent disturbances in the electric field of a display pixel portion of the LCD |
| US20030058388A1 (en) * | 2001-09-21 | 2003-03-27 | Hitachi, Ltd. | Liquid crystal display device |
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2003
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000216403A (en) * | 1994-07-30 | 2000-08-04 | Semiconductor Energy Lab Co Ltd | Active matrix circuit |
| US6297867B1 (en) * | 1997-11-12 | 2001-10-02 | Nec Corporation | Wide view angle LCD operable in IPS mode which uses a pixel electrode as a shield to prevent disturbances in the electric field of a display pixel portion of the LCD |
| US6094250A (en) * | 1997-12-08 | 2000-07-25 | Hyundai Electronics Industries Co., Ltd. | IPS mode TFT-LCD and method for fabricating the same |
| US20030058388A1 (en) * | 2001-09-21 | 2003-03-27 | Hitachi, Ltd. | Liquid crystal display device |
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Granted publication date: 20080123 Termination date: 20180607 |