CH655280A5 - METHOD AND DEVICE FOR SUPPRESSING SLIP ON A VEHICLE. - Google Patents

Description

35 The invention relates to a method and a device for suppressing slip on a vehicle according to the preamble of the first claim.

Various mechanisms have been devised in the automotive and trucking industries to control excessive slip between the drive wheels of a vehicle. Devices of this type are usually used to balance the speeds of two or more output shafts which are driven by a main shaft. The driven shafts can be viewed practically as output drive shafts, since they are used to drive the vehicle wheels either directly or via a transmission mechanism. Certain speed differences between these shafts are necessary in order to record the different speeds of the driven wheels of a vehicle, for example if it is following a curved track or if irregularities in the road load the wheels differently, as also happens when the vehicle crosses unpaved terrain. This problem is mostly solved with the means of a 55 differential gear, which is connected between the main drive shaft and the output shafts, the differential gear being a mechanism which is able to distribute the torque of the main shaft to the output shafts and thus different speeds of the Ab-6o to enable drive shafts. In the truck industry, it is advantageous to provide so-called multi-axis tandem drives, in that an interaxle differential connects the main shaft from the engine to the differentials of each of the two driven rear axles, for example, i.e. the front and rear driven rear axles.

Under normal operating conditions, i.e. if the vehicle rolls on dry, good roads, between

3rd

655 280

There is normally no excessive slip on the driven output shafts and any corrections are not required. Assuming, however, that the vehicle is forced to drive through mud or over ice or even on very rainy roads in bad weather, for example, excessive slippage can very easily occur if one of the driven wheels interferes with the surface, i.e. loses traction and begins to spin. This condition is referred to as the “slip condition”. It is therefore advantageous to provide any locking mechanisms or other control devices in a vehicle which prevent or cancel an excessive difference in the driven wheels.

Mechanical locking mechanisms for coupling the main drive axle to the differential drive axles are used in the truck industry and are described, for example, in U.S. Patents 3,264,901 and 3,390,593. Mechanical locking mechanisms are also used with inter-axle differentials in tandem drive and are described, for example, in US Pat. No. 2,870,853.

Another solution is described in U.S. Patent 3,138,970; it relates to a speed control-sensitive electronic control circuit for slip differences. Another, this time an electromechanical system uses selective brake control to limit the speed difference between a pair of wheels of a vehicle, as described in U.S. Patent 3,706,351.

Generally speaking, when locking two shafts from a group of three shafts, i.e. one input and two output shafts, in a differential mechanism, all three shafts are blocked and the differential function is thus eliminated. The terms "lock", "lock condition" or "locked condition" usually refer to the condition in which the differential mechanism that connects the main input shaft to the two output shafts is inoperable with the result that both output shafts rotate at the same speed and that the torque delivered by the engine or anti-friction element is evenly distributed to both output shafts, in the manner required by the external resistance to the output shafts.

Such a lock can also be inserted manually by the driver if he detects a slip or it can also be triggered by an automatic control device, such as is described, for example, in US Pat. No. 3,138,970. Slip control can also be brought about by other means than locking the differential of a vehicle. An electronic circuit here suppresses or at least reduces the slip into an acceptable range.

Typically, the electronic control system is responsible for sensing the input speed signals, enabling continuous monitoring and the necessary correction. Such continuous monitoring systems respond to a constantly repeating cycle of the control apparatus when the speed of the output shafts run synchronously, which occurs immediately after the differential is locked, the error signal being cleared before the vehicle is outside the slip condition. The electronic system continues to monitor the speed of the output shafts and as soon as the vehicle comes back into the initial slip condition, the error signal is regenerated again and the locking mechanism is triggered. This can cause typical oscillations in the drive system with a frequency in the order of 1 to 3 Hz. Such vibrations are of course not desired, they represent a constant burden for the vehicle and for the drive means 5 and also disrupt the driver, in particular if the vehicle cannot get away from this location in which this slip condition prevails.

It is an object of the invention to circumvent the disadvantages of the prior art and to create a slip monitoring device which does not have a rapid periodic course of the locking condition, but remains in the locking condition for a predetermined time.

Another object of the invention is to provide such a device which is particularly useful in differential type clutch mechanisms to achieve extended, fixed lock-up intervals after a greater difference in speed. This fixed blocking time interval is greater than 20 seconds and can take up to several 20 minutes, depending on the type of vehicle and its application.

A further object of the invention is to provide a locking mechanism which has a locking operation which is extended over time, for use with interaxle differentials of a vehicle with a tandem drive.

Another object of the invention is to provide a breakdown indicator circuit for the slip monitor apparatus to ensure that the lockout control does not function if after a given time the lockout condition 30 has not been measured. The use of the breakdown circuit allows verification of the operation of the mechanical locking system and the sensor functions.

Another object of the invention is to provide a circuit which enables the slip-3s control circuit for the vehicle to be self-monitored, in which certain tests are automatically carried out during driving.

Finally, it is a further object of the invention to provide a slip control locking device which comprises a circuit for canceling the braking action in order to prevent further locking commands being issued during the braking of the vehicle.

The object is achieved by the invention specified in the patent claims.

45 The invention will now be explained in detail with the aid of the attached figures. Show:

1 is a block diagram to show the functional principle of an electronic monitoring circuit according to the invention;

2 shows the view of a vehicle lower part with an interaxle differential viewed from above;

FIG. 3 shows a view of an enlarged section of the interaxle differential according to FIG. 1;

4 is a block diagram of a preferred embodiment of the control circuit in accordance with the principle of the invention;

5A to 5D are detailed circuits of the embodiment shown in FIG. 4.

1 shows the block diagram of a slip monitoring circuit in which the control means are generally designated with the no. 10 are designated and receive input signals from two sensors, not shown, for determining the rotational speed of two of the drive shafts. For example, one sensor may have the rotational speed of the main drive shaft, that is, the input shaft, attached to the input of the differential, and a second sensor may sense the speed of an output shaft that comes from the differential. The sensors themselves can be conventional sensors, such as

655280

4th

for example magnetic sensors which emit an output pulse when, for example, the teeth of a gear or a rotor on the driven shaft pass the sensor. The frequency of the input signals from the sensors is then proportional to the rotational speed of the waves. The sensed signals Wj and W2 are connected to lines 11 and 12 and lead to a difference circuit 14 which measures the difference between the two signal frequencies. The difference circuit 14 may typically consist of a comparator (COMP) which compares the difference between the absolute values of the two input signals, the absolute values being proportional to their relative input frequencies with a reference value. The reference value itself is generated by summing the two input signals and multiplying it by a further reference value (for example 0.05), which is selected in accordance with the type of comparator used. The difference circuit 14 then outputs an output signal to the line 15 only when the difference in the rotational speed of the shafts is greater than a predetermined slip size. A certain amount of slip has to be accepted in normal driving, for example when the vehicle is cornering or moving over uneven terrain or when tires of different radii are used, for example due to an uneven course.

The output signal along line 15 then represents an error signal or DIFF signal which indicates the no longer permitted slip, i.e. indicates the no longer permissible difference in the speed of the shafts. The DIFF signal is routed to two timers T1 with the number 16 and T3 with the number 18. The timer T1 generates an output pulse after one revolution with a delay in the order of magnitude of 0.25 to 0.5 seconds and serves to minimize the incorrect operation in the presence of a starting shaft slip. The so-called gearless is also taken into account. After this delay T1, the output of the timer 16 sets an input of an RS flip-flop 19, which then has an output pulse ready at its Q output. This output pulse is fed via line 20 to a power amplifier 21, which in turn drives a control means or solenoid 22.

The control means 22 is used to energize means for suppressing the slip condition which have been detected by the sensors. If a solenoid is used as the control means 22, it can be used to actuate a clutch which brings the differential mechanism into its locked condition. This application will now be described in more detail below. The control means 22 can also be used in combination with a selective brake control, similar to that described in US Pat. No. 3,706,351 or in a four-wheel drive vehicle, where a clutch is also actuated, in order to apply the drive torque to the driven axle of the Bring vehicle, is described in U.S. Patent No. 3,557,634.

The signal from the power amplifier 21 is still fed to a timer T2 with the number 23. The timer T2 is the so-called basic cycle timer and effects a predetermined time interval in the order of 30 to 60 seconds while the control means 22 is in operation. At the end of this predetermined time interval, T2 outputs an output signal to an OR gate 24, which in turn outputs an output signal to the reset input of the flip-flop 19. When resetting the flip-flop 19, the Q output goes back to 0 and thus switches off the control means 22. The reset of the flip-flop 19

can also be triggered by the timer T3, that is the breakdown timer 18, which also leads via the OR gate 24. The breakdown timer with T3 is typically switched so that its time interval is greater than T1 and less than s T2. The purpose of the breakdown timer is to switch off the control means 22 in the event that the slip condition could not be eliminated after the time interval T3. For example, you can set the time interval T2 to 30 seconds and the time interval T3 to 15 seconds. If the difference signal is still present on line 15 when the 15 seconds have elapsed, breakdown timer T3 resets flip-flop 19 and control means 22 is switched off. The breakdown timer works under the condition that the previously determined 15 slip condition should be overcome after the time interval T3, so that the DIFF signal is no longer present on line 15. However, if the DIFF signal is still present, then it is assumed that something is wrong, for example a sensor failure or a fault in the locking mechanism. In any case, it is then desirable to put the control device out of action and to inform the driver that an error condition has occurred. The time interval T3 can be set anywhere between the time window defined by T1 and T2. For example, you can choose a time interval of T2 = 30.5 seconds with a timer time T3 of 30 seconds. This results in a very narrow time window for the timer T3, namely from 30.0 to 30.5 seconds, and this can be used to suppress disturbing DIFF signals, which can be caused, for example, by transmission vibrations or the like. A preferred embodiment of the invention, as is used on rear axle differentials in tandem driven vehicles, is shown in FIGS. 2 to 5. Figure 2 35 shows a truck cabin 20 with the chassis 22 seen from above. The chassis 22 is located on a rear tandem drive with a front rear axle 24 and a rear rear axle 26.

The torque of the vehicle engine is transmitted via the 40 main drive shaft 30 to an interaxle differential 32, which is housed in a housing 31 and divides the torque between the front rear axle differential 34 and the rear rear axle differential 36. The drive shaft 30 is connected to the intermediate axle differential input 38 via a universal joint 40. The interaxle differential 32 then divides the torque at the input 38 between a first output or a through shaft 42 and a second output, a shaft 44. With respect to the Fiso gur 3, the output shaft 42 is driven directly by the left side gear of the differential 32 and the output shaft 44 is driven by a number of transmission gears 45 to 47 which in turn experience the drive from the right side gear of the differential 32. The output 55 shaft 44 rotates a pinion gear, which drives the ring gear of the front rear axle differential 34. The output shaft 42 is connected via a universal joint 48 to a drive shaft 50 which in turn drives the ring gear of the rear rear axle differential 60 36.

A sleeve 52 is placed on the output shaft 42. The sleeve 52 is movable in the axial direction relative to the shaft 42 via a fork, not shown, and can be pushed to the left in accordance with FIG. When the ring gear 52 is in engagement with the teeth 54, the gear wheel 45 and the output shaft 42 are mechanically locked against one another and rotate with them.

5

655 280

ben speed. The differential 32 is then prevented from changing to the same speed until the ring gear 52 is released again from the engagement of the teeth 54.

A representative tandem axle assembly that includes an interaxle differential with a lockout mechanism is described in U.S. Patent No. 2,870,853 and also in Rockwell SFHD, STHD, SUHD Parts Book, Publication No. SP-7646-1, issued by Rockwell International Corp. in Michigan. This information is included here as a reference.

Two sensors 56 and 58 are attached to the differential housing 31. The sensor 58 monitors the rotational movement of the teeth of the gear wheel 45 and thus determines the rotational speed of the output shaft 42. The sensor 56 monitors the rotational movement of a toothed rotor 60, which is not brought into the housing of the differential 32 and determines the speed of the main drive shaft 30. The sensors 56 and 58 give their output signals on the lines 62 and 64 to the control means or to a control unit 66, which is located in the housing 31 of the interaxle differential 32. If a speed difference corresponding to the signals on the lines 62 and 64 is now determined, the control unit 66 in turn outputs an output signal on the line 68, which influences an air solenoid valve 70 in order to move the ring gear 52 in a known manner so that it moves the intermediate axis Differential 32 locks. As a result of the blocking position, signals are sent to an indicator lamp 72 via the control unit 66 in order to visually inform the driver of the vehicle about this process.

The control unit 66 is supplied with power via the brake light circuit and contains a means for deactivating the locking mechanism during a braking operation of the vehicle. In Figure 2, the numeral 74 denotes a battery which is connected to the stop light switch 76 and can be operated via a foot pedal 78. The interposition of the control unit 66 in the brake light circuit thus makes it possible to determine whether the line is interrupted or not. If the line is interrupted, this can be determined by the control unit 66 in order to then prevent the blocking process.

Figure 4 is a block diagram showing the main switching elements of the control unit 66. The input signals coming from sensors 56 and 58 are passed via lines 62 and 64 to two circuits 80 and 82 for signal shaping. These waveform circuits 80 and 82 convert the sinusoidal input signals into corresponding square-wave signals, which are then fed to the trigger circuits 88 and 90 via the lines 84 and 86. These two lockable trigger circuits 88 and 90 can be locked alternately by the oscillator 92 in such a way that either a pulse arrives on line 94 or a pulse on line 96. These two lines 94 and 96 lead to the input of an OR gate 98, the output of which is connected to an UP / DOWN counter 100 via line 102. The signals on line 102 are indicative of the speed pulses of one or the other sensor and the pulse frequency is directly proportional to the speed of rotation of the two shafts 30 and 42, which are monitored by sensors 56 and 58. The oscillator 92 outputs its signals via a further line 104 to the same UP / DOWN counting circuit 100, so that the signals on the line 102 can be correlated with the lockable trigger circuits 88 and 90. In this way it is determined from which trigger circuit the signals at the counter input originate. One of the lockable trigger circuits is used to count up the counter 100, while the other trigger circuit causes the counter to count down the input signals. The signals along line 104, which originate from oscillator 92, set the counter in the “UP” or “DOWN” mode, corresponding to the sensor whose signals are to be counted. The UP / DOWN counter circuit 100 is set to the binary value 4, for example. The counting down of the counter 100 then indicates that one sensor, for example the sensor 56, emits more signals per unit of time than the other sensor, for example the sensor 58. When the UP / DOWN counter 100 is counting up, the reverse is then the case Situation. The time ranges of each of the two counters are determined by the signals of an oscillator 110 together with a window generator 112. Typical time periods or time windows are on the order of 200 milliseconds. The UP / DOWN counter 100 has been set to the binary value 4. As soon as a zero count has been reached in one of the time windows, an output signal DIFF is given on line 114 at the output of counter 100. In the same case, if a binary 8 is reached, this also within one of the time windows, the UP / DOWN counter 100 again generates a DIFF-25 signal which is output on line 114. The DIFF output signal is fed to a flip-flop 116 on the one hand and to the input of a NAND gate 118 on the other hand. The DIFF signal then serves to set the flip-flop 116 such that the input of a driver circuit 120 receives a signal at its Q output via the line 122. The outputs of the driver circuit 120 then provide the necessary current to drive a solenoid 71, which brings the ring gear 52 of the interaxle differential into different positions, and on the other hand, also 35 the current for the indicator lamp 72 to the driver Visual condition.

The flip-flop 116 is reset after a predetermined time by a reset signal from the counter 124 and started with a newly generated DIFF signal. The counter is then in operation again and begins to count again on line 123 after the receipt of an enable signal from flip-flop 116. The reset signal from counter 124 is brought to flip-flop 116 via line 128. The reset signal on line 128 occurs, for example, 435 seconds after the generation of a DIFF signal on line 114, in accordance with the described embodiment. The control circuit can of course be modified in such a way that other time intervals of the various functional sequences are defined in this way; for other embodiments of the invention, these should preferably be greater than 20 seconds. A second output from counter 124 is connected to line 130, which leads to the second input of NAND gate 118. This second output corresponds to the breakdown timer 55 T3 of FIG. 1. Again, a signal on line 126 enables the counting process in counter 124. The output signal from NAND gate 118 is used to set a breakdown flip-flop 136 and if a DIFF signal is present on line 114 at the same time, counter 124 outputs 60 a signal on line 130. This condition requires the presence of a DIFF signal at time T3, when referring to Figure 1. After the breakdown timer 136 has been set, a signal is given on the line 138 and via this to a driver circuit 140 5 which operates the breakdown display unit 144. The second output signal of the breakdown flip-flop 136 via the line 125 to the UP / DOWN counter 100 serves to deactivate the control apparatus so that no

655280

6

ne further influence on the driver circuit 120 is more possible.

FIGS. 5A to 5D show the detailed circuit diagrams of the block diagram of FIG. 4. The two circuits 80 and 82 for signal shaping are identical, so that it is only necessary to describe one of them. The waveform circuit 80 includes a voltage comparator 180, a zener diode D1, and a filter network consisting of the resistors RI, R2 and the capacitors C15, C16 and C4. Resistors R5 and R9 form a voltage divider and supply a reference voltage to voltage comparator 180, the other input of the comparator receives the signals from the sensors. Such conventional types can be used as sensors, such as variable reluctance magnet pickup types, which emit a sinusoidal signal which is converted in circuit 80 into a square wave. The rectangular circuit coming from the comparator is fed to the lockable trigger circuit 88. To simplify the description somewhat, it is assumed that the output signal of the voltage comparator 180 is given directly to the input of the trigger circuit 88 and the effect of the three NAND gates 380, 382 and 384 is only to be explained at a later point. The trigger circuit 88 comprises a D flip-flop 190, which is set when an output signal is received from the voltage comparator 180 and in turn has a logic H at its output. The Q output of the flip-flop 190 is fed to one of the four inputs of the AND gate 192, the other three inputs of which are assigned counter outputs, which will be explained later. Disabled trigger circuit 88 also includes a buffer / inverter / driver 194 which drives a NAND gate 196. The output of NAND gate 196 is a positive pulse approximately 20 microseconds in length and is routed away from trigger circuit 88 via output line 94. An identical 20 microsecond pulse appears on the output line 96 of a blocked trigger circuit 90. The lines 94 and 96 lead to the inputs of an OR gate 99, which was obtained by interconnecting a NOR gate 200 with an inverter 202 on the output side. The output signals of the OR gate 99 are fed into the UP / DOWN counter 100, which can be a presettable binary counter, for example.

Oscillator 92 may include a sample oscillator 210 connected to a four-bit binary counter 212. Counter 212 generates an output code on outputs 214a, b, c and d. Outputs 214a-c result in a binary code that can be represented as A, B and C. The code A, B, C is fed to the inputs of an AND gate 192 in the trigger circuit 88. Likewise, the signal code A, B, C is fed to a corresponding AND gate in the trigger circuit 90. The different codes ensure the condition that only one of the two blocked trigger circuits 88 and 90 trigger at a certain time. The oscillator 210 is typically a 40 kHz oscillator and the sample rate that is provided by the four bit counter to each of the trigger circuits 88 and 90 is typically on the order of 5 kHz. The sample time is chosen much longer than the fastest possible sensor frequency, which can be between 0 and 1 kHz.

The four-bit binary counter 212 generates an output signal on line 104 which leads to the UP / DOWN control input of counter 100. It follows that the counter 100 either counts in one direction or the other, depending on the status of the line 104 in synchronism with the status of the trigger circuits 88 and 90.

Furthermore, an oscillator 110 and a window generator 112 are shown in FIG. 5A. The oscillator 110 generates pulses with a periodicity of 13.3 ms, which are applied to the window generator 112 via the line 220, s The window generator 112 can consist of a dividing circuit and is designed in such a way that it dividing the incoming signals by 16 and generating 200 ms output signals. These signals are applied via line 222 to one input of a NAND gate 224. The other input of NAND gate 224 is influenced by the output signals of NAND gate 226. The output signal of the NAND gate 224 is fed to the UP / DOWN counter 100 and sets it to binary 4 status after every 200 milliseconds. Counter 200 thus has an i5 time window in which it can record the speed pulses on line 102 for a period of 200 milliseconds before it is reset to its binary 4 value. During these 200 milliseconds, counter 100 either counts down to zero or counts up to 20, depending on the difference in the frequency of the pulses from the sensors acting on lines 62 and 64. When a binary 8 is reached, an output signal is given on line 230 to the input of an AND gate 232. When a zero count is reached, a signal is output at counter 100 on output line 234 via an inverter 236 to the second input of an AND gate 232. The output of the AND gate 232 is connected to a NOR gate 238, which outputs a DIFF signal on the line 114 at its output. The DIFF signal has a logical 1, so the counter always reaches either binary 8 or binary 0, which indicates that there is a significant difference in the speeds of the two monitored shafts. This logic 1 of the DIFF signal is then passed on the line 114 via an inverter 240 to the flip-flop 116. The flip-flop 116 includes two cross-connected NAND gates 242 and 244, the output of the NAND gate 242 being connected to an inverter / driver 246. The output of inverter / driver 246 leads 40 via line 122 to a driver circuit 120, which consists of transistors 150, 152 and 154. The solenoid 71 is energized by the driver circuit 120, as well as, for example, an optical indicator 72 which indicates the blocking condition.

45 The output signals of the NAND gate 242 are fed to the counter 124, specifically to the input for enabling the counter. The counter 124 can be set to a predetermined time period or to a fixed time interval of 7.27 or 435 seconds and after this fixed time interval has elapsed, a clock signal is output on the lines 128 and 130. In the described embodiment, the counter 124 is set to a fixed time interval of 435 seconds. An RC timer 255 is also introduced in line 128, which is designed for the delay of approximately 55 half a second. The signal on line 128 goes high at the end of the preset time interval, here for example after 435 seconds, during which the locking condition in the differential is maintained. During the predetermined time interval, the lockout condition remains 60 regardless of the fact that the value of the DIFF signal on line 114 with flip-flop 116 has been reset by the delayed time interval signal on line 128. The time signal on line 128, which delayed by a 65 half-second by the timer 255 goes to the input of a NAND gate 256, the output of which leads to the input of a further NAND gate 242. The second input of NAND gate 256 receives the clock signal of line 126,

7

655 280

which is output by the oscillator 110. NAND gate 256 is provided to prevent the latched flip-flop 116 from going through. The output of NAND gate 256 is brought to logic zero as soon as a clock pulse is present on line 126 and the delayed time signal is present on line 198. The logic low of the NAND gate 256 brings the output of the NAND gate 242 to a logic high, whereupon the solenoid 71 and the display unit 72 are switched off via the inverter / driver 246. At the same time, the logic high at the output of NAND gate 242 resets counter 124.

The timing signal on line 130 is the same signal as that on line 128, but without the delay caused by network 255. This timing signal on line 130 is fed to one input of NAND gate 118 and from there to breakdown flip-flop 136, which consists of two cross-connected NAND gates 260 and 262. The NAND gate 260 also receives a signal from the brake circuit 270 via the line 264, which signal will be described later. The output of the NAND gate 260 provides a breakdown or FS signal which is normally at a logic zero when not in operation and changes to a logic 1 when the pan mode occurs, in which the circuit is interrupted. For example, if the DIFF signal is still present on line 114, i.e. at logic 1, at the time the timing signal is generated on line 130, that is half a second before the delayed signal on line 128 the output of NAND gate 260 goes low, generating a logic 0 indicating FS signal. At the same time, the output of NAND gate 262 also goes to logic 0, so that FS in turn changes to logic 0.

The FS signal from NAND gate 260 is applied to the input of NAND gate 226 in Figure 5A. The gate 226 in turn sends a signal to the NAND gate 224, whereby the UP / DOWN counter 100 is reset and the control circuit is deactivated. The signal from gate 262 then results in a logic 0 on line 138 to inverter / driver 274. The output signals of inverter driver 274 are fed to a driver circuit 140, which consists of transistors 276, 278 and 280, just like the driver Circuit 120 is the case. A breakdown indicator 144 is activated when the system is operating in breakdown mode.

As an additional special feature, FIG. 5A and FIG. 5B show the inclusion of the brake circuit 270 in the circuit of FIG. 4. The brake circuit 270 detects on the one hand the braking conditions and on the other hand the condition when the control circuit is not in operation; These two conditions can occur if, for example, the filament of an indicator lamp has blown or a connecting wire, i.e. a line, has become loose. Line 290 is connected to the brake circuit, vehicle battery, and brake lights. When the brakes are applied, the voltage on line 290 is approximately 13.6 volts. The brake circuit 270 includes the resistors R25, R36, R26, the capacitor C21 and diodes, as can be seen in the figure. Furthermore, voltage comparators 292 and 294 are also used, as is an inverter 296, AND gates 298 and 300, and NAND gate 302. Resistors R7, R49 and R8 form a voltage divider, from which a voltage is applied to one input of the voltage comparator 294, while the other input of the voltage comparator is connected to the line 290 via the resistor R25. If the brake switch is actuated, the output of the voltage comparator 294, which is connected to the inverter 296 via a line 304, goes to logic high and thus brings the output of the inverter to logic 0. The inverter 296 is in turn again with the NOR-5 Gate 306 connected, at its output, ie on line 114, a logic 0 results via NOR gate 238. If a DIFF signal of logic 0 is then received while the brake switch is actuated, the locking circuit is prevented from going into the operating state, io The suppression of the lock during braking is therefore desirable in order to lock the rear axle differential due to a non-synchronous Countering wheel rotation during braking.

The brake circuit 270 also allows detection of an interrupted brake circuit using the voltage comparator 292, which is held low when the brake circuit is open and normally receives a voltage that is between one and two thirds of the voltage from the resistor network R36, R25 and R26 -20 holds. During the time the brake circuit is open, the voltage of a logic signal from comparator 292 and comparator 294 is applied to AND gate 298, which in turn provides signals to NAND gate 302, the output of which is to the AND gate 25 300 to be continued. The output signal output on line 264 is applied to the input of NAND gate 260 of breakdown flip-flop 136, which is thereby reset and generates a breakdown signal of logic 1. The FS signal sets the UP / DOWN counter 100 30 via the NAND gate 226, which prevents further generation of the DIFF signal on line 114.

Although both states, the brake applied or the brake switch closed, and an open or on / off connection to the stop light circuit cause the solenoid driver 120 to operate, the open circuit activates the breakdown flip-flop 136, which then remains activated until, by manually resetting during braking, the generation of any DIFF signal on line 114 via NOR gate 238 40 is temporarily suppressed. If, in the latter case, the brake lights then switch off, the control circuit puts the sole-noid driver 120 into operation.

Another additional characteristic of the circuit is shown in FIG. 5. This relates to a self-test circuit 330 45 for the supply voltage, consisting of two cross-connected NAND gates 332, 334, inverters 336 and 338 and NAND gate 340. This self-test circuit also contains capacitor C10, a resistor R27 and a NAND Gate 342 (Fig. 5A). The voltage regulator as shown in Figure 5A provides a regulated output voltage V of approximately 6 volts. During switch-on, the 6 volt pulses PUP are kept constant 55 for approximately 2 seconds using an RC time constant from the resistor R27 and the capacitor C10. The supply voltage signal then secures a logic 0 signal at the output of the NAND gate 342, which is connected to the NAND gate 332 via the line 344. This signal also serves as a means of testing the circuit for the presence of a supply voltage 60 by providing a TEST and a TEST signal which simulates a sensor input signal by simulating a count using NAND gates 380 and 382. A signal corresponding to the D code is emitted by the four-bit binary counter 212 and fed to the input of the NAND-65 gate 380. After actuation of the vehicle starter and when the voltage regulator outputs a stable voltage, 384 pulses are supplied by the NAND gate, which are supplied to the D flip-flop 190,

655 280

which triggers a simulated count using the oscillator 210 and the binary counter 212. The lockable trigger circuit 90 does not receive simulated counts and can therefore generate a DIFF signal on line 114. The DIFF signal is fed together with the TEST signal to the NAND gate 340, which resets the self-test flip-flop 330 (it is set by the PWR RST signal) and likewise also the pan-flip-flop 136 reset. The breakdown indicator element 144 remains in operation for a further two seconds, this corresponds to the time grid during which the restart signal PWR RST is present. After the PWR RST signal has returned to 0, the breakdown display unit also clears, unless any malfunction is found in the overall circuit. The output of NAND gate 342 also serves as a supply voltage reset signal (PWR RST) and is used together with the PUP signal via NAND gates 210, 242, 332 and 300 to control the counters and flip-flops associated with them Related NAND gates to reset. The supply voltage switch-on sequence initializes the overall system as well as the visual display that the breakdown display and the electronic components of the control circuit are operating normally.

The integrated circuits which can be used for the circuits shown in FIGS. 5A and 5B are also given in the following list:

element

value

Reference number

Part number

82,180,292,294

LM

2901

190

CD

4013

196,210

CD

4093

192

CD

4082

194

CD

4007

100,112,212

F

4029

202,236,336,338

CD

4049

240,246,274,296

110

LM

555

242,260,340

CD

4023

118,224,226,244,

CD

4011

256,262,302, 332,

334,380, 382,384

124

CD

4040

200,238,306

CD

4001

232,298,300

CD

4081

The information for representative values of the circuit components, as are used in the circuit of FIGS. 5A and 5B, is given in a further list:

table

element

value

R1

R2

R3a

R3b

R4

R5

R6

10K

10K

*

*

10K 1.5K 160K

R7 s R8 R9 RIO RH R12 io R13 R14 R14b R15 R16 15 R17 R18 R19 R20a R20b 2o R21a R21b R22 R23 R25 25 R26 R27 R28 R29 R31 30 R32 R34 R35 R36 R39 35 R40 R41 R42 R43 R44 40 R49 R50 R6 RI R52 R60 45 R62 Cl C2 C3 50 C4 C5 C6 C7 C8 55 C10 Cll C12 C13 C14 60 C15-C21 C22 C50 C51 C60

65 Dl D4 D6 D7

4.7K

4.7K

1.5K

27K

10K

10K

10K

*

*

10K 1.5K 160K 1.5K

10K

*

*

*

*

470

470

1.8K

10K

68K

20th

300

150

220

180

220

7.5K

8.2K

4.7K

1K

8.2K

4.7K

1K

4.7K

3K

3K

10K

47

150K

6.2

150pf

0.0 luf

150pf run

150pf

0.0 luf

0.047

lOuf

47uf

0.0 luf

0.001uf lOuf lOuf

0.001uf

0.001

0, air

2.2uf lOOOpf

1N5221

1N5221

1N4001

lN4734a

9

655 280

Element value Element value

D8 1N5395 Dl 5 NZP4746

D9 1N4736 s D16 1N4001

DIO 1N4755 D20 MZP4746

Dil 1N4004 D21 1N5395

Dl 2 1N4002 LI 2.2uh

D13 1N4755

D14 1N4004 io * selected according to the desired output values.

15

20th

25th

30th

35

40

45

50

55

60

65

S

4 sheets of drawings

Claims (12)

655 280 2nd PATENT CLAIMS 1. A method for suppressing the slip on a vehicle with a main drive shaft, a first and a second output shaft for transmitting a torque to the wheels of the vehicle and a means for coupling the main drive shaft with the first and the second output shaft, characterized by the following method steps: a) determining a slip condition between two of the three shafts, one drive and two output shafts; b) blocking the means for coupling the shafts to one another to suppress the slip condition; c) maintaining the locking condition for a predetermined period of time, and d) locking the clutch means if the slip condition is determined before the end of the period. 2. The method according to claim 1, characterized in that maintaining the locking condition for a predetermined period of time regardless of the condition in which the two shafts are between which the slip condition was determined. 3. Device for performing the method according to claim 1, characterized by the following means: a) sensor means (56, 58, 14) for determining the relative speed of a first and a second output shaft, b) control means (10), which respond to the sensor means when a slip condition occurs, with a means for canceling the slip condition, c) a means for actuating the means for canceling the slip condition and for emitting a control signal, d) wherein the actuating means remains ready for operation for a predetermined period of time after the actuation, and e) a time relay (16, 18) which can be actuated at a specific point in time before the expiry of the predetermined period of time for de-energizing the control device, provided that the control signal is fixed The time is still there. 4. The device according to claim 3, characterized in that it has a means (22) for locking two rotating shafts of the differential. 5. The device according to claim 3 on a vehicle with a tandem drive, which has a front rear axle (24) and a rear rear axle (26), characterized in that it on the inter-axle differential (32) which divides the torque between these two axles , works. 6. The device according to claim 5, characterized in that the control means (10) generates a control signal (DIFF) when the slip condition occurs in order to activate the means for suppressing the slip condition (22) and that the device in the further means (118, 136 ) to detect a breakdown, which are switched on for a fixed time before the predetermined time period expires to switch off the control means, in the event that the control signal is still present during this fixed time period. 7. The device according to claim 6, characterized in that the breakdown detection means is set up to operate over a fixed period of time. 8. The device according to claim 7, characterized in that the fixed period does not exceed the period of one minute. 9. The device according to claim 6, characterized in that this fixed time period is adjacent to the predetermined time period. 10. The device according to claim 3 or 6, characterized in that means are available which respond to the vehicle brakes and thereby generate a brake signal and that means are available to record this brake signal and to put the control means out of operation, the control means the slip conditions during the operation of the vehicle brakes. 11. The device according to claim 3 or 6, characterized in that means for determining a switch-off condition are present in the brake light circuit, and means io for switching off the operation of the control means when this switch-off condition occurs, the control means being deactivated as soon as these switch-off conditions of the brake light circuit are determined . 12. The apparatus according to claim 3, characterized in that two sensors (56, 58) are arranged adjacent to two rotating shafts (30, 42) and emit signals of a frequency that is proportional to the corresponding speed of the shafts and act on the following means: a) a gate circuit (80, 82, 88,90,92,98) for recording the signals of each sensor, b) counting means (100) for the signals from the gate circuit to generate a difference signal as soon as a certain difference occurs in the counting of the counting means, c) timing means (112, 114) for receiving said difference signal to in turn generate a control signal over a predetermined period of time; and d) drive means (71) responsive to the control signal to release the slip condition.