CH619309A5 - - Google Patents
Download PDFInfo
- Publication number
- CH619309A5 CH619309A5 CH527577A CH527577A CH619309A5 CH 619309 A5 CH619309 A5 CH 619309A5 CH 527577 A CH527577 A CH 527577A CH 527577 A CH527577 A CH 527577A CH 619309 A5 CH619309 A5 CH 619309A5
- Authority
- CH
- Switzerland
- Prior art keywords
- memory
- address
- key
- access
- register
- Prior art date
Links
- 230000015654 memory Effects 0.000 claims description 434
- 238000013519 translation Methods 0.000 claims description 43
- 238000012545 processing Methods 0.000 claims description 14
- 230000000903 blocking effect Effects 0.000 claims description 2
- 230000001419 dependent effect Effects 0.000 claims description 2
- 230000005540 biological transmission Effects 0.000 claims 1
- 238000000034 method Methods 0.000 description 15
- 230000008569 process Effects 0.000 description 14
- 238000012546 transfer Methods 0.000 description 9
- 238000012544 monitoring process Methods 0.000 description 7
- 239000003795 chemical substances by application Substances 0.000 description 5
- 230000000295 complement effect Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 230000003068 static effect Effects 0.000 description 4
- 238000010276 construction Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 241000153282 Theope Species 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 230000009118 appropriate response Effects 0.000 description 1
- 238000013475 authorization Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 238000003745 diagnosis Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 238000007726 management method Methods 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 230000002085 persistent effect Effects 0.000 description 1
- 230000010363 phase shift Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 239000011435 rock Substances 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000013024 troubleshooting Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/682,224 US4038645A (en) | 1976-04-30 | 1976-04-30 | Non-translatable storage protection control system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CH619309A5 true CH619309A5 (fr) | 1980-09-15 |
Family
ID=24738749
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CH527577A CH619309A5 (fr) | 1976-04-30 | 1977-04-28 |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US4038645A (fr) |
| JP (1) | JPS52133726A (fr) |
| AU (1) | AU508044B2 (fr) |
| BR (1) | BR7702781A (fr) |
| CA (1) | CA1075367A (fr) |
| CH (1) | CH619309A5 (fr) |
| ES (1) | ES458312A1 (fr) |
| FR (1) | FR2349886A1 (fr) |
| GB (1) | GB1557112A (fr) |
| SE (1) | SE417650B (fr) |
Families Citing this family (38)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4104721A (en) * | 1976-12-30 | 1978-08-01 | International Business Machines Corporation | Hierarchical security mechanism for dynamically assigning security levels to object programs |
| US4241401A (en) * | 1977-12-19 | 1980-12-23 | Sperry Corporation | Virtual address translator utilizing interrupt level code |
| US4320455A (en) * | 1978-01-09 | 1982-03-16 | Honeywell Information Systems Inc. | Queue structure for a data processing system |
| US4354225A (en) * | 1979-10-11 | 1982-10-12 | Nanodata Computer Corporation | Intelligent main store for data processing systems |
| WO1981001066A1 (fr) * | 1979-10-11 | 1981-04-16 | Nanodata Computer Corp | Systeme de traitement de donnees |
| US4374411A (en) * | 1980-02-14 | 1983-02-15 | Hayes Microcomputer Products, Inc. | Relocatable read only memory |
| US4355355A (en) * | 1980-03-19 | 1982-10-19 | International Business Machines Corp. | Address generating mechanism for multiple virtual spaces |
| US4500952A (en) * | 1980-05-23 | 1985-02-19 | International Business Machines Corporation | Mechanism for control of address translation by a program using a plurality of translation tables |
| US4366537A (en) * | 1980-05-23 | 1982-12-28 | International Business Machines Corp. | Authorization mechanism for transfer of program control or data between different address spaces having different storage protect keys |
| US4439830A (en) * | 1981-11-09 | 1984-03-27 | Control Data Corporation | Computer system key and lock protection mechanism |
| US4472790A (en) * | 1982-02-05 | 1984-09-18 | International Business Machines Corporation | Storage fetch protect override controls |
| JPS6047624B2 (ja) * | 1982-06-30 | 1985-10-22 | 富士通株式会社 | アドレス変換制御方式 |
| JPS5958700A (ja) * | 1982-09-29 | 1984-04-04 | Fujitsu Ltd | 記憶保護判定方式 |
| US4550350A (en) * | 1983-07-19 | 1985-10-29 | Software Distribution Newtork, Inc. | Secure copy method and device for stored programs |
| JPS60107156A (ja) * | 1983-11-16 | 1985-06-12 | Hitachi Ltd | デ−タ処理システム |
| JPS60107155A (ja) * | 1983-11-16 | 1985-06-12 | Hitachi Ltd | 記憶ボリユ−ムのデ−タ保護方式 |
| US4561051A (en) * | 1984-02-10 | 1985-12-24 | Prime Computer, Inc. | Memory access method and apparatus in multiple processor systems |
| US4677546A (en) * | 1984-08-17 | 1987-06-30 | Signetics | Guarded regions for controlling memory access |
| JPS6155754A (ja) * | 1984-08-28 | 1986-03-20 | Nec Corp | 記憶保護方式 |
| US4901273A (en) * | 1985-03-12 | 1990-02-13 | Pitney Bowes Inc. | Electronic postage meter having a memory map decoder |
| US4727485A (en) * | 1986-01-02 | 1988-02-23 | Motorola, Inc. | Paged memory management unit which locks translators in translation cache if lock specified in translation table |
| US4682283A (en) * | 1986-02-06 | 1987-07-21 | Rockwell International Corporation | Address range comparison system using multiplexer for detection of range identifier bits stored in dedicated RAM's |
| JPS6376034A (ja) * | 1986-09-19 | 1988-04-06 | Hitachi Ltd | 多重アドレス空間制御方式 |
| US4930073A (en) * | 1987-06-26 | 1990-05-29 | International Business Machines Corporation | Method to prevent use of incorrect program version in a computer system |
| US5317717A (en) * | 1987-07-01 | 1994-05-31 | Digital Equipment Corp. | Apparatus and method for main memory unit protection using access and fault logic signals |
| IN169635B (fr) * | 1987-07-01 | 1991-11-23 | Digital Equipment Corp | |
| US5361341A (en) * | 1987-10-02 | 1994-11-01 | Sgs-Thomson Microelectronics, S.A. | Device for enabling the use of the contents of memory areas of an electronic microprocessor system |
| US5297268A (en) * | 1988-06-03 | 1994-03-22 | Dallas Semiconductor Corporation | ID protected memory with a readable/writable ID template |
| DE68924755D1 (de) * | 1988-10-31 | 1995-12-14 | Ibm | Mehrfachverarbeitungssystem und Verfahren für gemeinsame Speichernutzung. |
| US5483646A (en) * | 1989-09-29 | 1996-01-09 | Kabushiki Kaisha Toshiba | Memory access control method and system for realizing the same |
| US5237668A (en) * | 1989-10-20 | 1993-08-17 | International Business Machines Corporation | Process using virtual addressing in a non-privileged instruction to control the copying of a page of data in or between multiple media |
| US5499356A (en) * | 1989-12-29 | 1996-03-12 | Cray Research, Inc. | Method and apparatus for a multiprocessor resource lockout instruction |
| US5548746A (en) * | 1993-11-12 | 1996-08-20 | International Business Machines Corporation | Non-contiguous mapping of I/O addresses to use page protection of a process |
| FR2728363A1 (fr) * | 1994-12-20 | 1996-06-21 | Sgs Thomson Microelectronics | Dispositif de protection de l'acces a des mots memoires |
| GB2325061B (en) * | 1997-04-30 | 2001-06-06 | Advanced Risc Mach Ltd | Memory access protection |
| US6182174B1 (en) | 1998-04-13 | 2001-01-30 | International Business Machines Corporation | Memory card interface method using multiplexed storage protect key to indicate command acceptance |
| US20080263256A1 (en) * | 2007-04-20 | 2008-10-23 | Motorola, Inc. | Logic Device with Write Protected Memory Management Unit Registers |
| US9245110B2 (en) * | 2013-12-17 | 2016-01-26 | International Business Machines Corporation | Stack entry overwrite protection |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1329721A (en) * | 1970-05-26 | 1973-09-12 | Plessey Co Ltd | Data processing devices |
| GB1410631A (en) * | 1972-01-26 | 1975-10-22 | Plessey Co Ltd | Data processing system interrupt arrangements |
| US3916385A (en) * | 1973-12-12 | 1975-10-28 | Honeywell Inf Systems | Ring checking hardware |
-
1976
- 1976-04-30 US US05/682,224 patent/US4038645A/en not_active Expired - Lifetime
-
1977
- 1977-03-04 FR FR7707429A patent/FR2349886A1/fr active Granted
- 1977-04-05 GB GB14245/77A patent/GB1557112A/en not_active Expired
- 1977-04-05 CA CA275,544A patent/CA1075367A/fr not_active Expired
- 1977-04-12 JP JP4104577A patent/JPS52133726A/ja active Granted
- 1977-04-28 CH CH527577A patent/CH619309A5/de not_active IP Right Cessation
- 1977-04-29 SE SE7704966A patent/SE417650B/xx unknown
- 1977-04-29 ES ES458312A patent/ES458312A1/es not_active Expired
- 1977-04-29 BR BR7702781A patent/BR7702781A/pt unknown
- 1977-05-02 AU AU24748/77A patent/AU508044B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS52133726A (en) | 1977-11-09 |
| JPS5736679B2 (fr) | 1982-08-05 |
| FR2349886A1 (fr) | 1977-11-25 |
| BR7702781A (pt) | 1978-02-21 |
| SE7704966L (sv) | 1977-10-31 |
| AU508044B2 (en) | 1980-03-06 |
| SE417650B (sv) | 1981-03-30 |
| ES458312A1 (es) | 1978-02-01 |
| FR2349886B1 (fr) | 1978-10-20 |
| AU2474877A (en) | 1978-11-09 |
| US4038645A (en) | 1977-07-26 |
| GB1557112A (en) | 1979-12-05 |
| CA1075367A (fr) | 1980-04-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE2716051C2 (de) | Datenverarbeitungsanlage mit einem oder mehreren Prozessoren mit mindestem einem Ein-/Ausgabekanal mit mehreren Unterkanälen und mit einer Speicheranordnung, bei der zum Speicherzugriff Schlüssel verwendet werden | |
| CH619309A5 (fr) | ||
| CH615521A5 (fr) | ||
| DE2350225C2 (fr) | ||
| DE69834739T2 (de) | Ausgleichen von daten die zwischen verschiedenen leitern fliessen die auf unterschiedlichen frequenzen operieren | |
| DE2416609C2 (de) | Datenverarbeitungsanlage mit einer zentralen Verarbeitungseinheit und Multiprogrammierung mit mehreren Programmunterbrechungs-Prioritätsstufen | |
| DE4221278C2 (de) | Busgekoppeltes Mehrrechnersystem | |
| DE2629459C2 (fr) | ||
| DE2953861C2 (fr) | ||
| DE2414311C2 (de) | Speicherschutzeinrichtung | |
| DE2902465A1 (de) | Datenverarbeitungsanordnung | |
| DE2417795C2 (de) | Datenverarbeitungsanlage | |
| DE1774296B2 (de) | Restruktuierbare Steuereinheit für elektronische Digitalrechner | |
| DE3320858A1 (de) | Speicher-managementanordnung fuer mikroprozessorsysteme | |
| DE2054830C3 (de) | Informationsverarbeitungsanlage mit Mitteln zum Zugriff zu Speicher-Datenfeldern variabler Länge | |
| DE2612139A1 (de) | Ein/ausgang-steuerungssystem | |
| DE3741850A1 (de) | Ausfuehrungseinheit fuer einen i/o-prozessor | |
| DE2755616A1 (de) | Asymmetrischer multiprozessor | |
| DE2441754A1 (de) | Prozessor-datenuebertragungssteueranordnung sowie verfahren zur steuerung der datenuebertragung eines prozessors | |
| DE2652869A1 (de) | Datensicherungseinrichtung | |
| DE1549531A1 (de) | Digitale Rechenanlage | |
| DE3911721C2 (fr) | ||
| EP0500973A1 (fr) | Routine d'initialisation dans une EEPROM | |
| DE2144051A1 (de) | Programm Unterbrechungsanordnung für eine Datenverarbeitungsanlage | |
| DE2717700C2 (de) | Speicherzugriffsanordnung |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PL | Patent ceased |