CH615521A5 - - Google Patents
Download PDFInfo
- Publication number
- CH615521A5 CH615521A5 CH527477A CH527477A CH615521A5 CH 615521 A5 CH615521 A5 CH 615521A5 CH 527477 A CH527477 A CH 527477A CH 527477 A CH527477 A CH 527477A CH 615521 A5 CH615521 A5 CH 615521A5
- Authority
- CH
- Switzerland
- Prior art keywords
- memory
- address
- processor
- key
- register
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0615—Address space extension
- G06F12/0623—Address space extension for memory modules
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Storage Device Security (AREA)
- Executing Machine-Instructions (AREA)
- Memory System (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/682,223 US4042911A (en) | 1976-04-30 | 1976-04-30 | Outer and asynchronous storage extension system |
Publications (1)
Publication Number | Publication Date |
---|---|
CH615521A5 true CH615521A5 (it) | 1980-01-31 |
Family
ID=24738744
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CH527477A CH615521A5 (it) | 1976-04-30 | 1977-04-28 |
Country Status (10)
Country | Link |
---|---|
US (1) | US4042911A (it) |
JP (1) | JPS52132741A (it) |
AU (1) | AU507989B2 (it) |
BR (1) | BR7702819A (it) |
CA (1) | CA1078070A (it) |
CH (1) | CH615521A5 (it) |
ES (1) | ES458320A1 (it) |
FR (1) | FR2349888A1 (it) |
GB (1) | GB1557120A (it) |
SE (1) | SE418778B (it) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4228496A (en) * | 1976-09-07 | 1980-10-14 | Tandem Computers Incorporated | Multiprocessor system |
SE403322B (sv) * | 1977-02-28 | 1978-08-07 | Ellemtel Utvecklings Ab | Anordning i en styrdator for forkortning av exekveringstiden for instruktioner vid indirekt adressering av ett dataminne |
US4363091A (en) * | 1978-01-31 | 1982-12-07 | Intel Corporation | Extended address, single and multiple bit microprocessor |
US4340932A (en) * | 1978-05-17 | 1982-07-20 | Harris Corporation | Dual mapping memory expansion unit |
US4246637A (en) * | 1978-06-26 | 1981-01-20 | International Business Machines Corporation | Data processor input/output controller |
US4373179A (en) * | 1978-06-26 | 1983-02-08 | Fujitsu Limited | Dynamic address translation system |
JPS559260A (en) * | 1978-07-03 | 1980-01-23 | Nec Corp | Information processing system |
FR2431732A1 (fr) * | 1978-07-19 | 1980-02-15 | Materiel Telephonique | Dispositif de conversion d'adresse virtuelle en adresse reelle |
US4388685A (en) * | 1978-08-04 | 1983-06-14 | Digital Equipment Corporation | Central processor with apparatus for extended virtual addressing |
US4258419A (en) * | 1978-12-29 | 1981-03-24 | Bell Telephone Laboratories, Incorporated | Data processing apparatus providing variable operand width operation |
US4521858A (en) * | 1980-05-20 | 1985-06-04 | Technology Marketing, Inc. | Flexible addressing and sequencing system for operand memory and control store using dedicated micro-address registers loaded solely from alu |
US4386401A (en) * | 1980-07-28 | 1983-05-31 | Sperry Corporation | High speed processing restarting apparatus |
US4403283A (en) * | 1980-07-28 | 1983-09-06 | Ncr Corporation | Extended memory system and method |
US4368515A (en) * | 1981-05-07 | 1983-01-11 | Atari, Inc. | Bank switchable memory system |
US4432053A (en) * | 1981-06-29 | 1984-02-14 | Burroughs Corporation | Address generating apparatus and method |
WO1984002784A1 (en) * | 1982-12-30 | 1984-07-19 | Ibm | Virtual memory address translation mechanism with controlled data persistence |
US4858109A (en) * | 1985-02-14 | 1989-08-15 | Ag Communication Systems Corporation | Program code fetch from data memory arrangement |
US4916603A (en) * | 1985-03-18 | 1990-04-10 | Wang Labortatories, Inc. | Distributed reference and change table for a virtual memory system |
IT1183808B (it) * | 1985-04-30 | 1987-10-22 | Olivetti & Co Spa | Circuito elettronico per collegare un microprocessore ad una memoria ad elevata capacita |
JPS62102344A (ja) * | 1985-10-29 | 1987-05-12 | Fujitsu Ltd | バツフア・メモリ制御方式 |
US5293594A (en) * | 1986-05-24 | 1994-03-08 | Hitachi, Ltd. | Data processing system having a plurality of register groups and a logical or circuit for addressing one register of one of the register groups |
JPH01112450A (ja) * | 1987-10-27 | 1989-05-01 | Sharp Corp | メモリ管理ユニット |
US5008811A (en) * | 1988-02-10 | 1991-04-16 | International Business Machines Corp. | Control mechanism for zero-origin data spaces |
US5155834A (en) * | 1988-03-18 | 1992-10-13 | Wang Laboratories, Inc. | Reference and change table storage system for virtual memory data processing system having a plurality of processors accessing common memory |
US5113512A (en) * | 1988-06-21 | 1992-05-12 | Matsushita Electric Industrial Co., Ltd. | System for managing a storage medium reducing physical space needed |
US5317706A (en) * | 1989-11-15 | 1994-05-31 | Ncr Corporation | Memory expansion method and apparatus in a virtual memory system |
US5423013A (en) * | 1991-09-04 | 1995-06-06 | International Business Machines Corporation | System for addressing a very large memory with real or virtual addresses using address mode registers |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3723976A (en) * | 1972-01-20 | 1973-03-27 | Ibm | Memory system with logical and real addressing |
FR130806A (it) * | 1973-11-21 | |||
US3916385A (en) * | 1973-12-12 | 1975-10-28 | Honeywell Inf Systems | Ring checking hardware |
FR122199A (it) * | 1973-12-17 | |||
US3909798A (en) * | 1974-01-25 | 1975-09-30 | Raytheon Co | Virtual addressing method and apparatus |
FR119649A (it) * | 1975-03-24 |
-
1976
- 1976-04-30 US US05/682,223 patent/US4042911A/en not_active Expired - Lifetime
-
1977
- 1977-03-02 FR FR7706858A patent/FR2349888A1/fr active Granted
- 1977-04-05 CA CA275,574A patent/CA1078070A/en not_active Expired
- 1977-04-05 GB GB14267/77A patent/GB1557120A/en not_active Expired
- 1977-04-06 JP JP3862177A patent/JPS52132741A/ja active Granted
- 1977-04-28 CH CH527477A patent/CH615521A5/de not_active IP Right Cessation
- 1977-04-29 SE SE7704955A patent/SE418778B/xx unknown
- 1977-04-29 ES ES458320A patent/ES458320A1/es not_active Expired
- 1977-05-02 BR BR7702819A patent/BR7702819A/pt unknown
- 1977-05-02 AU AU24750/77A patent/AU507989B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
FR2349888B1 (it) | 1980-12-19 |
GB1557120A (en) | 1979-12-05 |
ES458320A1 (es) | 1978-03-01 |
SE418778B (sv) | 1981-06-22 |
JPS52132741A (en) | 1977-11-07 |
FR2349888A1 (fr) | 1977-11-25 |
BR7702819A (pt) | 1978-04-04 |
AU2475077A (en) | 1978-11-09 |
AU507989B2 (en) | 1980-03-06 |
JPS5751132B2 (it) | 1982-10-30 |
US4042911A (en) | 1977-08-16 |
SE7704955L (sv) | 1977-10-31 |
CA1078070A (en) | 1980-05-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE2716051C2 (de) | Datenverarbeitungsanlage mit einem oder mehreren Prozessoren mit mindestem einem Ein-/Ausgabekanal mit mehreren Unterkanälen und mit einer Speicheranordnung, bei der zum Speicherzugriff Schlüssel verwendet werden | |
CH615521A5 (it) | ||
CH619309A5 (it) | ||
DE69124905T2 (de) | Datenverarbeitungsvorrichtung zur dynamischen Zeiteinstellung in einem dynamischen Speichersystem | |
DE3685876T2 (de) | Meister-sklave-mikroprozessorsystem mit einem virtuellen speicher. | |
DE69233655T2 (de) | Mikroprozessorarchitektur mit der Möglichkeit zur Unterstützung mehrerer verschiedenartiger Prozessoren | |
DE68913914T2 (de) | Multiprozessorsystem mit Vervielfältigung von globalen Daten. | |
DE2350225C2 (it) | ||
DE69024078T2 (de) | Mehrprozessoranordnung mit Vervielfältigung von globalen Daten und mit zwei Stufen von Adressübersetzungseinheiten | |
DE4221278C2 (de) | Busgekoppeltes Mehrrechnersystem | |
DE2629459C2 (it) | ||
DE68923863T2 (de) | Ein-/Ausgabecachespeicherung. | |
DE2953861C2 (it) | ||
DE2414311C2 (de) | Speicherschutzeinrichtung | |
DE69131840T2 (de) | Verfahren zur Vervielfältigung eines geteilten Speichers | |
DE2523372B2 (de) | Eingabe-ZAusgabe-Anschlußsteuereinrichtung | |
DE2054830C3 (de) | Informationsverarbeitungsanlage mit Mitteln zum Zugriff zu Speicher-Datenfeldern variabler Länge | |
DE2902465A1 (de) | Datenverarbeitungsanordnung | |
DE3011552A1 (de) | Datenverarbeitungsanlage mit einem hauptspeicher sowie wenigsten einem datenprozessor mit zugeordnetem adressenumformer | |
DE2441754A1 (de) | Prozessor-datenuebertragungssteueranordnung sowie verfahren zur steuerung der datenuebertragung eines prozessors | |
DE2755616A1 (de) | Asymmetrischer multiprozessor | |
DE69029815T2 (de) | Zentralisierte referenz- und änderungstabelle für eine virtuelle speicheranordnung | |
DE3911721C2 (it) | ||
DE2144051A1 (de) | Programm Unterbrechungsanordnung für eine Datenverarbeitungsanlage | |
DE2828741A1 (de) | Einrichtung fuer die weiterleitung von speicherzugriffsanforderungen |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PL | Patent ceased |