CH615521A5 - - Google Patents

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Publication number
CH615521A5
CH615521A5 CH527477A CH527477A CH615521A5 CH 615521 A5 CH615521 A5 CH 615521A5 CH 527477 A CH527477 A CH 527477A CH 527477 A CH527477 A CH 527477A CH 615521 A5 CH615521 A5 CH 615521A5
Authority
CH
Switzerland
Prior art keywords
memory
address
processor
key
register
Prior art date
Application number
CH527477A
Other languages
German (de)
English (en)
Inventor
Donall Garraid Bourke
Frederic John Puttlitz
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of CH615521A5 publication Critical patent/CH615521A5/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615Address space extension
    • G06F12/0623Address space extension for memory modules

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Memory System (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
CH527477A 1976-04-30 1977-04-28 CH615521A5 (US06168776-20010102-C00041.png)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/682,223 US4042911A (en) 1976-04-30 1976-04-30 Outer and asynchronous storage extension system

Publications (1)

Publication Number Publication Date
CH615521A5 true CH615521A5 (US06168776-20010102-C00041.png) 1980-01-31

Family

ID=24738744

Family Applications (1)

Application Number Title Priority Date Filing Date
CH527477A CH615521A5 (US06168776-20010102-C00041.png) 1976-04-30 1977-04-28

Country Status (10)

Country Link
US (1) US4042911A (US06168776-20010102-C00041.png)
JP (1) JPS52132741A (US06168776-20010102-C00041.png)
AU (1) AU507989B2 (US06168776-20010102-C00041.png)
BR (1) BR7702819A (US06168776-20010102-C00041.png)
CA (1) CA1078070A (US06168776-20010102-C00041.png)
CH (1) CH615521A5 (US06168776-20010102-C00041.png)
ES (1) ES458320A1 (US06168776-20010102-C00041.png)
FR (1) FR2349888A1 (US06168776-20010102-C00041.png)
GB (1) GB1557120A (US06168776-20010102-C00041.png)
SE (1) SE418778B (US06168776-20010102-C00041.png)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4228496A (en) * 1976-09-07 1980-10-14 Tandem Computers Incorporated Multiprocessor system
SE403322B (sv) * 1977-02-28 1978-08-07 Ellemtel Utvecklings Ab Anordning i en styrdator for forkortning av exekveringstiden for instruktioner vid indirekt adressering av ett dataminne
US4363091A (en) * 1978-01-31 1982-12-07 Intel Corporation Extended address, single and multiple bit microprocessor
US4340932A (en) * 1978-05-17 1982-07-20 Harris Corporation Dual mapping memory expansion unit
US4373179A (en) * 1978-06-26 1983-02-08 Fujitsu Limited Dynamic address translation system
US4246637A (en) * 1978-06-26 1981-01-20 International Business Machines Corporation Data processor input/output controller
JPS559260A (en) * 1978-07-03 1980-01-23 Nec Corp Information processing system
FR2431732A1 (fr) * 1978-07-19 1980-02-15 Materiel Telephonique Dispositif de conversion d'adresse virtuelle en adresse reelle
US4388685A (en) * 1978-08-04 1983-06-14 Digital Equipment Corporation Central processor with apparatus for extended virtual addressing
US4258419A (en) * 1978-12-29 1981-03-24 Bell Telephone Laboratories, Incorporated Data processing apparatus providing variable operand width operation
US4521858A (en) * 1980-05-20 1985-06-04 Technology Marketing, Inc. Flexible addressing and sequencing system for operand memory and control store using dedicated micro-address registers loaded solely from alu
US4386401A (en) * 1980-07-28 1983-05-31 Sperry Corporation High speed processing restarting apparatus
US4403283A (en) * 1980-07-28 1983-09-06 Ncr Corporation Extended memory system and method
US4368515A (en) * 1981-05-07 1983-01-11 Atari, Inc. Bank switchable memory system
US4432053A (en) * 1981-06-29 1984-02-14 Burroughs Corporation Address generating apparatus and method
USRE37305E1 (en) * 1982-12-30 2001-07-31 International Business Machines Corporation Virtual memory address translation mechanism with controlled data persistence
US4858109A (en) * 1985-02-14 1989-08-15 Ag Communication Systems Corporation Program code fetch from data memory arrangement
US4916603A (en) * 1985-03-18 1990-04-10 Wang Labortatories, Inc. Distributed reference and change table for a virtual memory system
IT1183808B (it) * 1985-04-30 1987-10-22 Olivetti & Co Spa Circuito elettronico per collegare un microprocessore ad una memoria ad elevata capacita
JPS62102344A (ja) * 1985-10-29 1987-05-12 Fujitsu Ltd バツフア・メモリ制御方式
US5293594A (en) * 1986-05-24 1994-03-08 Hitachi, Ltd. Data processing system having a plurality of register groups and a logical or circuit for addressing one register of one of the register groups
JPH01112450A (ja) * 1987-10-27 1989-05-01 Sharp Corp メモリ管理ユニット
US5008811A (en) * 1988-02-10 1991-04-16 International Business Machines Corp. Control mechanism for zero-origin data spaces
US5155834A (en) * 1988-03-18 1992-10-13 Wang Laboratories, Inc. Reference and change table storage system for virtual memory data processing system having a plurality of processors accessing common memory
US5113512A (en) * 1988-06-21 1992-05-12 Matsushita Electric Industrial Co., Ltd. System for managing a storage medium reducing physical space needed
US5317706A (en) * 1989-11-15 1994-05-31 Ncr Corporation Memory expansion method and apparatus in a virtual memory system
US5423013A (en) * 1991-09-04 1995-06-06 International Business Machines Corporation System for addressing a very large memory with real or virtual addresses using address mode registers

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3723976A (en) * 1972-01-20 1973-03-27 Ibm Memory system with logical and real addressing
FR130806A (US06168776-20010102-C00041.png) * 1973-11-21
US3916385A (en) * 1973-12-12 1975-10-28 Honeywell Inf Systems Ring checking hardware
FR122199A (US06168776-20010102-C00041.png) * 1973-12-17
US3909798A (en) * 1974-01-25 1975-09-30 Raytheon Co Virtual addressing method and apparatus
FR119649A (US06168776-20010102-C00041.png) * 1975-03-24

Also Published As

Publication number Publication date
SE7704955L (sv) 1977-10-31
JPS5751132B2 (US06168776-20010102-C00041.png) 1982-10-30
ES458320A1 (es) 1978-03-01
GB1557120A (en) 1979-12-05
AU2475077A (en) 1978-11-09
CA1078070A (en) 1980-05-20
AU507989B2 (en) 1980-03-06
FR2349888A1 (fr) 1977-11-25
BR7702819A (pt) 1978-04-04
SE418778B (sv) 1981-06-22
US4042911A (en) 1977-08-16
JPS52132741A (en) 1977-11-07
FR2349888B1 (US06168776-20010102-C00041.png) 1980-12-19

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Legal Events

Date Code Title Description
PL Patent ceased