CH607462A5 - - Google Patents

Info

Publication number
CH607462A5
CH607462A5 CH650276A CH650276A CH607462A5 CH 607462 A5 CH607462 A5 CH 607462A5 CH 650276 A CH650276 A CH 650276A CH 650276 A CH650276 A CH 650276A CH 607462 A5 CH607462 A5 CH 607462A5
Authority
CH
Switzerland
Prior art keywords
opening
balance
cock
shaft
fixed
Prior art date
Application number
CH650276A
Other languages
English (en)
French (fr)
Inventor
Leo Boyes Freeman
Robert James Incerto
Joseph Anthony Petrosky Jr
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of CH607462A5 publication Critical patent/CH607462A5/fr

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/04—Modifications for accelerating switching
    • H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
    • H03K17/04106—Modifications for accelerating switching without feedback from the output circuit to the control circuit in field-effect transistor switches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09441—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
    • H03K19/09443—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors
    • H03K19/09445—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors with active depletion transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
    • H03K19/215—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical using field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
    • H03K3/35606—Bistable circuits using additional transistors in the input circuit using pass gates with synchronous operation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/84—Combinations of enhancement-mode IGFETs and depletion-mode IGFETs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0036—Means reducing energy consumption

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Adornments (AREA)
CH650276A 1975-06-05 1976-05-24 CH607462A5 (en, 2012)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/583,926 US3995172A (en) 1975-06-05 1975-06-05 Enhancement-and depletion-type field effect transistors connected in parallel

Publications (1)

Publication Number Publication Date
CH607462A5 true CH607462A5 (en, 2012) 1978-12-29

Family

ID=24335184

Family Applications (1)

Application Number Title Priority Date Filing Date
CH650276A CH607462A5 (en, 2012) 1975-06-05 1976-05-24

Country Status (12)

Country Link
US (1) US3995172A (en, 2012)
JP (2) JPS51148384A (en, 2012)
AU (1) AU500170B2 (en, 2012)
BE (1) BE841366A (en, 2012)
CA (1) CA1058325A (en, 2012)
CH (1) CH607462A5 (en, 2012)
DE (1) DE2623507C3 (en, 2012)
ES (1) ES447132A1 (en, 2012)
FR (1) FR2313819A1 (en, 2012)
GB (1) GB1543227A (en, 2012)
IT (1) IT1063717B (en, 2012)
NL (1) NL7606034A (en, 2012)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS522156A (en) * 1975-06-24 1977-01-08 Hitachi Ltd Push-pull buffer circuit
JPS6043693B2 (ja) * 1975-09-23 1985-09-30 株式会社東芝 駆動回路
US4170041A (en) * 1976-09-17 1979-10-02 Trw Inc. Logic gate utilizing charge transfer devices
US4093875A (en) * 1977-01-31 1978-06-06 International Business Machines Corporation Field effect transistor (FET) circuit utilizing substrate potential for turning off depletion mode devices
US4096584A (en) * 1977-01-31 1978-06-20 Intel Corporation Low power/high speed static ram
JPS53130987A (en) * 1977-04-20 1978-11-15 Matsushita Electric Ind Co Ltd Semiconductor device and its manufacture
DE2858738C2 (de) * 1977-07-18 1994-11-03 Sgs Thomson Microelectronics Verfahren zur Herstellung einer integrierten Schaltung zum Invertieren eines binären logischen Signals
US4135102A (en) * 1977-07-18 1979-01-16 Mostek Corporation High performance inverter circuits
US4370575A (en) * 1978-09-22 1983-01-25 Texas Instruments Incorporated High performance dynamic sense amplifier with active loads
FR2458950A1 (fr) * 1979-06-12 1981-01-02 Ibm France Dispositif de commutation et son application a une alimentation de puissance du type commute
DE3026951A1 (de) * 1980-07-16 1982-02-04 Siemens AG, 1000 Berlin und 8000 München Treiberstufe in integrierter mos-schaltkreistechnik mit grossem ausgangssignalverhaeltnis
US4395645A (en) * 1980-12-05 1983-07-26 International Telephone And Telegraph Corporation Mosfet logic inverter buffer circuit for integrated circuits
US4477735A (en) * 1980-12-20 1984-10-16 Itt Industries, Inc. Fast MOS driver stage for digital signals
DE3173257D1 (en) * 1980-12-20 1986-01-30 Itt Ind Gmbh Deutsche Fast mos driver circuit for digital signals
EP0079884A1 (en) * 1981-05-26 1983-06-01 Mostek Corporation Split load circuit
JPS583321A (ja) * 1981-06-29 1983-01-10 Fujitsu Ltd データバッファ回路
DE3146910A1 (de) * 1981-11-26 1983-06-01 Philips Patentverwaltung Gmbh, 2000 Hamburg Halbleiterbauelement mit einer feldeffekttransistorstruktur
DE3279496D1 (en) * 1981-12-28 1989-04-06 Thomson Components Mostek Corp Speed-power scaling for mos circuit
US4461963A (en) * 1982-01-11 1984-07-24 Signetics Corporation MOS Power-on reset circuit
DE3235677A1 (de) * 1982-09-27 1984-03-29 Siemens AG, 1000 Berlin und 8000 München Feldeffekttransistor des verarmungstyps und verfahren zu seiner herstellung
US4525640A (en) * 1983-03-31 1985-06-25 Ibm Corporation High performance and gate having an "natural" or zero threshold transistor for providing a faster rise time for the output
JPS59218042A (ja) * 1983-05-26 1984-12-08 Toshiba Corp 半導体集積回路
FR2587544B1 (fr) * 1985-09-13 1987-11-20 Eurotechnique Sa Procede de fabrication de circuits integres avec options programmables par masque et circuits obtenus par ce procede
US5087836A (en) * 1989-02-28 1992-02-11 Triquint Semiconductor, Inc. Electronic circuit including a parallel combination of an E-FET and a D-FET
JPH0494330U (en, 2012) * 1990-12-28 1992-08-17
US6320429B1 (en) 1991-06-28 2001-11-20 Fuji Electric Co., Ltd. Integrated circuit having a comparator circuit including at least one differential amplifier
WO2015073980A1 (en) 2013-11-15 2015-05-21 Texas Instruments Incorporated Method and circuitry for controlling a depletion-mode transistor
US11810971B2 (en) * 2019-03-21 2023-11-07 Transphorm Technology, Inc. Integrated design for III-Nitride devices

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE666834A (en, 2012) * 1964-07-13
US3694673A (en) * 1971-03-15 1972-09-26 Microsystems Int Ltd Field effect device and circuit having high current driving capabilities utilizing such device
US3775693A (en) * 1971-11-29 1973-11-27 Moskek Co Mosfet logic inverter for integrated circuits

Also Published As

Publication number Publication date
AU1465076A (en) 1977-12-08
FR2313819B1 (en, 2012) 1979-04-20
CA1058325A (en) 1979-07-10
FR2313819A1 (fr) 1976-12-31
AU500170B2 (en) 1979-05-10
JPS55133134A (en) 1980-10-16
US3995172A (en) 1976-11-30
GB1543227A (en) 1979-03-28
ES447132A1 (es) 1977-06-16
NL7606034A (nl) 1976-12-07
JPS566736B2 (en, 2012) 1981-02-13
DE2623507A1 (de) 1976-12-09
DE2623507B2 (de) 1977-08-04
BE841366A (fr) 1976-08-16
DE2623507C3 (de) 1979-07-26
JPS51148384A (en) 1976-12-20
IT1063717B (it) 1985-02-11

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Legal Events

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PL Patent ceased