CH604319A5 - - Google Patents

Info

Publication number
CH604319A5
CH604319A5 CH656677A CH7177A CH604319A5 CH 604319 A5 CH604319 A5 CH 604319A5 CH 656677 A CH656677 A CH 656677A CH 7177 A CH7177 A CH 7177A CH 604319 A5 CH604319 A5 CH 604319A5
Authority
CH
Switzerland
Application number
CH656677A
Inventor
Lawrence Griffith Heller
Dominic Patrick Spampinato
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of CH604319A5 publication Critical patent/CH604319A5/xx

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356069Bistable circuits using additional transistors in the feedback circuit
    • H03K3/356078Bistable circuits using additional transistors in the feedback circuit with synchronous operation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4091Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065Differential amplifiers of latching type
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356086Bistable circuits with additional means for controlling the main nodes
    • H03K3/356095Bistable circuits with additional means for controlling the main nodes with synchronous operation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Amplifiers (AREA)
  • Preliminary Treatment Of Fibers (AREA)
  • Read Only Memory (AREA)
CH656677A 1976-02-09 1977-01-05 CH604319A5 (US07655688-20100202-C00109.png)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/656,677 US4039861A (en) 1976-02-09 1976-02-09 Cross-coupled charge transfer sense amplifier circuits

Publications (1)

Publication Number Publication Date
CH604319A5 true CH604319A5 (US07655688-20100202-C00109.png) 1978-09-15

Family

ID=24634093

Family Applications (1)

Application Number Title Priority Date Filing Date
CH656677A CH604319A5 (US07655688-20100202-C00109.png) 1976-02-09 1977-01-05

Country Status (15)

Country Link
US (1) US4039861A (US07655688-20100202-C00109.png)
JP (1) JPS5295935A (US07655688-20100202-C00109.png)
AT (1) AT364995B (US07655688-20100202-C00109.png)
AU (1) AU498566B2 (US07655688-20100202-C00109.png)
BR (1) BR7700762A (US07655688-20100202-C00109.png)
CA (1) CA1099347A (US07655688-20100202-C00109.png)
CH (1) CH604319A5 (US07655688-20100202-C00109.png)
DE (1) DE2700802C3 (US07655688-20100202-C00109.png)
ES (1) ES455732A1 (US07655688-20100202-C00109.png)
FI (1) FI770415A (US07655688-20100202-C00109.png)
FR (1) FR2340598A1 (US07655688-20100202-C00109.png)
GB (1) GB1567565A (US07655688-20100202-C00109.png)
IT (1) IT1079566B (US07655688-20100202-C00109.png)
NL (1) NL7700762A (US07655688-20100202-C00109.png)
SE (1) SE416854B (US07655688-20100202-C00109.png)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5922316B2 (ja) * 1976-02-24 1984-05-25 株式会社東芝 ダイナミツクメモリ装置
US4144590A (en) * 1976-12-29 1979-03-13 Texas Instruments Incorporated Intermediate output buffer circuit for semiconductor memory device
SU928405A1 (ru) * 1976-08-05 1982-05-15 Предприятие П/Я Р-6429 Усилитель считывани дл интегрального запоминающего устройства
JPS5938670B2 (ja) * 1976-10-15 1984-09-18 日本電気株式会社 差信号増巾回路
US4130897A (en) * 1977-08-03 1978-12-19 Sperry Rand Corporation MNOS FET memory retention characterization test circuit with enhanced sensitivity and power conservation
US4170741A (en) * 1978-03-13 1979-10-09 Westinghouse Electric Corp. High speed CMOS sense circuit for semiconductor memories
US4286178A (en) * 1978-06-12 1981-08-25 Texas Instruments Incorporated Sense amplifier with dual parallel driver transistors in MOS random access memory
DE2839073C2 (de) * 1978-09-07 1983-02-17 Siemens AG, 1000 Berlin und 8000 München Dynamische Stromquelle für Halbleiterbausteine und ihre Verwendung
US4321484A (en) * 1979-02-28 1982-03-23 International Business Machines Corporation Field effect transistor multivibrator
US4253163A (en) * 1979-10-09 1981-02-24 Bell Telephone Laboratories, Incorporated Sense amplifier-detector circuit
DE3173745D1 (en) * 1981-10-30 1986-03-20 Ibm Deutschland Fet memory
JPS6050694A (ja) * 1983-08-26 1985-03-20 Mitsubishi Electric Corp ダイナミツク・ランダム・アクセス・メモリ
US4547685A (en) * 1983-10-21 1985-10-15 Advanced Micro Devices, Inc. Sense amplifier circuit for semiconductor memories
JPS61142591A (ja) * 1984-12-13 1986-06-30 Toshiba Corp 半導体記憶装置
US4670675A (en) * 1986-02-07 1987-06-02 Advanced Micro Devices, Inc. High gain sense amplifier for small current differential
JPS62252597A (ja) * 1986-04-24 1987-11-04 Sony Corp センスアンプ
JPS6410493A (en) * 1987-07-02 1989-01-13 Mitsubishi Electric Corp Charge transfer type sense amplifier
NL8901376A (nl) * 1989-05-31 1990-12-17 Philips Nv Geintegreerde geheugenschakeling met een leesversterker.
US5270591A (en) * 1992-02-28 1993-12-14 Xerox Corporation Content addressable memory architecture and circuits
US6018253A (en) * 1996-09-30 2000-01-25 Advanced Micro Devices, Inc. Register with current-steering input network
US5828239A (en) * 1997-04-14 1998-10-27 International Business Machines Corporation Sense amplifier circuit with minimized clock skew effect
US10529410B2 (en) 2017-12-18 2020-01-07 Micron Technology, Inc. Techniques for accessing an array of memory cells to reduce parasitic coupling
US10762944B2 (en) * 2017-12-18 2020-09-01 Micron Technology, Inc. Single plate configuration and memory array operation
US11017831B2 (en) 2019-07-15 2021-05-25 Micron Technology, Inc. Ferroelectric memory cell access

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE789500A (fr) * 1971-09-30 1973-03-29 Siemens Ag Memoire a semiconducteurs avec elements de memorisation a un seul transistor
US3838295A (en) * 1973-02-05 1974-09-24 Lockheed Electronics Co Ratioless mos sense amplifier
US3882326A (en) * 1973-12-26 1975-05-06 Ibm Differential amplifier for sensing small signals
US3949381A (en) * 1974-07-23 1976-04-06 International Business Machines Corporation Differential charge transfer sense amplifier

Also Published As

Publication number Publication date
ES455732A1 (es) 1978-01-16
AU2176277A (en) 1978-08-03
SE416854B (sv) 1981-02-09
GB1567565A (en) 1980-05-14
NL7700762A (nl) 1977-08-11
SE7700699L (sv) 1977-08-10
FR2340598A1 (fr) 1977-09-02
BR7700762A (pt) 1977-10-11
JPS5295935A (en) 1977-08-12
JPS57596B2 (US07655688-20100202-C00109.png) 1982-01-07
ATA17477A (de) 1981-04-15
CA1099347A (en) 1981-04-14
AU498566B2 (en) 1979-03-15
AT364995B (de) 1981-11-25
DE2700802B2 (de) 1978-06-15
DE2700802A1 (de) 1977-08-11
FI770415A (US07655688-20100202-C00109.png) 1977-08-10
FR2340598B1 (US07655688-20100202-C00109.png) 1979-09-21
DE2700802C3 (de) 1979-02-15
US4039861A (en) 1977-08-02
IT1079566B (it) 1985-05-13

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Legal Events

Date Code Title Description
PL Patent ceased