CH592386A5 - - Google Patents

Info

Publication number
CH592386A5
CH592386A5 CH1307074A CH1307074A CH592386A5 CH 592386 A5 CH592386 A5 CH 592386A5 CH 1307074 A CH1307074 A CH 1307074A CH 1307074 A CH1307074 A CH 1307074A CH 592386 A5 CH592386 A5 CH 592386A5
Authority
CH
Switzerland
Application number
CH1307074A
Original Assignee
Int Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Int Standard Electric Corp filed Critical Int Standard Electric Corp
Publication of CH592386A5 publication Critical patent/CH592386A5/xx

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/02—Automatic control of frequency or phase; Synchronisation using a frequency discriminator comprising a passive frequency-determining element
    • H03L7/04—Automatic control of frequency or phase; Synchronisation using a frequency discriminator comprising a passive frequency-determining element wherein the frequency-determining element comprises distributed inductance and capacitance
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/24—Automatic control of frequency or phase; Synchronisation using a reference signal directly applied to the generator
CH1307074A 1973-09-28 1974-09-27 CH592386A5 (xx)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7334751A FR2246117B1 (xx) 1973-09-28 1973-09-28

Publications (1)

Publication Number Publication Date
CH592386A5 true CH592386A5 (xx) 1977-10-31

Family

ID=9125667

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1307074A CH592386A5 (xx) 1973-09-28 1974-09-27

Country Status (8)

Country Link
US (1) US3947697A (xx)
BE (1) BE820250A (xx)
CH (1) CH592386A5 (xx)
ES (1) ES430489A1 (xx)
FR (1) FR2246117B1 (xx)
GB (1) GB1480355A (xx)
IE (1) IE41344B1 (xx)
IT (1) IT1022232B (xx)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4035663A (en) * 1976-09-01 1977-07-12 Rockwell International Corporation Two phase clock synchronizing method and apparatus
US4085341A (en) * 1976-12-20 1978-04-18 Motorola, Inc. Integrated injection logic circuit having reduced delay
US4117352A (en) * 1977-06-09 1978-09-26 Gte Automatic Electric Laboratories Incorporated Integrated clock drive circuit
JPS5474362A (en) * 1977-11-25 1979-06-14 Nec Corp Multi-cavity klystron
DE3106183A1 (de) * 1981-02-19 1982-09-02 Siemens AG, 1000 Berlin und 8000 München Verfahren und anordnung zur fehlerfreien synchronisation asynchroner impulse
US4469964A (en) * 1981-07-20 1984-09-04 Texas Instruments Incorporated Synchronizer circuit
US4544851A (en) * 1981-08-31 1985-10-01 Texas Instruments Incorporated Synchronizer circuit with dual input
US4473760A (en) * 1982-12-13 1984-09-25 Western Digital Corporation Fast digital sample resolution circuit
DE3329242A1 (de) * 1983-08-12 1985-02-21 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum ueberpruefen des zeitlichen abstands von rechtecksignalen
DE3408408C2 (de) * 1984-03-08 1986-05-07 ANT Nachrichtentechnik GmbH, 7150 Backnang Verfahren und Anordnung zur Ableitung eines Steuersignales für eine Phasenregelschleife
JP2501200B2 (ja) * 1986-08-28 1996-05-29 日本電気アイシーマイコンシステム 株式会社 パルス発生回路
FR2608863B1 (fr) * 1986-12-19 1994-04-29 Nec Corp Circuit integre logique comportant des bascules electroniques d'entree et de sortie pour stabiliser les durees des impulsions
US4797572A (en) * 1987-01-21 1989-01-10 Tektronix, Inc. Trigger re-synchronization circuit
JPS63228206A (ja) * 1987-03-17 1988-09-22 Nec Corp クロツク分配方式
US4929850A (en) * 1987-09-17 1990-05-29 Texas Instruments Incorporated Metastable resistant flip-flop
US4906874A (en) * 1988-01-22 1990-03-06 Sharp Kabushiki Kaisha Analog signal switching device for use in an optical memory
NL8800872A (nl) * 1988-04-06 1989-11-01 Philips Nv Geintegreerde schakeling.
JPH06203189A (ja) * 1992-12-28 1994-07-22 Takayama:Kk 除算回路
US6380775B1 (en) 1993-11-30 2002-04-30 Analog Devices, Inc. Multiplexed distribution system for CMOS signals
US5568100A (en) * 1995-09-22 1996-10-22 Lucent Technologies Inc. Synchronous power down clock oscillator device
JP2936474B2 (ja) * 1997-04-03 1999-08-23 セイコーインスツルメンツ株式会社 半導体集積回路装置
DE10020171A1 (de) 2000-04-25 2001-10-31 Ericsson Telefon Ab L M Pulsdetektor
US6291981B1 (en) * 2000-07-26 2001-09-18 Teradyne, Inc. Automatic test equipment with narrow output pulses
US7248597B2 (en) * 2001-05-02 2007-07-24 Nvidia Corporation General purpose input/output controller
US6798259B2 (en) * 2001-08-03 2004-09-28 Micron Technology, Inc. System and method to improve the efficiency of synchronous mirror delays and delay locked loops
US7356551B2 (en) * 2003-03-14 2008-04-08 Nxp B.V. Method and apparatus of retaining maximum speed of flip-flop metastability based random number generators
US7423919B2 (en) * 2005-05-26 2008-09-09 Micron Technology, Inc. Method and system for improved efficiency of synchronous mirror delays and delay locked loops
US7574632B2 (en) * 2005-09-23 2009-08-11 Teradyne, Inc. Strobe technique for time stamping a digital signal
US7573957B2 (en) * 2005-09-23 2009-08-11 Teradyne, Inc. Strobe technique for recovering a clock in a digital signal
US7856578B2 (en) * 2005-09-23 2010-12-21 Teradyne, Inc. Strobe technique for test of digital signal timing
US7378854B2 (en) * 2005-10-28 2008-05-27 Teradyne, Inc. Dual sine-wave time stamp method and apparatus
US7593497B2 (en) * 2005-10-31 2009-09-22 Teradyne, Inc. Method and apparatus for adjustment of synchronous clock signals
CN102907021B (zh) * 2010-05-17 2016-06-01 瑞典爱立信有限公司 优化定时分组传输
KR102605646B1 (ko) * 2018-06-07 2023-11-24 에스케이하이닉스 주식회사 비대칭 펄스 폭 비교 회로 및 이를 포함하는 클럭 위상 보정 회로

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1228303B (de) * 1965-04-23 1966-11-10 Philips Patentverwaltung Einrichtung zur Synchronisation von Zaehlsignalen mit einer Taktpulsfrequenz
US3422425A (en) * 1965-06-29 1969-01-14 Rca Corp Conversion from nrz code to selfclocking code
US3363183A (en) * 1965-07-13 1968-01-09 Ibm Self-correcting clock for a data transmission system
GB1265530A (xx) * 1969-08-30 1972-03-01 Marconi Co Ltd
US3612906A (en) * 1970-09-28 1971-10-12 Us Navy Pulse synchronizer

Also Published As

Publication number Publication date
IE41344B1 (en) 1979-12-05
GB1480355A (en) 1977-07-20
IT1022232B (it) 1978-03-20
FR2246117B1 (xx) 1976-05-14
BE820250A (fr) 1975-03-24
IE41344L (en) 1975-03-28
US3947697A (en) 1976-03-30
FR2246117A1 (xx) 1975-04-25
AU7324574A (en) 1976-03-18
ES430489A1 (es) 1976-10-16

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Legal Events

Date Code Title Description
PL Patent ceased