CH560500A5 - - Google Patents

Info

Publication number
CH560500A5
CH560500A5 CH536773A CH536773A CH560500A5 CH 560500 A5 CH560500 A5 CH 560500A5 CH 536773 A CH536773 A CH 536773A CH 536773 A CH536773 A CH 536773A CH 560500 A5 CH560500 A5 CH 560500A5
Authority
CH
Switzerland
Application number
CH536773A
Original Assignee
Bunker Ramo
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bunker Ramo filed Critical Bunker Ramo
Publication of CH560500A5 publication Critical patent/CH560500A5/xx

Links

Classifications

    • H10W76/60—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/44—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits
    • H05K3/445—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits having insulated holes or insulated via connections through the metal core
    • H10W70/611—
    • H10W90/00—
    • H10W90/401—
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09745—Recess in conductor, e.g. in pad or in metallic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09881—Coating only between conductors, i.e. flush with the conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0323—Working metal substrate or core, e.g. by etching, deforming
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H10W72/01—
    • H10W72/5363—
    • H10W72/932—
    • H10W90/20—
    • H10W90/22—
    • H10W90/291—
    • H10W90/297—
    • H10W90/754—

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Laminated Bodies (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Combinations Of Printed Boards (AREA)
CH536773A 1972-04-27 1973-04-13 CH560500A5 (enExample)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US24800272A 1972-04-27 1972-04-27

Publications (1)

Publication Number Publication Date
CH560500A5 true CH560500A5 (enExample) 1975-03-27

Family

ID=22937240

Family Applications (1)

Application Number Title Priority Date Filing Date
CH536773A CH560500A5 (enExample) 1972-04-27 1973-04-13

Country Status (8)

Country Link
JP (1) JPS5644599B2 (enExample)
CA (1) CA977451A (enExample)
CH (1) CH560500A5 (enExample)
DE (1) DE2317404A1 (enExample)
GB (1) GB1429078A (enExample)
NL (1) NL7304648A (enExample)
SE (1) SE385538B (enExample)
ZA (1) ZA731895B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5423119A (en) * 1994-07-08 1995-06-13 Hualon Microelectronics Corporation Method for manufacturing a hybrid circuit charge-coupled device image sensor

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5262782U (enExample) * 1975-11-04 1977-05-09
JPS54111661U (enExample) * 1978-01-20 1979-08-06
JPS6253221U (enExample) * 1985-09-24 1987-04-02
JPS6270107A (ja) * 1985-09-24 1987-03-31 Okura Yusoki Co Ltd 搬送装置
JPS62156847A (ja) * 1985-12-28 1987-07-11 Ibiden Co Ltd 多層プリント配線板の製造方法
JPS6487417A (en) * 1987-09-25 1989-03-31 Nippon Denso Co Method and device for transferring pallet
US5006923A (en) * 1989-09-14 1991-04-09 Litton Systems, Inc. Stackable multilayer substrate for mounting integrated circuits
JP2833947B2 (ja) * 1992-12-24 1998-12-09 加茂精工株式会社 カムによる間欠回転装置
DE102012212249B4 (de) * 2012-07-12 2016-02-25 Infineon Technologies Ag Verfahren zur Herstellung eines Verbundes und eines Halbleitermoduls
US20250379129A1 (en) * 2024-06-05 2025-12-11 Qualcomm Incorporated Conductive structure and interconnects for electrically connecting a substrate and an interposer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5423119A (en) * 1994-07-08 1995-06-13 Hualon Microelectronics Corporation Method for manufacturing a hybrid circuit charge-coupled device image sensor

Also Published As

Publication number Publication date
DE2317404A1 (de) 1973-11-15
JPS5644599B2 (enExample) 1981-10-20
JPS4949157A (enExample) 1974-05-13
ZA731895B (en) 1973-12-19
AU5343873A (en) 1974-09-19
CA977451A (en) 1975-11-04
SE385538B (sv) 1976-07-05
GB1429078A (en) 1976-03-24
NL7304648A (enExample) 1973-10-30

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Legal Events

Date Code Title Description
PL Patent ceased
PL Patent ceased