CH554946A - Verfahren zum herabsetzen oder vollstaendigen unterdruecken von auf der oberflaeche von metallischen duennschichten bei zyklischen waermeeinwirkungen waehrend der herstellung entstehenden warzenartigen defekten. - Google Patents

Verfahren zum herabsetzen oder vollstaendigen unterdruecken von auf der oberflaeche von metallischen duennschichten bei zyklischen waermeeinwirkungen waehrend der herstellung entstehenden warzenartigen defekten.

Info

Publication number
CH554946A
CH554946A CH1863270A CH1863270A CH554946A CH 554946 A CH554946 A CH 554946A CH 1863270 A CH1863270 A CH 1863270A CH 1863270 A CH1863270 A CH 1863270A CH 554946 A CH554946 A CH 554946A
Authority
CH
Switzerland
Prior art keywords
tart
defects
reducing
metallic layers
thin metallic
Prior art date
Application number
CH1863270A
Other languages
German (de)
English (en)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of CH554946A publication Critical patent/CH554946A/xx

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F10/00—Thin magnetic films, e.g. of one-domain structure
    • H01F10/06—Thin magnetic films, e.g. of one-domain structure characterised by the coupling or physical contact with connecting or interacting conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F10/00—Thin magnetic films, e.g. of one-domain structure
    • H01F10/08—Thin magnetic films, e.g. of one-domain structure characterised by magnetic layers
    • H01F10/10—Thin magnetic films, e.g. of one-domain structure characterised by magnetic layers characterised by the composition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32051—Deposition of metallic or metal-silicide layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53219—Aluminium alloys
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/10—Junction-based devices
    • H10N60/12—Josephson-effect devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Physical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
CH1863270A 1969-12-30 1970-12-16 Verfahren zum herabsetzen oder vollstaendigen unterdruecken von auf der oberflaeche von metallischen duennschichten bei zyklischen waermeeinwirkungen waehrend der herstellung entstehenden warzenartigen defekten. CH554946A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US88910069A 1969-12-30 1969-12-30

Publications (1)

Publication Number Publication Date
CH554946A true CH554946A (de) 1974-10-15

Family

ID=25394503

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1863270A CH554946A (de) 1969-12-30 1970-12-16 Verfahren zum herabsetzen oder vollstaendigen unterdruecken von auf der oberflaeche von metallischen duennschichten bei zyklischen waermeeinwirkungen waehrend der herstellung entstehenden warzenartigen defekten.

Country Status (7)

Country Link
JP (1) JPS499019B1 (xx)
BE (1) BE761083A (xx)
CH (1) CH554946A (xx)
DE (1) DE2060476C2 (xx)
FR (1) FR2072112B1 (xx)
GB (1) GB1338566A (xx)
NL (1) NL7017660A (xx)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3961358A (en) * 1973-02-21 1976-06-01 Rca Corporation Leakage current prevention in semiconductor integrated circuit devices
CN111684103B (zh) * 2018-02-05 2024-04-16 应用材料公司 用于沉积蒸发材料的沉积设备及其方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3382568A (en) * 1965-07-22 1968-05-14 Ibm Method for providing electrical connections to semiconductor devices

Also Published As

Publication number Publication date
NL7017660A (xx) 1971-07-02
DE2060476C2 (de) 1983-03-31
JPS499019B1 (xx) 1974-03-01
DE2060476A1 (de) 1971-07-22
BE761083A (fr) 1971-05-27
FR2072112B1 (xx) 1973-12-07
GB1338566A (en) 1973-11-28
FR2072112A1 (xx) 1971-09-24

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Legal Events

Date Code Title Description
PL Patent ceased