GB1338566A - Method for forming a metallic film - Google Patents

Method for forming a metallic film

Info

Publication number
GB1338566A
GB1338566A GB5738470A GB5738470A GB1338566A GB 1338566 A GB1338566 A GB 1338566A GB 5738470 A GB5738470 A GB 5738470A GB 5738470 A GB5738470 A GB 5738470A GB 1338566 A GB1338566 A GB 1338566A
Authority
GB
United Kingdom
Prior art keywords
film
substrate
deposited
doped
oxidized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5738470A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1338566A publication Critical patent/GB1338566A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00—Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F10/00—Thin magnetic films, e.g. of one-domain structure
    • H01F10/06—Thin magnetic films, e.g. of one-domain structure characterised by the coupling or physical contact with connecting or interacting conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F10/00—Thin magnetic films, e.g. of one-domain structure
    • H01F10/08—Thin magnetic films, e.g. of one-domain structure characterised by magnetic layers
    • H01F10/10—Thin magnetic films, e.g. of one-domain structure characterised by magnetic layers characterised by the composition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32051—Deposition of metallic or metal-silicide layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53219—Aluminium alloys
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/10—Junction-based devices
    • H10N60/12—Josephson-effect devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Physical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)

Abstract

1338566 Metallic films INTERNATIONAL BUSINESS MACHINES CORP 3 Dec 1970 [30 Dec 1969] 57384/70 Heading C7F [Also in Division H1] When a metallic film is deposited on a substrate having a different thermal co-efficient of expansion from the film, the film is doped with one or more alloying additions which interact with defects in the film so that hillock formation on the surface of the film is inhibited when the film and substrate are thermally cycled within a given temperature range. A layer of insulating material is formed on the film e.g. by sputtering the thickness of the layer being such that it would be damaged by the formation of hillocks. If the film is of Al the alloying addition may be selected from Be, Cu, Mg, Si and Th and if the film is of Pb, then Au, Al, Ag, As, Sn, Sb or Si may be added. Suitable substrates include oxidized Si, glass, silicon, monoxide, quartz, mica, sapphire, nitrides, sulphides, carbides alumina and metals. The substrate 2-14 is held in a holder 2-16 and may be heated by a heater 2-18. The film material and the doping material are evaporated from separate crucibles 2-20 and 2-22 either simultaneously or consecutively and the rate of deposition of each material monitored by quartz crystal oscillators 2-28 and 2-30 which change their frequency depending on the amount of metal deposited on quartz crystals 2-29 and 2-31. The beginning and end of a deposition run is controlled by a shutter 2-39 operated via a knob 2-40. Examples describe the preparation of a 10, 000Š thick Al film deposited at 200‹C. on an oxidized Si substrate and doped with Cu or Mg and subsequently annealed at 530‹C. and a 2000-3000A thick Pb film deposited at room temperature on an oxidized Si or glass substrate and doped with between 7 per cent and 10 per cent of Ag or Au.
GB5738470A 1969-12-30 1970-12-03 Method for forming a metallic film Expired GB1338566A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US88910069A 1969-12-30 1969-12-30

Publications (1)

Publication Number Publication Date
GB1338566A true GB1338566A (en) 1973-11-28

Family

ID=25394503

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5738470A Expired GB1338566A (en) 1969-12-30 1970-12-03 Method for forming a metallic film

Country Status (7)

Country Link
JP (1) JPS499019B1 (en)
BE (1) BE761083A (en)
CH (1) CH554946A (en)
DE (1) DE2060476C2 (en)
FR (1) FR2072112B1 (en)
GB (1) GB1338566A (en)
NL (1) NL7017660A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2406807A1 (en) * 1973-02-21 1974-08-22 Rca Corp INTEGRATED SEMI-CONDUCTOR CIRCUIT
CN111684103A (en) * 2018-02-05 2020-09-18 应用材料公司 Deposition apparatus for depositing evaporation material and method thereof

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3382568A (en) * 1965-07-22 1968-05-14 Ibm Method for providing electrical connections to semiconductor devices

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2406807A1 (en) * 1973-02-21 1974-08-22 Rca Corp INTEGRATED SEMI-CONDUCTOR CIRCUIT
CN111684103A (en) * 2018-02-05 2020-09-18 应用材料公司 Deposition apparatus for depositing evaporation material and method thereof
CN111684103B (en) * 2018-02-05 2024-04-16 应用材料公司 Deposition apparatus for depositing vaporized material and method thereof

Also Published As

Publication number Publication date
NL7017660A (en) 1971-07-02
DE2060476C2 (en) 1983-03-31
JPS499019B1 (en) 1974-03-01
DE2060476A1 (en) 1971-07-22
CH554946A (en) 1974-10-15
BE761083A (en) 1971-05-27
FR2072112B1 (en) 1973-12-07
FR2072112A1 (en) 1971-09-24

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee