CH538194A - Halbleiteranordnung - Google Patents

Halbleiteranordnung

Info

Publication number
CH538194A
CH538194A CH153072A CH153072A CH538194A CH 538194 A CH538194 A CH 538194A CH 153072 A CH153072 A CH 153072A CH 153072 A CH153072 A CH 153072A CH 538194 A CH538194 A CH 538194A
Authority
CH
Switzerland
Prior art keywords
semiconductor device
semiconductor
Prior art date
Application number
CH153072A
Other languages
English (en)
Inventor
Budde Herman
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of CH538194A publication Critical patent/CH538194A/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3672Foil-like cooling fins or heat sinks
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985Flexible insulating substrates
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    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
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    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/2919Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
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    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
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    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
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    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
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    • H01L2924/01082Lead [Pb]
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    • H01L2924/078Adhesive characteristics other than chemical
    • H01L2924/07802Adhesive characteristics other than chemical not being an ohmic electrical conductor
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
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    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15172Fan-out arrangement of the internal vias
    • H01L2924/15173Fan-out arrangement of the internal vias in a single layer of the multilayer substrate
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Combinations Of Printed Boards (AREA)
CH153072A 1971-02-05 1972-02-02 Halbleiteranordnung CH538194A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7101600A NL164425C (nl) 1971-02-05 1971-02-05 Halfgeleiderinrichting voorzien van een koellichaam.

Publications (1)

Publication Number Publication Date
CH538194A true CH538194A (de) 1973-06-15

Family

ID=19812417

Family Applications (1)

Application Number Title Priority Date Filing Date
CH153072A CH538194A (de) 1971-02-05 1972-02-02 Halbleiteranordnung

Country Status (9)

Country Link
JP (1) JPS5329071B2 (de)
AU (1) AU466735B2 (de)
CA (1) CA956731A (de)
CH (1) CH538194A (de)
DE (1) DE2202802B2 (de)
FR (1) FR2124487B1 (de)
GB (1) GB1375054A (de)
IT (1) IT947244B (de)
NL (1) NL164425C (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5412270A (en) * 1977-06-22 1979-01-29 Nec Corp Integrated circuit rackage
DE2752655A1 (de) * 1977-09-23 1979-06-07 Blaupunkt Werke Gmbh Elektronisches bauelement
JPS5549513U (de) * 1978-09-28 1980-03-31
JPS55113389U (de) * 1979-02-02 1980-08-09
DE3029939A1 (de) * 1980-08-07 1982-03-25 GAO Gesellschaft für Automation und Organisation mbH, 8000 München Ausweiskarte mit ic-baustein und verfahren zu ihrer herstellung
JPS58119595A (ja) * 1982-01-09 1983-07-16 三菱電機株式会社 巻上装置
FR2521350B1 (fr) * 1982-02-05 1986-01-24 Hitachi Ltd Boitier porteur de puce semi-conductrice
JPS5922386A (ja) * 1982-07-07 1984-02-04 アルカテル・エヌ・ブイ 電子部品構造体
JPS59116311U (ja) * 1983-01-21 1984-08-06 日立金属株式会社 羽根付コンベヤチエン
GB2135521A (en) * 1983-02-16 1984-08-30 Ferranti Plc Printed circuit boards
US4685030A (en) * 1985-04-29 1987-08-04 Energy Conversion Devices, Inc. Surface mounted circuits including hybrid circuits, having CVD interconnects, and method of preparing the circuits
JPS62189743A (ja) * 1986-02-14 1987-08-19 Matsushita Electric Works Ltd 配線回路体
GB8706857D0 (en) * 1987-03-23 1987-04-29 Bradley International Ltd Alle Chip carriers
US4868349A (en) * 1988-05-09 1989-09-19 National Semiconductor Corporation Plastic molded pin-grid-array power package
GB2237682A (en) * 1989-09-28 1991-05-08 Redpoint Limited Heatsink for semiconductor devices
GB2240425B (en) * 1990-01-20 1994-01-12 Motorola Ltd Radio transmitter power amplifier with cooling apparatus
JPH07109867B2 (ja) * 1991-04-15 1995-11-22 インターナショナル・ビジネス・マシーンズ・コーポレイション 半導体チツプの冷却構造
DE102019115500A1 (de) * 2019-06-07 2020-12-10 OSRAM CONTINENTAL GmbH Anordnung und Verfahren zur Herstellung einer Anordnung

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3414775A (en) * 1967-03-03 1968-12-03 Ibm Heat dissipating module assembly and method
FR1564787A (de) * 1968-03-04 1969-04-25

Also Published As

Publication number Publication date
IT947244B (it) 1973-05-21
DE2202802B2 (de) 1979-05-10
NL164425C (nl) 1980-12-15
DE2202802A1 (de) 1972-08-17
CA956731A (en) 1974-10-22
FR2124487A1 (de) 1972-09-22
GB1375054A (de) 1974-11-27
JPS4845174A (de) 1973-06-28
AU3853872A (en) 1973-08-09
NL7101600A (de) 1972-08-08
FR2124487B1 (de) 1975-10-24
JPS5329071B2 (de) 1978-08-18
AU466735B2 (en) 1973-08-09
NL164425B (nl) 1980-07-15

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