CH504106A - Verfahren zur Herstellung von Halbleiterbauelementen unter Verwendung eines selektiven Ätzvorgangs - Google Patents

Verfahren zur Herstellung von Halbleiterbauelementen unter Verwendung eines selektiven Ätzvorgangs

Info

Publication number
CH504106A
CH504106A CH1499969A CH1499969A CH504106A CH 504106 A CH504106 A CH 504106A CH 1499969 A CH1499969 A CH 1499969A CH 1499969 A CH1499969 A CH 1499969A CH 504106 A CH504106 A CH 504106A
Authority
CH
Switzerland
Prior art keywords
production
semiconductor components
selective etching
etching process
selective
Prior art date
Application number
CH1499969A
Other languages
English (en)
Inventor
Antonius Van Dijk Hen Josephus
Joseph Theunissen Mat Johannes
Bernardus Smolders Fr Josephus
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of CH504106A publication Critical patent/CH504106A/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3063Electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/2205Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • Pressure Sensors (AREA)
CH1499969A 1968-10-09 1969-10-06 Verfahren zur Herstellung von Halbleiterbauelementen unter Verwendung eines selektiven Ätzvorgangs CH504106A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL6814415A NL6814415A (de) 1968-10-09 1968-10-09

Publications (1)

Publication Number Publication Date
CH504106A true CH504106A (de) 1971-02-28

Family

ID=19804886

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1499969A CH504106A (de) 1968-10-09 1969-10-06 Verfahren zur Herstellung von Halbleiterbauelementen unter Verwendung eines selektiven Ätzvorgangs

Country Status (7)

Country Link
BE (1) BE739941A (de)
BR (1) BR6913205D0 (de)
CH (1) CH504106A (de)
FR (1) FR2020229B1 (de)
GB (1) GB1289147A (de)
NL (1) NL6814415A (de)
SE (1) SE344141B (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8426915D0 (en) * 1984-10-24 1984-11-28 Marconi Instruments Ltd Fabricating devices on semiconductor substrates

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3418226A (en) * 1965-05-18 1968-12-24 Ibm Method of electrolytically etching a semiconductor having a single impurity gradient

Also Published As

Publication number Publication date
FR2020229A1 (de) 1970-07-10
DE1950533A1 (de) 1970-04-23
DE1950533B2 (de) 1976-06-24
BR6913205D0 (pt) 1973-01-11
SE344141B (de) 1972-03-27
NL6814415A (de) 1970-04-13
FR2020229B1 (de) 1974-03-15
BE739941A (de) 1970-04-07
GB1289147A (de) 1972-09-13

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Legal Events

Date Code Title Description
PL Patent ceased