GB1289147A - - Google Patents

Info

Publication number
GB1289147A
GB1289147A GB1289147DA GB1289147A GB 1289147 A GB1289147 A GB 1289147A GB 1289147D A GB1289147D A GB 1289147DA GB 1289147 A GB1289147 A GB 1289147A
Authority
GB
United Kingdom
Prior art keywords
substrate
layer
resistivity
type
type layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1289147A publication Critical patent/GB1289147A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3063Electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/2205Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • Pressure Sensors (AREA)

Abstract

1289147 Semi-conductor devices PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 8 Oct 1969 [9 Oct 1968] 49383/69 Heading H1K A method of manufacturing semi-conductor devices comprises depositing a P-type epitaxial silicon layer on a low resistivity N-type silicon substrate in such a manner that a high resistivity N-type layer is formed therebetween, the N-type layer protecting the epitaxial layer from etching action in the subsequent selective electrolytic etching process to remove the substrate. The P- type layer may be doped with boron, have a minimum resistivity of 0.5 ohm. cm., and it may be deposited at a substrate temperature of at least 1000‹ C. The substrate may be doped with antimony and have a maximum resistivity of 0.01 ohm. cm. During the etching process, which etch may contain fluorine, a connection may be made to the substrate, but no separate voltage is applied to the epitaxial layer. Finally the high resistivity N-type layer may be removed by chemically etching. Regions of different conductivity types and/or conductivities may also be formed in the epitaxial layer prior to electrolytic etching.
GB1289147D 1968-10-09 1969-10-08 Expired GB1289147A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL6814415A NL6814415A (en) 1968-10-09 1968-10-09

Publications (1)

Publication Number Publication Date
GB1289147A true GB1289147A (en) 1972-09-13

Family

ID=19804886

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1289147D Expired GB1289147A (en) 1968-10-09 1969-10-08

Country Status (7)

Country Link
BE (1) BE739941A (en)
BR (1) BR6913205D0 (en)
CH (1) CH504106A (en)
FR (1) FR2020229B1 (en)
GB (1) GB1289147A (en)
NL (1) NL6814415A (en)
SE (1) SE344141B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8426915D0 (en) * 1984-10-24 1984-11-28 Marconi Instruments Ltd Fabricating devices on semiconductor substrates

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3418226A (en) * 1965-05-18 1968-12-24 Ibm Method of electrolytically etching a semiconductor having a single impurity gradient

Also Published As

Publication number Publication date
FR2020229A1 (en) 1970-07-10
DE1950533A1 (en) 1970-04-23
DE1950533B2 (en) 1976-06-24
BR6913205D0 (en) 1973-01-11
SE344141B (en) 1972-03-27
NL6814415A (en) 1970-04-13
CH504106A (en) 1971-02-28
FR2020229B1 (en) 1974-03-15
BE739941A (en) 1970-04-07

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee